Semiconductor packaging structure and electronic equipment

Abstract

The utility model relates to the technical field of packaging, and discloses a semiconductor packaging structure, which comprises a substrate, a fixing ring, a chip, a soaking piece, a thermal interface material layer, a connecting piece and a buffer piece, and is characterized in that the fixing ring is fixed on the surface of one side of the substrate, and a chip mounting area is enclosed on the substrate; the chip is arranged in the chip mounting area and is electrically connected with the substrate; the soaking piece is arranged on one surface, back to the substrate, of the chip; the thermal interface material layer is arranged on one surface, facing the chip, of the soaking piece and is attached to the chip; the connecting piece is detachably connected between the soaking piece and the fixing ring; the buffer member is fixed on one surface of the substrate facing the chip, one side of the buffer member back to the substrate is provided with an abutting surface, and the soaking member abuts against the abutting surface. According to the utility model, the thermal interface material layer on the soaking piece can be conveniently replaced in time, the chip is prevented from gradually deteriorating and losing efficacy along with the performance degradation of the thermal interface material layer, the stress on the chip when an external radiator is buckled can be reduced, the service life of the chip is prolonged, and the reliability of long-term work is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of packaging, in particular to a semiconductor packaging structure and an electronic device. Background Art

[0002] As Figure 1 shown, the existing chip packaging structure mainly consists of a substrate 1, a chip 3, a cover plate 9, and an adhesive. To ensure a good heat transfer path between the chip 3 and the cover plate 9, a thermal interface material layer 5 is usually filled between the chip 3 and the cover plate 9. The air between the chip 3 and the cover plate 9 is expelled through the thermal interface material layer 5, so that the heat generated by the chip 3 can be quickly transferred to the outside through the thermal interface material layer 5, reducing the working temperature of the chip 3 and improving the service life of the chip 3.

[0003] During the high-temperature ball planting, chip-on-board soldering process, and long-term operation of the chip 3, due to the mismatch of the thermal expansion coefficients of the chip 3 and the cover plate 9, the expansion and deformation degrees of the chip 3 and the cover plate 9 are different. Under the pulling of the expansion and deformation of the chip 3 and the cover plate 9, the thermal interface material layer 5 is prone to delamination and cracking, resulting in reliability problems such as deterioration of the chip heat dissipation performance and thermal failure. Moreover, as the chip size continues to increase, the nodes gradually shrink, and the integration and power density continue to increase, the heat accumulated inside the chip 3 increases sharply. During the long-term operation of the thermal interface material, due to the influence of heat and external environmental conditions, the aging rate of the thermal interface material increases, reducing the heat dissipation efficiency and packaging reliability of the thermal interface material layer 5.

[0004] Currently, in the existing packaging structure, an integrated cover plate is usually adhesively fixed to the substrate 1. After the thermal interface material deteriorates, it is difficult to disassemble and replace the thermal interface material and the cover plate, which easily leads to the gradual deterioration and failure of the chip along with the degradation of the thermal interface material. Moreover, the existing cover plate directly covers and presses on the chip. When an external radiator is buckled on the cover plate, the buckling force is directly transmitted to the chip through the cover plate, resulting in a large stress on the chip, which is likely to damage the chip and affect the reliability of the chip operation. Summary of the Utility Model

[0005] The purpose of the utility model is to provide a semiconductor packaging structure and an electronic device, which can facilitate the timely disassembly and replacement of the thermal interface material when its performance deteriorates, and can slow down the stress transmitted to the chip when buckling an external radiator. By reducing the stress borne by the chip, the reliability of the chip operation is improved.

[0006] To achieve the above purpose, the utility model adopts the following technical solutions:

[0007] One aspect of the present application is to provide a semiconductor packaging structure, including:

[0008] A substrate;

[0009] A fixing ring, fixedly arranged on one side surface of the substrate, to enclose and form a chip mounting area on the substrate;

[0010] A chip, arranged in the chip mounting area and electrically connected to the substrate;

[0011] A heat spreader, arranged on the side of the chip facing away from the substrate;

[0012] A thermal interface material layer, arranged on the side of the heat spreader facing the chip, and the thermal interface material layer is in contact with the chip;

[0013] A connecting piece, detachably connected between the heat spreader and the fixing ring; and

[0014] A buffer, the buffer is fixed on the side of the substrate facing the chip, and the side of the buffer facing away from the substrate has an abutting surface, and the side of the heat spreader facing the chip abuts on the abutting surface.

[0015] The cover structure is formed by detachably connecting the fixing ring, the connecting piece and the heat spreader. When the thermal interface material layer is delaminated, cracked or its performance degrades during the high-temperature ball planting, chip-on-board soldering process and long-term operation of the chip, by removing the connecting piece, the heat spreader and the thermal interface material layer can be detached from the chip as a whole, so as to facilitate the timely replacement of the thermal interface material layer on the heat spreader, avoid the chip from gradually deteriorating and failing with the performance degradation of the thermal interface material layer, improve the service life of the chip and the reliability of long-term operation, and avoid chip thermal failure. On the other hand, the heat spreader is abutted on the buffer, and the buffer bears the abutting stress, so that the heat spreader does not directly abut on the chip, which can slow down the stress on the chip when the external radiator is buckled, avoid the chip from being damaged due to excessive stress, and improve the reliability of the chip's long-term operation.

[0016] In some embodiments, the height position of the abutting surface is higher than the height position of the upper surface of the chip.

[0017] With the above setting method, a certain installation space for the thermal interface material layer is reserved between the upper surface of the chip and the heat spreader. By controlling the height difference between the upper surface of the chip and the abutting surface, the installation thickness of the thermal interface material layer can be controlled, the heat transfer thermal resistance between the chip and the heat spreader can be reduced, the heat dissipation performance of the chip can be improved, and the reliability of the chip operation can be further improved.

[0018] In some embodiments, there are several buffers, and the several buffers are arranged at intervals on the outer peripheral side of the chip, and there is a gap between the side of each buffer facing the chip and the side wall of the chip.

[0019] With the above setting method, when the soaking member presses against the buffer member, a certain space is reserved for the lateral deformation of the buffer member to prevent the buffer member from laterally extruding the side wall of the chip.

[0020] In some embodiments, a slot is formed on the surface of the soaking member facing the buffer member, the buffer member is inserted into the slot, and the abutting surface abuts against the bottom surface of the slot.

[0021] With the above setting method, since the buffer member is inserted into the slot and the buffer member and the slot are mutually blocked and matched, it can play a limiting role on the soaking member.

[0022] In some embodiments, the included angle between the side wall of the slot close to the chip and the surface of the soaking member facing the chip is α, and α satisfies: α≥90°.

[0023] With the above setting method, the side wall of the slot is inclined towards the center direction of the soaking member, which can reduce the thickness of the edge of the soaking member, increase the deformation amount of the soaking member, and reduce the stress on the chip.

[0024] In some embodiments, a first heat-conducting coating is provided on both the surface of the soaking member facing the chip and the surface facing away from the chip, and the thermal interface material layer is provided on the first heat-conducting coating on the surface of the soaking member facing the chip;

[0025] Alternatively, a cavity is provided inside the soaking member, at least one heat-conducting column is provided in the cavity, both ends of the heat-conducting column are respectively fixed to the inner walls on both sides of the cavity in the thickness direction of the soaking member, the heat-conducting column divides the cavity into several sub-cavities, and the inner walls of the sub-cavities are provided with a second heat-conducting coating.

[0026] By providing soaking members with different structural forms, soaking members with different structural forms can be selected in different application scenarios to achieve different heat-conducting performances. By providing the first heat-conducting coating, the heat-conducting performance of the soaking member can be enhanced. By providing the cooperation of the cavity, the heat-conducting column and the second heat-conducting coating, while reducing the weight of the soaking member, the heat-conducting performance of the soaking member is enhanced.

[0027] In some embodiments, a first clamping portion is provided on the inner side of the fixing ring, the connecting member is annular, a second clamping portion matching the first clamping portion is provided on the outer side of the connecting member, and the outer side of the connecting member is clamped with the fixing ring; a pressing portion is provided on the inner side of the connecting member, and the pressing portion presses against the soaking member.

[0028] The fixed ring and the connecting member are set to be in a snap - fit connection form, and the connecting member and the heat - spreading member are set to be in a pressing connection manner, which facilitates the disassembly and installation of the connecting member. Moreover, since there are no additional connecting components between the connecting member and the heat - spreading member, after the connection between the connecting member and the fixed ring is released, the connecting member and the heat - spreading member are naturally separated, facilitating the disassembly and replacement of the heat - spreading member.

[0029] In some embodiments, a notch is provided on the outer periphery of the surface of the heat - spreading member facing away from the chip. The pressing portion extends along the inner end surface of the connecting member towards the heat - spreading member and presses into the notch, so that the upper surface of the pressing portion is flush with the upper surface of the heat - spreading member.

[0030] By providing the notch, the upper surface of the pressing portion is flush with the heat - spreading member, and further the surface of the connecting member is flush with the heat - spreading member, avoiding the uneven connection between the heat - spreading member and the connecting member from causing the snap - fit installation of the external radiator.

[0031] In some embodiments, a card slot with a notch facing the chip is provided on the inner end surface of the fixed ring. The card slot forms the first snap - fit portion, and a convex block protruding towards the fixed ring is provided on the outer end surface of the connecting member. The convex block forms the second snap - fit portion.

[0032] The connection between the connecting member and the fixed ring is realized by the convex block being stuck in the card slot. The connection method is simple and convenient to operate, and the structures of the connecting member and the fixed ring are simple and easy to be manufactured and formed.

[0033] Another aspect of the present application is to provide an electronic device, including the semiconductor packaging structure as described above.

[0034] The reliability of the chip in the semiconductor packaging structure is relatively high, which will correspondingly extend the service life and reliability of the electronic device, and avoid the influence of the chip failure on the performance of the electronic device in the electronic device.

[0035] Another aspect of the present application is to provide a packaging method for a semiconductor packaging structure, including the following steps:

[0036] Install a fixed ring and a chip on a substrate;

[0037] Fix a buffer member on the substrate, and make the buffer member located on the outer peripheral side of the chip;

[0038] Solder the substrate onto a printed circuit board;

[0039] Apply a thermal interface material layer on the heat - spreading member, and install the heat - spreading member on the buffer member, so that the heat - spreading member is in contact with the buffer member, and the thermal interface material layer is in contact with the chip;

[0040] Connect the heat - spreading member and the fixed ring through a connecting member.

[0041] In the above encapsulation method, the coating process of the thermal interface material layer is placed after the processes of high-temperature ball planting on the substrate and soldering the printed circuit board, which can avoid problems such as high-temperature degradation, delamination, cracking, and thermal failure of the thermal interface material, and improve the reliability of the encapsulation structure.

[0042] Compared with the prior art, the beneficial effects of an embodiment of the semiconductor encapsulation structure and the electronic device of the present utility model are as follows:

[0043] The semiconductor encapsulation structure of the embodiment of the present utility model includes a substrate, a fixing ring, a chip, a heat sink, a thermal interface material layer, a connecting member, and a buffer member. The fixing ring is fixed around the substrate to form a bearing base for the heat sink and the connecting member; the thermal interface material layer is fixed on the heat sink, the connecting member is detachably connected between the heat sink and the fixing ring, and the buffer member is arranged on the substrate and abuts against the heat sink. In this application, the existing cover plate structure is split into three parts: a fixing ring, a connecting member, and a heat sink. The connecting member is detachably connected to the fixing ring and the heat sink, and the thermal interface material layer is connected to the heat sink as a whole. When the thermal interface material layer is delaminated, cracked, or its performance degrades during the high-temperature ball planting, chip board soldering process, and long-term operation of the chip, by removing the connecting member, the heat sink and the thermal interface material layer can be detached from the chip as a whole, so as to facilitate timely replacement of the thermal interface material layer on the heat sink, avoid the chip from gradually deteriorating and failing with the degradation of the performance of the thermal interface material layer, improve the service life of the chip and the reliability of long-term operation, and avoid chip thermal failure. On the other hand, in this application, the heat sink abuts against the buffer member, and the buffer member bears the abutting stress, so that the heat sink does not directly abut against the chip, which can slow down the stress on the chip when the external radiator is buckled, avoid the chip from being damaged due to excessive stress, and improve the reliability of the chip's long-term operation.

[0044] Moreover, since the heat sink in this application is connected to the fixing ring through the connecting member, and the heat sink and the thermal interface material layer are placed on the chip as a whole, according to the chip heat dissipation requirements in different application scenarios, the thermal conductivity of the heat sink can be changed by replacing the type of the heat sink, thereby changing the heat transfer performance of the whole of the heat sink and the thermal interface material layer, changing the heat dissipation capacity of the encapsulation structure, so as to improve the adaptability of the encapsulation structure in different scenarios and facilitate reasonable configuration of the chip heat dissipation cost. Description of the Drawings

[0045] Figure 1 is a schematic diagram of an encapsulation structure in the prior art;

[0046] Figure 2 is a schematic diagram of the semiconductor encapsulation structure described in the embodiment of this application;

[0047] Figure 3 is a schematic diagram of the heat sink in an embodiment of this application;

[0048] Figure 4 It is a schematic diagram of a heat spreader in another embodiment of the present application;

[0049] Figure 5 It is a schematic diagram of a heat spreader in yet another embodiment of the present application;

[0050] Figure 6 It is a schematic diagram of a heat spreader in yet another embodiment of the present application;

[0051] Figure 7 It is a schematic illustration of the packaging process of the semiconductor packaging structure described in the embodiments of the present application Figure 1 ;

[0052] Figure 8 It is a schematic illustration of the packaging process of the semiconductor packaging structure described in the embodiments of the present application Figure 2 ;

[0053] Figure 9 It is a schematic illustration of the packaging process of the semiconductor packaging structure described in the embodiments of the present application Figure 3 ;

[0054] Figure 10 It is a schematic illustration of the packaging process of the semiconductor packaging structure described in the embodiments of the present application Figure 4 .

[0055] Reference numerals in the figure:

[0056] 1. Substrate; 11. Solder ball; 12. Chip installation area; 2. Fixed ring; 21. First clamping portion; 22. Card slot; 3. Chip; 4. Heat spreader; 41. Slot; 42. Notch; 43. First thermal conductive coating; 44. Cavity; 441. Sub-cavity; 45. Thermal conductive column; 46. Second thermal conductive coating; 5. Thermal interface material layer; 6. Connecting member; 61. Second clamping portion; 62. Pressing portion; 63. Protrusion; 7. Buffer member; 71. Contact surface; 8. Printed circuit board; 9. Cover plate. Detailed implementation manners

[0057] In the description of the present invention, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation of the present invention. In addition, the terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0058] In the description of the present utility model, it should be noted that unless otherwise clearly specified and defined, the terms "installation", "connection", and "coupling" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a direct connection, or an indirect connection through an intermediate medium, and it may be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0059] The following will further describe in detail the specific implementation manners of the present utility model with reference to the drawings and embodiments. The following embodiments are used to illustrate the present utility model, but are not used to limit the scope of the present utility model.

[0060] Referring to Figure 2 and Figure 3 As shown, an embodiment of the present utility model provides a semiconductor package structure, including a substrate 1, a fixing ring 2, a chip 3, a heat spreader 4, a thermal interface material layer 5, a connecting member 6, and a buffer member 7. The fixing ring 2 is fixedly disposed on one side surface of the substrate 1 to enclose a chip installation area 12 on the substrate 1. The inner space of the fixing ring 2 forms the chip installation area 12. The chip 3 is disposed in the chip installation area 12 and is electrically connected to the substrate 1. The heat spreader 4 is disposed on the side of the chip 3 facing away from the substrate 1. The thermal interface material layer 5 is disposed on the side of the heat spreader 4 facing the chip 3, and the thermal interface material layer 5 is in contact with the chip 3. The connecting member 6 is detachably connected between the heat spreader 4 and the fixing ring 2. The buffer member 7 is fixed to the side of the substrate 1 facing the chip 3. The side of the buffer member 7 facing away from the substrate 1 has an abutting surface 71, and the side of the heat spreader 4 facing the chip 3 abuts on the abutting surface 71.

[0061] The fixing ring 2 is fixed to the periphery of the substrate 1 to form a bearing base for the heat sink 4 and the connecting member 6. The heat sink 4 is connected and fixed to the fixing ring 2 through the connecting member 6, so that the fixing ring 2, the connecting member 6 and the heat sink 4 are connected into an integral cover plate structure. The cover plate structure is covered on the substrate 1 and encloses the chip 3. In this application, the existing cover plate structure is split into three parts: the fixing ring 2, the connecting member 6 and the heat sink 4. The connecting member 6 is detachably connected to the fixing ring 2 and the heat sink 4, and the thermal interface material layer 5 is integrally connected to the heat sink 4. When the thermal interface material layer 5 is delaminated, cracked or its performance degrades during the high-temperature ball planting, chip-on-board soldering process and long-term operation of the chip 3, by removing the connecting member 6, the heat sink 4 and the thermal interface material layer 5 can be detached from the chip 3 as a whole, so as to facilitate the timely replacement of the thermal interface material layer 5 on the heat sink 4, avoid the chip 3 from gradually deteriorating and failing as the performance of the thermal interface material layer 5 degrades, improve the service life and long-term operation reliability of the chip 3, and avoid thermal failure of the chip 3. On the other hand, in this application, the heat sink 4 is abutted against the buffer member 7, and the buffer member 7 has a certain elasticity and can be compressed. By the buffer member 7 bearing the abutting stress, the heat sink 4 will not directly abut on the chip 3, which can slow down the stress on the chip 3 when the external radiator is buckled, avoid the chip 3 from being damaged due to excessive stress, and improve the long-term operation reliability of the chip. Moreover, since the heat sink 4 is placed on the substrate 1 through the buffer member 7, a normalized heat sink design can be adopted for substrates 1 of different sizes and different structures, which has universality. By changing the sizes of the connecting member 6 and the fixing ring 2, the cover plate structure formed by the connecting member 6, the fixing ring 2 and the heat sink 4 can be adapted to the substrate 1.

[0062] Moreover, since the heat sink 4 in this application is connected to the fixing ring 2 through the connecting member 6, and the heat sink 4 and the thermal interface material layer 5 are placed on the chip 3 as a whole, according to the chip heat dissipation requirements in different application scenarios, the thermal conductivity of the heat sink 4 can be changed by replacing the type of the heat sink 4, and then the heat transfer performance of the whole heat sink 4 and the thermal interface material layer 5 can be changed, and the heat dissipation capacity of the packaging structure can be changed, so as to improve the adaptability of the packaging structure in different scenarios and facilitate the reasonable allocation of chip heat dissipation costs. For example, for application scenarios with high reliability requirements, a heat pipe with high performance can be adopted for the heat sink design.

[0063] In some embodiments, the substrate 1 is in the shape of a rectangular parallelepiped plate. One side of the substrate 1 facing away from the chip 3 can be electrically connected to the printed circuit board 8 through solder balls 11.

[0064] In some embodiments, the fixing ring 2 is in a ring shape and is fixed at the edge position of the substrate 1. The outer edge of the fixing ring 2 is flush with the edge of the substrate 1. Refer to Figure 2As shown, a first clamping portion 21 is provided on the inner side of the fixing ring 2. The connecting member 6 is annular, and a second clamping portion 61 matching the first clamping portion 21 is provided on the outer side of the connecting member 6. The outer side of the connecting member 6 is clamped with the fixing ring 2. A pressing portion 62 is provided on the inner side of the connecting member 6, and the pressing portion 62 presses against the heat sink 4. The connecting member 6 and the fixing ring 2 are connected by clamping, and the connecting member 6 and the heat sink 4 are connected by pressing, which facilitates the disassembly and installation of the connecting member 6. Moreover, since there is no additional connecting component between the connecting member 6 and the heat sink 4, after the connection between the connecting member 6 and the fixing ring 2 is released, the connecting member 6 and the heat sink 4 are naturally separated, facilitating the disassembly and replacement of the heat sink 4. The pressing portion 62 presses against the heat sink 4 from top to bottom, providing a downward pressing force to the heat sink 4, so that the thermal interface material layer 5 on the heat sink 4 is stably attached to the chip 3. The pressing portion 62 can be arranged to extend along the circumferential direction of the heat sink 4, so that the heat sink 4 bears the downward pressing force of the pressing portion 62 in the circumferential direction, improving the stability of the heat sink 4.

[0065] There are various ways for the first clamping portion 21 and the second clamping portion 61 to achieve clamping. Refer to Figure 2 As shown, in some embodiments, a clamping groove 22 with a notch facing the chip 3 is provided on the inner end face of the fixing ring 2, and the clamping groove 22 forms the first clamping portion 21. A convex block 63 protruding towards the fixing ring 2 is provided on the outer end face of the connecting member 6, and the convex block 63 forms the second clamping portion 61. When installing the connecting member 6, the convex block 63 is stuck in the clamping groove 22 to achieve the clamping connection between the connecting member 6 and the fixing ring 2. With this clamping method, the notch of the clamping groove 22 faces the chip 3, which facilitates the clamping operation and disassembly operation of the connecting member 6. Moreover, the groove wall of the clamping groove 22 can block and limit the convex block 63, keeping the connecting member 6 stable, and thus keeping the heat sink 4 stable. To facilitate the manufacturing and forming of the first clamping portion 21, the radial cross-section of the fixing ring 2 is in an L-shaped structure. One part of the L-shaped structure is fixed on the substrate 1, and the other part is spaced from the substrate 1 to form the clamping groove 22, and the surface of the substrate 1 serves as one of the groove walls of the clamping groove 22. To facilitate the insertion of the convex block 63 into the clamping groove 22, the surface of the convex block 63 facing the fixing ring 2 is an arc surface. In other embodiments, the connecting member 6 and the fixing ring 2 can also adopt a connection method of assembling a clamping sleeve and a clamping head.

[0066] In some embodiments, the heat sink 5 is plate-shaped. Refer to Figure 2 - Figure 6As shown, a notch 42 is provided on the outer periphery of the side of the soaking member 4 facing away from the chip 3. The pressing portion 62 extends along the inner end surface of the connecting member 6 towards the soaking member 4 and presses against the notch 42, so that the upper surface of the pressing portion 62 is flush with the upper surface of the soaking member 4. When the first engaging portion 21 and the second engaging portion 61 are engaged, the pressing portion 62 presses against the notch 42 from top to bottom, applying pressure to the soaking member 4 to keep the soaking member 4 stable. Moreover, through the notch 42, an avoidance space can be provided for the pressing portion 62 to prevent the pressing portion 62 from protruding from the surface of the soaking member 4, which may cause the connection between the soaking member 4 and the connecting member 6 to be uneven and further affect the snap-on installation of the external radiator. The upper surface of the pressing portion 62 is flush with the upper surface of the soaking member 4, and the upper surface of the connecting member 6 is flush with the upper surface of the fixing ring 2, so that the surfaces of the cover plate structure formed by the connecting member 6, the fixing ring 2, and the soaking member 4 are flush, without affecting the setting of other components on this cover plate structure. When the pressing portion 62 presses against the notch 42, the inner end surface of the connecting member 6 fits against the side surface of the soaking member 4, preventing a gap between the inner end surface of the connecting member 6 and the side surface of the soaking member 4, which may result in weak strength at the position of the pressing portion 62 corresponding to this gap and affect the strength of this cover plate structure.

[0067] In order to reduce the overall weight of the package and improve the reliability of the long-term operation of the chip, the connecting member 6 is designed to be thin and light. For example, it is made of thin plates, plastics, or carbon fiber materials.

[0068] Refer to Figure 2 and Figure 8 As shown, in some embodiments, the height position of the abutting surface 71 on the buffer member 7 is higher than the height position of the upper surface of the chip 3, so that a certain installation space for the thermal interface material layer 5 can be reserved between the upper surface of the chip 3 and the soaking member 4. Moreover, by controlling the height difference between the upper surface of the chip 3 and the abutting surface 71 of the buffer member 7, the installation thickness of the thermal interface material layer 5 can be controlled, reducing the heat transfer thermal resistance between the chip 3 and the soaking member 4 and improving the heat dissipation performance of the chip 3, further enhancing the reliability of the chip operation. Optionally, the height position of the abutting surface 71 on the buffer member 7 is 0.1 mm to 1.5 mm higher than the upper surface of the chip 3. When the thermal interface material layer 5 is coated on the soaking member 4, the thickness of the thermal interface material layer is greater than 0.1 mm, and the coverage area is greater than 85% of the chip size. When the soaking member 4 is abutted against the buffer member 7, since the buffer member 7 has a certain elasticity and can be compressed, through the height difference between the abutting surface 71 of the buffer member 7 and the upper surface of the chip 3, the thickness of the thermal interface material layer 5 after being fitted to the chip 3 can be controlled to be no greater than 0.1 mm, reducing the heat transfer thermal resistance between the chip 3 and the soaking member 4.

[0069] In some embodiments, a plurality of buffer members 7 are provided. The plurality of buffer members 7 are spaced apart on the outer peripheral side of the chip 3, and there is a gap between the surface of each buffer member 7 facing the chip 3 and the side wall of the chip 3. This gap can reserve a certain space for the lateral deformation of the buffer member 7 when the heat spreader 4 presses against the buffer member 7, avoiding the buffer member 7 laterally squeezing the side wall of the chip 3. The buffer member 7 is a buffer pad structure. One buffer member 7 can be provided, and the buffer member 7 is annular and arranged around the chip 3. A plurality of buffer members 7 can also be provided, and the plurality of buffer members 7 are spaced apart along the circumferential direction of the chip 3. Refer to Figure 8 As shown, the width of the gap is L, and L satisfies: 1.0 mm ≤ L ≤ 3.0 mm. Setting the gap within this range can improve the stress mitigation effect of the buffer member 7 on the chip 3.

[0070] Refer to Figure 2 - Figure 6 As shown, in some embodiments, a slot 41 is formed on the surface of the heat spreader 4 facing the buffer member 7. The buffer member 7 is inserted into the slot 41 and the abutting surface 71 abuts against the bottom surface of the slot 41. Through the cooperation of the slot 41 and the buffer member 7, the heat spreader 4 can be limited, restricting the movement of the heat spreader 4 within its plane. Refer to Figure 4 As shown, the included angle between the side wall of the slot 41 close to the chip 3 and the surface of the heat spreader 4 facing the chip 3 is a, and a satisfies: a ≥ 90°. The side wall of the slot 41 close to the chip 3 is inclined towards the center direction of the heat spreader, thinning the thickness of the edge of the heat spreader 4, increasing the deformation amount of the heat spreader 4, and reducing the stress on the chip.

[0071] In order to facilitate changing the thermal conductivity of the heat spreader 4 according to the chip heat dissipation requirements in different application scenarios, the heat spreader 4 has various forms, and when replacing the type of the heat spreader 4, there is no need to re - design the packaging structure. Refer to Figure 3 As shown, in some embodiments, the heat spreader 4 is in a plate shape and is made of copper. Figure 5 As shown, in some other embodiments, first thermal conductive coatings 43 are provided on both the surface of the heat spreader 4 facing the chip 3 and the surface facing away from the chip 3. The thermal interface material layer 5 is provided on the first thermal conductive coating 43 on the surface of the heat spreader 4 facing the chip 3. Through the first thermal conductive coating 43, the thermal conductivity of the heat spreader 4 can be enhanced, thereby improving the heat dissipation performance of the chip. The first thermal conductive coating 43 is a diamond coating, making the thermal conductivity of this heat spreader 4 better than that of the heat spreader 4 made of copper material. It should be noted that when slots 41 and notches 42 are provided on the heat spreader 4, the setting of the first thermal conductive coating 43 avoids the positions of the slots 41 and notches 42.

[0072] Refer to Figure 6As shown, in some other embodiments, the heat spreader 4 is a VC plate. A cavity 44 is provided inside the heat spreader 4, and at least one heat conduction column 45 is provided in the cavity 44. Both ends of the heat conduction column 45 are respectively fixed to the inner walls on both sides of the cavity 44 in the thickness direction of the heat spreader 4. The heat conduction column 45 divides the cavity 44 into several sub-cavities 441, and a second heat conduction coating 46 is provided on the inner wall of the sub-cavity 441. The second heat conduction coating 46 is a copper powder layer, and the heat conduction column 45 is a copper column. The copper column not only plays a heat conduction role but also plays a supporting role. By providing the cavity 44, the weight of the heat spreader 4 can be reduced, thereby reducing the overall weight of the package. Combining the cavity 44 with the heat conduction column 45 and the second heat conduction coating 46 can enhance the heat conduction performance of the heat spreader 4 while reducing its weight.

[0073] The encapsulation process of the semiconductor package structure of the present utility model is as follows: Refer to Figure 7 As shown, a fixing ring 2 and a chip 3 are installed on the substrate 1, and solder balls 11 are implanted on the side of the substrate 1 facing away from the chip 3; Refer to Figure 8 As shown, a fixing buffer 7 is mounted on the substrate 1. The buffer 7 is located on the outer peripheral side of the chip 3, and there is a gap between the side of the buffer 7 facing the chip 3 and the side wall of the chip 3; Refer to Figure 9 As shown, the substrate 1 is soldered to the printed circuit board 8 through the solder balls 11; Refer to Figure 10 As shown, a thermal interface material layer 5 is coated on the heat spreader 4, and the heat spreader 4 is installed on the buffer 7. The heat spreader 4 abuts against the buffer 7, and the thermal interface material layer 5 is made to fit with the chip 3; Refer to Figure 2 As shown, the heat spreader 4 is connected to the fixing ring 2 through the connecting member 6. Specifically, the pressing portion 62 of the connecting member 6 is placed in the notch 42 of the heat spreader 4, and the convex block 63 of the connecting member 6 is stuck in the card slot 22 of the fixing ring 2. Among them, placing the coating process of the thermal interface material layer 5 after the processes of high-temperature ball implantation on the substrate 1 and soldering the printed circuit board 8 can avoid problems such as high-temperature degradation, delamination, cracking, and thermal failure of the thermal interface material, thereby improving the reliability of the package structure.

[0074] When it is necessary to replace the thermal interface material layer 5, the connection between the connecting member 6 and the fixing ring 2 is released. After separating the connecting member 6 from the heat spreader 4, the heat spreader 4 and the thermal interface material layer 5 are integrally disassembled from the chip 3. Then, the heat spreader 4 coated with the thermal interface material layer 5 is reinstalled on the buffer 7. After the thermal interface material layer 5 is made to fit with the chip 3, the connection between the connecting member 6, the fixing ring 2, and the heat spreader 4 is reassembled.

[0075] The semiconductor package structure of the present application is applicable to the encapsulation of single-wafer or multi-wafer coupled packaged chips.

[0076] The present application also provides an electronic device, including the semiconductor packaging structure as described above. For the electronic device adopting the above semiconductor packaging structure, since the reliability of the chips in the semiconductor packaging structure is relatively high, the service life and reliability of the electronic device will be correspondingly extended, and the use performance of the electronic device affected by chip failure can be avoided.

[0077] In summary, the embodiment of the present utility model provides a semiconductor packaging structure and an electronic device. The existing cover plate structure is split into three parts: a fixing ring 2, a connecting member 6, and a heat sink 4. The connecting member 6 is detachably connected to the fixing ring 2 and the heat sink 4, and the thermal interface material layer 5 is connected to the heat sink 4 as a whole. When the thermal interface material layer 5 is delaminated, cracked or its performance degrades during the high-temperature ball planting, chip-on-board soldering process and long-term operation of the chip 3, by removing the connecting member 6, the heat sink 4 and the thermal interface material layer 5 can be detached from the chip 3 as a whole, so as to facilitate the timely replacement of the thermal interface material layer 5 on the heat sink 4, avoid the gradual deterioration and failure of the chip 3 with the degradation of the performance of the thermal interface material layer 5, improve the service life of the chip 3 and the reliability of long-term operation, and avoid thermal failure of the chip 3. On the other hand, in the present application, the heat sink 4 is abutted against the buffer member 7, and the buffer member 7 bears the abutting stress, so that the heat sink 4 does not directly abut against the chip 3, which can slow down the stress on the chip 3 when the external radiator is buckled, avoid damage to the chip 3 due to excessive stress, and improve the reliability of the chip during long-term operation.

[0078] Moreover, since the heat sink 4 in the present application is connected to the fixing ring 2 through the connecting member 6, and the heat sink 4 and the thermal interface material layer 5 are placed on the chip 3 as a whole, according to the chip heat dissipation requirements in different application scenarios, the thermal conductivity of the heat sink 4 can be changed by replacing the type of the heat sink 4, thereby changing the heat transfer performance of the whole of the heat sink 4 and the thermal interface material layer 5, changing the heat dissipation capacity of the packaging structure, so as to improve the adaptability of the packaging structure in different scenarios and facilitate the reasonable allocation of chip heat dissipation costs.

[0079] The above are only the preferred embodiments of the present utility model. It should be noted that for those of ordinary skill in the art, without departing from the technical principle of the present utility model, several improvements and replacements can be made, and these improvements and replacements should also be regarded as the protection scope of the present utility model.

Claims

1. A semiconductor packaging structure, characterized in that: include: base(1); A fixing ring (2) fixedly arranged on a side surface of the substrate (1) to enclose a chip mounting area (12) on the substrate (1); A chip (3) is disposed in the chip mounting area (12) and is electrically connected to the substrate (1); A heat spreader (4) is disposed on a side of the chip (3) facing away from the substrate (1); A thermal interface material layer (5) is provided on a side of the heat spreader (4) facing the chip (3), and the thermal interface material layer (5) is bonded to the chip (3); A connecting member (6) detachably connected between the heat equalizing member (4) and the fixing ring (2); and A buffer member (7), the buffer member (7) being fixed to a side of the substrate (1) facing the chip (3), the side of the buffer member (7) facing away from the substrate (1) having a contact surface (71), and a side of the heat spreader (4) facing the chip (3) being in contact with the contact surface (71).

2. The semiconductor package structure according to claim 1, wherein: The height position of the abutting surface (71) is higher than the height position of the upper surface of the chip (3).

3. The semiconductor package structure according to claim 1, wherein: A plurality of the buffer members (7) are provided, and the plurality of the buffer members (7) are arranged at intervals on the outer peripheral side of the chip (3), and a gap is provided between a surface of each buffer member (7) facing the chip (3) and a side wall of the chip (3).

4. The semiconductor package structure according to any one of claims 1 to 3, characterized in that: A slot (41) is provided on one side of the heat equalizing member (4) facing the buffer member (7); the buffer member (7) is inserted into the slot (41) and the abutting surface (71) abuts against the bottom surface of the slot (41).

5. The semiconductor package structure according to claim 4, characterized in that: The angle between a side wall of the slot (41) close to the chip (3) and a side of the heat spreader (4) facing the chip (3) is a, and a satisfies: a≥90°.

6. The semiconductor package structure according to claim 1, wherein: The heat spreader (4) is provided with a first thermal conductive coating (43) on one side facing the chip (3) and on the other side facing away from the chip (3); the thermal interface material layer (5) is provided on the first thermal conductive coating (43) on the side of the heat spreader (4) facing the chip (3); Alternatively, a cavity (44) is provided inside the heat-leveling member (4), at least one heat-conducting column (45) is provided inside the cavity (44), two ends of the heat-conducting column (45) are respectively fixed to inner walls of the cavity (44) on both sides in the thickness direction of the heat-leveling member (4), the heat-conducting column (45) divides the cavity (44) into a plurality of sub-cavities (441), and inner walls of the sub-cavities (441) are provided with a second heat-conducting coating (46).

7. The semiconductor package structure according to claim 1, wherein: A first clamping portion (21) is provided on the inner side of the fixing ring (2); the connecting piece (6) is ring-shaped; a second clamping portion (61) matching the first clamping portion (21) is provided on the outer side of the connecting piece (6); the outer side of the connecting piece (6) is clamped with the fixing ring (2); and a pressing portion (62) is provided on the inner side of the connecting piece (6); the pressing portion (62) presses against the heat equalizing piece (4).

8. The semiconductor package structure according to claim 7, characterized in that: A notch (42) is provided on the outer periphery of a side of the heat equalizing member (4) facing away from the chip (3), and the pressing portion (62) extends along the inner end surface of the connecting member (6) toward the heat equalizing member (4) and presses against the notch (42) so that the upper surface of the pressing portion (62) is flush with the upper surface of the heat equalizing member (4).

9. The semiconductor package structure according to claim 7, wherein: The inner end surface of the fixing ring (2) is provided with a slot (22) with a notch facing the chip (3), and the slot (22) forms the first clamping portion (21). The outer end surface of the connecting piece (6) is provided with a convex block (63) protruding toward the fixing ring (2), and the convex block (63) forms the second clamping portion (61).

10. An electronic device comprising the semiconductor packaging structure according to any one of claims 1 to 9.

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