High-density interconnection hole chain printed circuit board and new energy automobile circuit board

Abstract

The utility model provides a high-density interconnection hole chain printed circuit board and a new energy automobile circuit board. The high-density interconnection hole chain printed circuit board comprises a high-density interconnection printed mainboard and a hole chain test assembly. The hole chain test assembly comprises a high-density interconnection hole chain test board and a hole chain wire, the high-density interconnection hole chain test board is located on the side edge of the high-density interconnection printed mainboard, the high-density interconnection hole chain test board is provided with a hole chain test area, and a plurality of hole chain test points are arranged in the hole chain test area; the hole chain wire is used for electrically connecting two adjacent hole chain test points so as to form a circulating test hole link. The hole chain testing area is arranged on the side edge of the high-density interconnection printed main board, the hole chain testing area can be directly cut and removed after testing is completed, the area occupied by the board face of a circuit board is reduced, the testing cost can be effectively reduced, the formed testing hole chain circuit is in a circulating type, hole chain wiring is simple, the wiring mode is convenient, and therefore the testing difficulty is reduced.

Description

Technical Field

[0001] The present disclosure relates to the technical field of circuit boards, and in particular to a high-density interconnect via chain printed circuit board and a new energy vehicle circuit board. Background Art

[0002] An HDI circuit board, also known as a high-density interconnect board, refers to a printed circuit board with a hole diameter of less than 6 mils, an annular diameter of the hole ring of less than 0.25 mm, a contact density of more than 130 points per square inch, and a line width / space of 3 mils / 3 mils or less. The HDI circuit board can reduce the production cost of multi-layer PCB boards, increase the line density, and has advantages such as high reliability and good electrical performance. In the current process of manufacturing copper plating for HDI boards, the entire board is electroplated, and the surface copper is electroplated simultaneously during the process of plating hole copper. This operation method is not only cumbersome but also may cause uneven thickness of the surface copper, affecting the quality of the circuit board. Chinese Patent CN112752434A discloses a new electroplating via filling process method for HDI circuit boards, which includes processes such as attaching a dielectric layer, drilling, desmearing, sputtering, laminating, exposing, developing, and electroplating.

[0003] During the production process of existing HDI-PCB boards, problems such as insufficient copper thickness in holes, separation of ICD (Innerconnection defects, inner layer interconnect defects), residual glue at the bottom of blind holes, and cracking at the bottom of blind holes cannot be detected for a long time, resulting in phenomena such as circuit disconnection during the use of the product, bringing extremely poor user experience and potential safety hazards to the end user, and causing huge compensation to PCB board manufacturing enterprises. The traditional method for detecting problems in HDI blind holes is to design a simple via link as a COUPON and use a high-current tester for single-point testing. However, this via link COUPON test strip cannot effectively reflect the open and short circuit problems between the lines and holes, and between layers of the HDI board, and the test accuracy is poor. Moreover, the via link wiring of the COUPON test strip is messy, resulting in too high test costs. Summary of the Utility Model

[0004] The purpose of the present disclosure is to overcome the deficiencies in the prior art and provide a high-density interconnect via chain printed circuit board and a new energy vehicle circuit board that can effectively reduce test costs and improve test accuracy.

[0005] The purpose of the present disclosure is achieved through the following technical solutions:

[0006] A high-density interconnect via chain printed circuit board, comprising: a high-density interconnect printed main board and a via chain test component; the via chain test component includes a high-density interconnect via chain test board and via chain conductors, the high-density interconnect via chain test board is located on the side of the high-density interconnect printed main board, the high-density interconnect via chain test board has a via chain test area, and a plurality of via chain test points are arranged in the via chain test area, and the via chain conductors are used to electrically connect two adjacent via chain test points to form a cyclic test via link.

[0007] In one embodiment, the high-density interconnect via chain test board and the high-density interconnect printed main board are integrally formed.

[0008] In one embodiment, a plurality of the via chain test points are evenly distributed in the via chain test area.

[0009] In one embodiment, the distance between two adjacent via chain test points is 0.5 mm to 2 mm.

[0010] In one embodiment, the distance between two adjacent via chain test points is 1 mm.

[0011] In one embodiment, the via chain test points are through holes, and the via chain conductors include first inner layer via chain lines and first outer layer via chain lines. The first inner layer via chain lines are used to electrically connect the hole walls of two adjacent through holes on the inner layer board of the high-density interconnect via chain test board, and the first outer layer via chain lines are used to electrically connect the hole walls of two adjacent through holes on the two outer layer boards of the high-density interconnect via chain test board.

[0012] In one embodiment, the via chain test points are blind holes, and the via chain conductors include second outer layer via chain lines. The second outer layer via chain lines are used to electrically connect the hole walls of two adjacent blind holes on the two outer layer boards of the high-density interconnect via chain test board.

[0013] In one embodiment, the via chain test points are buried holes, and the via chain conductors include second inner layer via chain lines. The second inner layer via chain lines are used to electrically connect the hole walls of two adjacent buried holes on the inner layer board of the high-density interconnect via chain test board.

[0014] In one embodiment, the test via link formed by a plurality of the via chain test points has a reciprocating "S" shape structure.

[0015] A new energy vehicle circuit board, comprising the high-density interconnect via chain printed circuit board according to any one of the above embodiments.

[0016] Compared with the prior art, the present disclosure has at least the following advantages:

[0017] By setting a via chain test area on the side of a high-density interconnect printed circuit board, it can be directly cut off and removed after the test is completed, reducing the occupied area of the circuit board surface, effectively reducing the test cost. Moreover, the formed test via link is circular, making the via chain routing concise and the wiring method convenient, thus reducing the test difficulty. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present disclosure, and thus should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.

[0019] Figure 1 It is a schematic diagram of a high-density interconnect via chain printed circuit board in an embodiment;

[0020] Figure 2 is Figure 1 The inner layer routing diagram of the high-density interconnect via chain test board in the shown high-density interconnect via chain printed circuit board;

[0021] Figure 3 is Figure 1 The outer layer routing diagram of the high-density interconnect via chain test board in the shown high-density interconnect via chain printed circuit board. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0022] To facilitate the understanding of the present disclosure, the present disclosure will be described more comprehensively below with reference to the relevant drawings. Preferred embodiments of the present disclosure are shown in the drawings. However, the present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the understanding of the disclosure content of the present disclosure more thorough and comprehensive.

[0023] It should be noted that when an element is referred to as being "fixed to" another element, it can be directly on the other element or there can also be an intermediate element. When an element is considered to be "connected" to another element, it can be directly connected to the other element or there may be an intermediate element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are only for the purpose of illustration and do not represent the only embodiments.

[0024] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terms used in the description of this disclosure herein are for the purpose of describing specific embodiments only and are not intended to limit this disclosure. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0025] This disclosure relates to a high-density interconnect via chain printed circuit board. In one embodiment, the high-density interconnect via chain printed circuit board includes a high-density interconnect printed main board and a via chain test component; the via chain test component includes a high-density interconnect via chain test board and via chain conductors. The high-density interconnect via chain test board is located on the side of the high-density interconnect printed main board. The high-density interconnect via chain test board has a via chain test area, and a plurality of via chain test points are arranged in the via chain test area. The via chain conductors are used to electrically connect two adjacent via chain test points to form a cyclic test via link. By arranging the via chain test area on the side of the high-density interconnect printed main board, it can be directly cut off and removed after the test is completed, reducing the occupied area of the circuit board surface, effectively reducing the test cost. Moreover, the formed test via link is cyclic, making the via chain routing simple and the wiring method convenient, thus reducing the test difficulty.

[0026] Please refer to Figure 1 , which is a schematic structural diagram of a high-density interconnect via chain printed circuit board according to an embodiment of this disclosure.

[0027] A high-density interconnect via chain printed circuit board 10 according to an embodiment includes a high-density interconnect printed main board 100 and a via chain test component 200. The via chain test component 200 includes a high-density interconnect via chain test board 210 and via chain conductors 220. The high-density interconnect via chain test board 210 is located on the side of the high-density interconnect printed main board 100. The high-density interconnect via chain test board 210 has a via chain test area, and a plurality of via chain test points 202 are arranged in the via chain test area. The via chain conductors 220 are used to electrically connect two adjacent via chain test points 202 to form a cyclic test via link.

[0028] In this embodiment, by arranging the via chain test area on the side of the high-density interconnect printed main board 100, it can be directly cut off and removed after the test is completed, reducing the occupied area of the circuit board surface, effectively reducing the test cost. Moreover, the formed test via link is cyclic, making the via chain routing simple and the wiring method convenient, thus reducing the test difficulty.

[0029] In one embodiment, the high-density interconnect via chain test board 210 is integrally formed with the high-density interconnect printed main board 100. In this embodiment, the high-density interconnect via chain test board 210 serves as the test board for the high-density interconnect printed main board 100. The high-density interconnect via chain test board 210 has a hierarchical structure similar to that of the high-density interconnect printed main board 100. Specifically, the high-density interconnect via chain test board 210 and the high-density interconnect printed main board 100 are two parts on the same board, such that the high-density interconnect via chain test board 210 and the high-density interconnect printed main board 100 have the same hierarchy. Moreover, the board manufacturing process flows of the high-density interconnect via chain test board 210 and the high-density interconnect printed main board 100 are the same, such that the open / short circuit states between the lines and vias, and between layers on the high-density interconnect via chain test board 210 can directly reflect the open / short circuit states between the lines and vias, and between layers on the high-density interconnect printed main board 100.

[0030] In one embodiment, please refer to Figure 1 , a plurality of the via chain test points 202 are evenly distributed in the via chain test area. In this embodiment, the via chain test points 202 serve as the connection nodes of the test via link. By connecting the via chain test points 202 in series, the test via link connects the lines on each layer of the high-density interconnect via chain test board 210, facilitating the determination of the open / short circuit conditions between the lines and vias, and between layers on each layer of the high-density interconnect via chain test board 210. Moreover, the plurality of via chain test points 202 are evenly distributed. For example, the plurality of via chain test points 202 are arrayed in the via chain test area, and the distance between adjacent two via chain test points 202 is equal, facilitating rapid routing in the via chain test area.

[0031] In one embodiment, the distance between adjacent two via chain test points 202 is 0.5 mm to 2 mm. Specifically, the distance between adjacent two via chain test points 202 is 1 mm. By adjusting the distance between the via chain test points 202, the distribution of the via chain test points 202 is reasonably adjusted. This can not only fully set test points in the via chain test area, but also select specified test points according to requirements to form the required cyclic test via link. Specifically, the test via link formed by the plurality of via chain test points 202 has a reciprocating "S" shape structure. See the figure for details.

[0032] In one embodiment, please refer to Figure 2 and Figure 3, the via chain test point 202 is a through hole. The via chain conductor 220 includes a first inner layer via chain line 222 and a first outer layer via chain line 224. The first inner layer via chain line 222 is used to electrically connect the hole walls of two adjacent through holes on the inner layer board of the high-density interconnect via chain test board 210, and the first outer layer via chain line 224 is used to electrically connect the hole walls of two adjacent through holes on the two outer layer boards of the high-density interconnect via chain test board 210. In this embodiment, the via chain test point 202 is located in the via chain test area, and the test points in the via chain test area are the through holes thereon, that is, the test points are the holes penetrating the via chain test area, so that the via chain test point 202 corresponds to inner layer lines and outer layer lines. At this time, for different inner and outer levels, the inner layers are connected through the first inner layer via chain line 222, which is convenient for detecting the open and short circuit states between the inner layer lines and holes, and between the inner layers. Moreover, the upper and lower outer layers are also connected through the first outer layer via chain line 224, which is convenient for detecting the open and short circuit states between the outer layer lines and holes, and between the outer layers, effectively improving the test efficiency.

[0033] In another embodiment, the layers of the first inner layer via chain line that are spaced apart from each other are in an arithmetic progression. Taking a 10-layer board as an example, the cycling mode of the via chain is as follows: L1->L6->L2->L7->L3->L8->L4->L9->L5->L10. For details, see the appendix Figure 2 .

[0034] In another embodiment, the first outer layer via chain line reciprocates between the upper and lower outer layers in the via chain test area. Specifically, taking a 10-layer board as an example, the cycling mode of the via chain is as follows: L1->L10->L1->L10->L1->L10. For details, see the appendix Figure 3 .

[0035] In one embodiment, the via chain test point is a blind hole, and the via chain conductor includes a second outer layer via chain line. The second outer layer via chain line is used to electrically connect the hole walls of two adjacent blind holes on the two outer layer boards of the high-density interconnect via chain test board. In this embodiment, the via chain test point is located in the via chain test area, and the test points in the via chain test area are the blind holes thereon, that is, the test points are the grooves that do not penetrate the via chain test area, so that the via chain test point corresponds to some inner layer lines and outer layer lines. At this time, the test levels on the high-density interconnect via chain test board can be equivalently regarded as outer levels, and the current blind hole corresponding layers are connected through the second outer layer via chain line, which is convenient for detecting the open and short circuit states between the current layer lines and holes, and between the layers, effectively improving the test efficiency.

[0036] In one embodiment, the via chain test point is a buried via, and the via chain conductor includes a second inner layer via chain line, which is used to electrically connect the via walls of two adjacent buried vias on the inner layer board of the high-density interconnect via chain test board. In this embodiment, the via chain test point is located in the via chain test area, and the test point in the via chain test area is the buried via thereon, that is, the test point is the cavity built in the via chain test area, so that the via chain test point corresponds to an inner layer circuit. At this time, all the test levels on the high-density interconnect via chain test board can be equivalent to the inner layer levels, and the current buried via is connected to each corresponding layer through the second inner layer via chain line, which is convenient for detecting the open and short circuit states between the current inner layer level circuits and vias, and between the inner layers, effectively improving the test efficiency.

[0037] In one embodiment, the present disclosure relates to a circuit board for a new energy vehicle, including the high-density interconnect via chain printed circuit board described in any one of the above embodiments. In this embodiment, the high-density interconnect via chain printed circuit board includes a high-density interconnect printed main board and a via chain test component; the via chain test component includes a high-density interconnect via chain test board and a via chain conductor. The high-density interconnect via chain test board is located on the side of the high-density interconnect printed main board. The high-density interconnect via chain test board has a via chain test area, and a plurality of via chain test points are arranged in the via chain test area. The via chain conductor is used to electrically connect two adjacent via chain test points to form a cyclic test via link. By arranging the via chain test area on the side of the high-density interconnect printed main board, it can be directly cut off and removed after the test is completed, reducing the occupied area of the circuit board surface, effectively reducing the test cost. Moreover, the formed test via link is cyclic, making the via chain routing simple and the wiring method convenient, thus reducing the test difficulty.

[0038] The above embodiments only represent several implementation manners of the present disclosure. The description is relatively specific and detailed, but it should not be construed as a limitation on the patent scope of the present disclosure. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present disclosure, several modifications and improvements can still be made, and these all belong to the protection scope of the present disclosure. Therefore, the protection scope of the patent of the present disclosure shall be subject to the appended claims.

Claims

1. A high density interconnect hole chain printed circuit board, characterized in that: include: High density interconnect printed circuit board, A hole chain test component, the hole chain test component includes a high-density interconnection hole chain test board and a hole chain conductor, the high-density interconnection hole chain test board is located on the side of the high-density interconnection printed main board, the high-density interconnection hole chain test board has a hole chain test area, a plurality of hole chain test points are arranged in the hole chain test area, and the hole chain conductor is used to electrically connect two adjacent hole chain test points to form a circular test hole link.

2. The high density interconnect hole chain printed circuit board according to claim 1, characterized in that: The high-density interconnect hole chain test board is integrally formed with the high-density interconnect printed main board.

3. The high density interconnect hole chain printed circuit board according to claim 1, characterized in that: The plurality of hole chain test points are evenly distributed in the hole chain test area.

4. The high density interconnect hole chain printed circuit board according to claim 1, characterized in that: The distance between two adjacent hole chain test points is 0.5 mm to 2 mm.

5. The high density interconnect hole chain printed circuit board according to claim 4, characterized in that: The distance between two adjacent hole chain test points is 1 mm.

6. The high density interconnection hole chain printed circuit board according to claim 1, characterized in that: The hole chain test point is a through hole, and the hole chain conductor includes a first inner hole chain line and a first outer hole chain line. The first inner hole chain line is used to electrically connect the hole walls of two adjacent through holes on the inner layer board of the high-density interconnection hole chain test board, and the first outer hole chain line is used to electrically connect the hole walls of two adjacent through holes on the two outer layer boards of the high-density interconnection hole chain test board.

7. The high density interconnection hole chain printed circuit board according to claim 1, characterized in that: The hole chain test point is a blind hole, and the hole chain conductor includes a second outer hole chain line, which is used to electrically connect the hole walls of two adjacent blind holes on two outer boards of the high-density interconnect hole chain test board.

8. The high density interconnection hole chain printed circuit board according to claim 1, characterized in that: The via chain test point is a buried via, and the via chain conductor includes a second inner layer via chain line, which is used to electrically connect the hole walls of two adjacent buried vias on the inner layer board of the high-density interconnect via chain test board.

9. The high density interconnection hole chain printed circuit board according to claim 1, characterized in that: The test hole chain formed by the plurality of hole chain test points has a reciprocating "S" shaped structure.

10. A new energy vehicle circuit board, characterized in that: A high-density interconnect hole chain printed circuit board comprising any one of claims 1 to 9.

Images