Ceramic patch type packaging structure of half-bridge driver

Abstract

The utility model discloses a ceramic patch type packaging structure of a half-bridge driver, and belongs to the technical field of microelectronic device packaging. The structure comprises a ceramic base and a ceramic cover plate. The ceramic base is composed of a shell sealing ring, a ceramic base body, a heat sink area / chip assembly area and a back metal electrode. The back surface of the ceramic base body is provided with back metal electrodes which are arranged according to the requirements of a packaging circuit; the front surface of the ceramic base body is a circuit assembly frame body, the periphery of the frame body is a frame wall, the bottom surface of the frame body is a plane, the central area of the bottom surface of the frame body is a heat sink area / chip assembly area of a pit, a heat sink is assembled at the bottom of the pit, a chip is assembled on the surface of the heat sink, and the peripheral plane area of the pit is an internal metal conduction band and lead bonding area wiring layer. The problem that the existing all-silicon or all-GaN half-bridge driver packaging technology and packaging structure are difficult to meet the requirements of high heat dissipation, low input and output impedance, high insulativity and high reliability is solved. The method is widely applied to the technical field of product packaging of semiconductor power devices, hybrid integrated circuits and the like.

Description

Technical Field

[0001] The utility model belongs to the technical field of microelectronic device packaging, and further relates to the technical field of ceramic packaging for half-bridge drivers. Specifically, it relates to a ceramic surface-mount packaging structure for half-bridge drivers. Background Art

[0002] A half-bridge driver is a power drive module used to drive half-bridge power electronic devices. It usually consists of functional modules such as digital control logic, drive circuits, and protection circuits, and is used to control the switching actions of half-bridge power electronic devices. The main function of the half-bridge drive circuit is to generate an alternating current trigger signal through power tubes, thereby generating a large current to further drive the load. Half-bridge drivers mainly adopt transformer drive or all-semiconductor drive. In particular, all-semiconductor drive (all-silicon or all-GaN) half-bridge drivers are the mainstream development direction, requiring high integration density, high packaging power density, low parasitic impedance, and high mechanical strength. Existing packaging technologies and packaging structures are difficult to meet the requirements of high heat dissipation, low input / output impedance, high insulation, and high reliability.

[0003] In view of this, the present utility model is specifically proposed. Summary of the Invention

[0004] The technical problem to be solved by the present utility model is to solve the problem that existing all-silicon or all-GaN half-bridge driver packaging technologies and packaging structures are difficult to meet the requirements of high heat dissipation, low input / output impedance, high insulation, and high reliability.

[0005] The objective of the present utility model is to design and develop a ceramic packaging product by utilizing the excellent electrical insulation, high-strength mechanical properties, good airtightness, and excellent chemical corrosion resistance of ceramic materials, according to the circuit structure, product performance, heat conduction, and electrical conduction requirements of half-bridge drivers, and comprehensively considering factors such as the later functions, performance parameters, packaging processes, and part versatility of the product.

[0006] The inventive concept of the present utility model is:

[0007] (1) Only metal materials and ceramic materials are used in the overall packaging structure to improve the stability and reliability of the product.

[0008] (2) Except for the electrode pin metal blocks at the bottom of the housing, the rest of the parts are ceramics. The multi-layer ceramic substrate and the housing frame are integrally sintered together to ensure the insulation and airtightness requirements of the device.

[0009] (3) The ceramic housing is plated with gold on the surface to solve the problems of ceramic heat conduction and electrical conduction, and to meet the requirements of high power density and high reliability of ceramic packaging.

[0010] (4) The inner cavity bonding area of the ceramic package housing adopts a stepped structure, with multiple edge bonding areas surrounding the central bonding area, which can not only shorten the distance between bonding points but also solve the problem of height differences in bonding caused by different chip sizes (such as thickness). The position and shape of the edge bonding areas ensure that the bonding wires do not cross each other, reducing the difficulty of the chip bonding process.

[0011] (5) The chip bonding area of the ceramic housing adopts a ceramic pit design. The bottom surface is sealed by welding a metal electrode sheet (W85Cu15) to the pit. The heat sink material runs through between the ceramic shells to achieve internal and external electrical connection. The metal electrode sheet is made of a material with good thermal conductivity and a thermal expansion coefficient similar to that of the chip. The power semiconductor chip dissipates heat directly through the metal electrode sheet, with a short heat dissipation channel and a small thermal resistance.

[0012] (6) A multi-layer ceramic structure is adopted, and a heat sink area is designed inside the ceramic housing to absorb the power heat generated by the chip, meeting the requirements of high power density integration and miniaturization.

[0013] For this reason, the present utility model provides a ceramic patch package structure for a half-bridge driver, as Figures 1-3 shown. It includes a ceramic base and a ceramic cover plate.

[0014] The ceramic base is composed of a housing sealing ring 1, a ceramic base body 2, a heat sink area / chip assembly area 3, and a back metal electrode 4. The back of the ceramic base body 2 is the back metal electrode 4, which is arranged according to the requirements of the packaging circuit. The front of the ceramic base body 2 is a circuit assembly frame. The periphery of the frame is a frame wall. The bottom surface of the frame is a plane. The central area of the bottom surface of the frame is a pit-shaped heat sink area / chip assembly area 3. The depth and size of the pit in the heat sink area / chip assembly area 3 are determined by the sizes of the heat sink area and the chip. The heat sink is assembled at the bottom of the pit, and the chip is assembled on the surface of the heat sink. The planar area around the pit is a wiring layer for the internal metal conduction band and the lead bonding area, which is set according to the chip structure of the packaging circuit. The bottom layer of the internal metal conduction band and the lead bonding area is a multi-layer co-fired ceramic body, which is electrically connected to the back metal electrode 4 through the metal wiring of each layer. The housing sealing ring 1 is located directly above the frame wall, and the surface of the housing sealing ring 1 is a welding metal layer.

[0015] The entire surface of the ceramic cover plate is a metal coating. The periphery of the inner surface of the ceramic cover plate is a metal welding ring, which matches the housing sealing ring 1. The shape of the ceramic cover plate is the same as that of the ceramic base.

[0016] The shape of the ceramic base can be circular, square, or other shapes.

[0017] The arrangement of the back metal electrode 4 can be single-row, double-row, four-sided, circular, or other layouts.

[0018] The pit can penetrate the ceramic matrix.

[0019] The utility model has the characteristics of good insulation performance, small volume, ultra-high integration, light weight, fast heat dissipation, high reliability, etc., and can be widely used in products with high reliability requirements such as semiconductor devices, semiconductor power devices, and hybrid integrated circuits.

[0020] The product parts can be widely used in various fields such as aviation, aerospace, automotive electronics, etc. The mechanical strength, sealing performance, salt spray resistance, thermal shock resistance and other properties of the parts are applicable to the above-mentioned use environments. Description of the Drawings

[0021] Figure 1 Schematic diagrams of the inner cavity, cross-section, bottom surface and cover plate of the ceramic chip-on-board package housing.

[0022] Figure 2 Schematic diagram of the wire bonding and spot welding area.

[0023] Figure 3 Schematic diagram of the three-dimensional structure.

[0024] In the figure: a is the top view of the base, b is the bottom view of the base, c is the cross-sectional view of the base, d is the side view of the base, e is the inner and side views of the cover plate, f is the three-dimensional front view of the housing, g is the three-dimensional bottom view of the housing, h is the three-dimensional top view of the base, 1 is the housing sealing ring, 2 is the ceramic base body, 3 is the heat sink area / chip assembly area, 4 is the back metal electrode, and 5 is the cover plate. Detailed Implementation Modes

[0025] As Figures 1-3 shown, taking the chip-on-board dual in-line 8-pin leadless ceramic package housing as an example, the detailed implementation modes are as follows:

[0026] The external dimensions of the package housing are 6.0 mm × 5.0 mm × 2.35 mm, and the internal closed cavity dimensions are 5.0 mm × 4.0 mm.

[0027] The internal structure includes:

[0028] 1. Chip bonding area, chip peripheral bonding area, external lead electrode area, sealing ring;

[0029] 2. The chip bonding area is the ceramic body 2 with a metallized layer on the inner cavity surface, and the inner surface metallized layer J.

[0030] 3. The edge bonding area includes the ceramic body 2 with a metallized layer on the inner cavity surface, and the inner surface metallized layers A, B, C, D, E, F, G, H, I.

[0031] 4. The external lead electrode area includes A1, B1, C1, D1, E1, F1, G1, and H1, which are located on the bottom outer surface of the ceramic body 2. The surface treatment method is composed of multiple layers of metal materials. The thickness range of each layer of metal is as follows: the thickness of the surface layer material gold is 1.3 - 5.7 um, with a purity of ≥99.9%, and the thickness of the second layer material, which is metal nickel, nickel cobalt, or nickel phosphide, is 2.5 - 11.4 um. Then, metal tungsten or molybdenum manganese is first brushed on the outside to form a metal tungsten layer or a molybdenum manganese layer, and then a metal block is welded on the metal tungsten layer or the molybdenum manganese layer.

[0032] 5. The surface treatment method of the inner surface metallization layers A, B, C, D, F, G, H, I, and J in the ceramic body 2 is composed of multiple layers of metal materials. The thickness range of each layer of metal is as follows: the thickness of the surface layer material gold is 1.3 - 5.7 um, with a purity of ≥99.9%, the thickness of the second layer material, which is metal nickel, nickel cobalt, or nickel phosphide, is 2.5 - 11.4 um, and the thickness of the third layer material, which is metal tungsten or molybdenum manganese, is 5 - 30 um.

[0033] 6. The key materials for each part of the encapsulation housing are:

[0034] (1) Frame / sealing ring (material: 4J42 / 4J29).

[0035] (2) Ceramic body (more than 95% Al2O3 ceramic (aluminum oxide) / AlN ceramic (aluminum nitride)).

[0036] (3) External electrode (WCu / MoCu).

[0037] 7. The connection relationship between the inner and outer surfaces (excluding the inner buried layer): A - A1, B - B1, C - C1, D - D1, E - E1, F - F1, G - G1, H - H1, and I is an isolated island. The housing sealing ring 1 and the cover plate 5 are connected by parallel seam welding.

[0038] 8. As Figure 2 shown, I and J are connected and communicate with each other through the inside of the housing. When the housing is produced, the upper half of I and A is used as the area for wire bonding and spot welding, so as to realize the metallization electroplating of the J area. After the electroplating is completed, the bonding wire between I and A is removed.

[0039] Finally, it should be noted that: The above embodiments are only examples given for clear illustration. The present invention includes but is not limited to the above embodiments, and it is not necessary and impossible to enumerate all the implementation manners here. For those of ordinary skill in the art, other different forms of changes or modifications can be made based on the above description. All implementation manners that meet the requirements of the present invention belong to the protection scope of the present invention.

Claims

1. A half-bridge driver ceramic patch packaging structure, characterized in that: Including ceramic base and ceramic cover; The ceramic base is composed of an outer shell sealing ring, a ceramic base body, a heat sink area / chip assembly area, and a back metal electrode; the back of the ceramic base body is the back metal electrode, which is arranged according to the requirements of the packaging circuit; the front of the ceramic base body is a circuit assembly frame, the periphery of the frame is a frame wall, the bottom of the frame is a plane, and the central area of ​​the bottom of the frame is a heat sink area / chip assembly area of ​​a pit, the pit depth and size of the heat sink area / chip assembly area are determined by the size of the heat sink area and the chip, the heat sink is assembled at the bottom of the pit, the chip is assembled on the surface of the heat sink, and the plane area around the pit is the internal metal guide and lead bonding area wiring layer, which is arranged according to the packaging circuit chip structure; the bottom layer of the internal metal guide and lead bonding area is a multi-layer co-fired ceramic body, which is electrically connected to the back metal electrode through the metal wiring of each layer; the outer shell sealing ring is located directly above the frame wall, and the surface of the outer shell sealing ring is a welding metal layer; The entire surface of the ceramic cover plate is metal-plated, and the inner periphery of the ceramic cover plate is a metal welding ring that matches the outer shell sealing ring. The shape of the ceramic cover plate is consistent with that of the ceramic base.

2. A half-bridge driver ceramic chip packaging structure as claimed in claim 1, characterized in that: The shape of the ceramic base can be round or square.

3. A half-bridge driver ceramic chip packaging structure as claimed in claim 1, characterized in that: The arrangement of the back metal electrodes can be single row, double row, quadrilateral or circular.

4. A half-bridge driver ceramic chip packaging structure as claimed in claim 1, characterized in that: The pits penetrate the ceramic matrix.

5. A half-bridge driver ceramic chip packaging structure as claimed in claim 1, characterized in that: The chip bonding area is a ceramic body with a metallized layer on the inner surface of the cavity, and the inner surface metallized layer J; The edge bonding area includes a ceramic body with a metallized layer on the inner surface of the cavity, and the inner surface metallized layers A, B, C, D, E, F, G, H, and I; The external lead-out electrode regions include A1, B1, C1, D1, E1, F1, G1, and H1, which are located on the bottom outer surface of the ceramic body.

6. A half-bridge driver ceramic chip packaging structure as claimed in claim 5, characterized in that: For the external lead-out electrode areas A1, B1, C1, D1, E1, F1, G1 and H1: they are composed of multiple layers of metal materials, the thickness of the surface material gold is 1.3um~5.7um, the purity is ≥99.9%, the thickness of the second layer material metal nickel, nickel cobalt or nickel phosphorus is 2.5um~11.4um; the outer surface is a metal tungsten layer or a molybdenum manganese layer, and the outer layer of the metal tungsten layer or the molybdenum manganese layer is a metal block.

7. A half-bridge driver ceramic chip packaging structure as claimed in claim 5, characterized in that: For the inner surface metallization layers A, B, C, D, F, G, H, I and J: the thickness of the surface material gold is 1.3um~5.7um, the thickness of the second layer material metal nickel, nickel cobalt or nickel phosphorus is 2.5um~11.4um, and the thickness of the third layer material metal tungsten or molybdenum manganese is 5um~30um.

8. A half-bridge driver ceramic chip packaging structure as claimed in claim 5, characterized in that: The material of the frame / sealing ring is 4J42 / 4J29; The material of the ceramic body is more than 95% Al2O3 ceramic or AlN ceramic; The material of the external electrodes is WCu or MoCu.

9. A half-bridge driver ceramic chip packaging structure as claimed in claim 5, characterized in that: The connection relationship between the inner and outer surfaces is: A-A1, B-B1, C-C1, D-D1, E-E1, F-F1, G-G1, H-H1, I is an isolated island, and the outer shell sealing ring (1) and the cover plate (5) are connected by parallel sealing welding; I and J are connected to each other through the inner part of the shell.

10. A half-bridge driver ceramic chip packaging structure as claimed in claim 5, characterized in that: The outer dimensions of the package shell are 6.0 mm × 5.0 mm × 2.35 mm, and the dimensions of the internal closed cavity are 5.0 mm × 4.0 mm.

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