Simple-architecture voltage reference circuit capable of realizing high-voltage application

Abstract

The utility model relates to the related field of voltage reference circuits, in particular to a voltage reference circuit with a simple structure and capable of realizing high-voltage application, which comprises a resistor R5 connected with a high-voltage power supply, MOS (Metal Oxide Semiconductor) transistors PM1, PM2 and PM3, triodes Q0, Q1 and Q2, and MOS transistors NM0 and NM5, compared with a traditional structure, the circuit is simple in structure and easy to implement, and due to the fact that an operational amplifier and a band-gap reference circuit are not needed, and the number of electronic components is small, the circuit area is greatly reduced; the high-voltage-resistant voltage-reducing and voltage-stabilizing circuit is simple in structure, low in process requirement, free of a high-voltage process and free of additional special devices, adopts a low-voltage process to enable the circuit to generate a low-voltage reference capable of bearing a high-voltage power supply of more than 100V, achieves the purposes of high-voltage resistance, voltage reduction and voltage stabilization, and has the characteristics of low cost and convenience in design, so that the high-voltage-resistant voltage-reducing and voltage-stabilizing circuit has very high use value and application value and is suitable for popularization.

Description

Technical Field

[0001] The utility model relates to the field of voltage reference circuits, and specifically relates to a voltage reference circuit with a simple architecture that can achieve high-voltage applications. Background Technique

[0002] Currently, the integrated circuit process is getting smaller and smaller, the working frequency is getting higher and higher, and the performance is getting better and better. However, the breakdown voltage of transistor devices will become lower as the process shrinks, resulting in a lower breakdown voltage value for the entire circuit. In the application of integrated circuits, high-voltage applications are often involved. At this time, it is necessary to step down and regulate the power supply voltage to generate the voltage value required by the circuit for use by other circuits. Therefore, the voltage reference circuit is an essential core module in integrated circuit design.

[0003] Such as Figure 2 shown, the traditional voltage reference circuit structure independent of the power supply often includes an operational amplifier and a bandgap reference circuit. By using the concept of "virtual short" of the operational amplifier, the voltage at the positive input terminal is made equal to the voltage at the negative input terminal. The negative input terminal is a stable bandgap reference voltage, so the power supply VDD can also remain stable. However, the bandgap reference circuit relies on devices such as triodes, which will inevitably cause a large increase in the circuit area and an increase in cost, and there are significant limitations in some applications where strict control of the analog circuit area is required. And as Figure 1 shown, the voltage reference circuit without the bandgap reference circuit will have the problem that the clamping voltage point is greatly affected by temperature fluctuations, which results in that the reference voltage can only be applied to some circuits that are not sensitive to voltage, and the limitations are also obvious. Content of the Utility Model

[0004] The purpose of the utility model is to provide a voltage reference circuit with a simple architecture that can achieve high-voltage applications, so as to solve the problems put forward in the above background technique.

[0005] To achieve the above purpose, the utility model adopts the following technical solutions:

[0006] A voltage reference circuit with a simple architecture that can achieve high-voltage applications, which includes a resistor R5 connected to a high-voltage power supply, MOS transistors PM1, PM2, PM3, triodes Q0, Q1, Q2, and MOS transistors NM0 and NM5;

[0007] The POS terminal of the resistor R5 is connected to the high-voltage power supply, and the Neg terminal of the resistor R5 serves as the output terminal of the reference voltage signal. The Neg terminal of the resistor R5 is connected to the POS terminals of the resistor R1, the resistor R0, the source terminal of the MOS transistor PM2, the source, substrate, drain terminals of the MOS transistor PM1, and the source terminal of the MOS transistor NM0; the gate terminal of the MOS transistor NM0 is connected to the gate terminal of the MOS transistor PM1, the drain terminal of the MOS transistor PM3, and the POS terminal of the resistor R2. The Neg terminal of the resistor R2 and the drain terminal of the MOS transistor NM0 are connected to the common ground; the source terminal of the MOS transistor PM3 is connected to the drain terminal of the MOS transistor PM2. The gate terminal of the MOS transistor PM3 is connected to the Neg terminal of the resistor R1 and the drain terminal of the MOS transistor NM5; the source terminal of the MOS transistor NM5 is connected to the emitter of the triode Q0. The gate terminal of the MOS transistor NM5 is connected to the base of the triode Q2 and the POS terminal of the resistor R3; the base and collector of the triode Q0 are connected to the common ground terminal; the Neg terminal of the resistor R3 is connected to the emitter of the triode Q1; the base and collector of the triode Q1 are connected to the common ground terminal. The emitter of the triode Q2 is connected to the Neg terminal of the resistor R0, and the collector of the triode Q2 is connected to the common ground terminal.

[0008] Preferably, both the MOS transistors NM0 and NM5 are low-voltage 5V process NMOS devices.

[0009] Preferably, the MOS transistors PM1, PM2, and PM3 are all low-voltage 5V process PMOS devices.

[0010] Preferably, the triodes Q0, Q1, and Q2 are all PNP type triodes.

[0011] Preferably, the resistor R5 is a resistor for the circuit to achieve the withstand voltage function, and the resistors R2, R1, and R0 are all voltage-dividing resistors.

[0012] The present invention also provides a method for implementing a voltage reference circuit with a simple architecture and capable of high-voltage applications, which includes the following working steps:

[0013] Step S1: The voltage input from the high-voltage power supply voltage input terminal VIN generates a current through the resistor R1 and the resistor R0, and generates the bias voltages of the MOS transistor PM3 and the MOS transistor NM5.

[0014] Step S2: The MOS transistor PM3 and the MOS transistor NM5 operate in the saturation region to provide a reasonable bias to determine the clamping voltage point.

[0015] Step S3: The MOS transistor NM0 serves as a negative feedback adjustment transistor, which is equivalent to a variable resistance resistor. The magnitude of its resistance value shows an opposite change trend to the value of the reference voltage VREF. As the core device to ensure the stability of the reference voltage, it pulls down the voltage when the reference voltage is too high and raises the voltage when it is too low.

[0016] Step S4: The MOS transistor PM1 acts as a voltage stabilizing capacitor to prevent the bias voltage of the MOS transistor NM0 from being sensitive and causing instability of the reference voltage.

[0017] Step S5: The introduction of the triode Q1 and the triode Q2 provides temperature compensation to make the system more stable.

[0018] Step S6: The high-voltage power supply voltage input terminal VIN generates a voltage drop across the resistor R5 to generate the reference voltage VREF.

[0019] Compared with the prior art, the present utility model has the following beneficial effects:

[0020] Compared with the traditional structure, the structure of the present utility model is simple and easy to implement. Since there is no need for an operational amplifier and a bandgap reference circuit, and there are few electronic components, the circuit area is greatly reduced. Moreover, the process requirements are not high, there is no need for a high-voltage process, and there is no need for additional special devices. The low-voltage process is used to make the circuit generate a low-voltage reference that can withstand a high-voltage power supply of more than 100V, achieving the purpose of high-voltage resistance and step-down voltage stabilization, and meeting the characteristics of low cost and convenient design. The present utility model solves the technical problem of the limitation that the traditional power-supply-independent reference circuit needs to rely on an operational amplifier and a bandgap reference circuit, has high use value and application value, and is suitable for popularization. Description of the Drawings

[0021] Figure 1 It is a circuit diagram of a traditional voltage reference with an operational amplifier;

[0022] Figure 2 It is a circuit diagram of a traditional voltage reference including a bandgap reference;

[0023] Figure 3 It is a circuit diagram of the voltage reference of the present utility model;

[0024] Figure 4 It is an equivalent circuit diagram of the voltage reference of the present utility model;

[0025] Figure 5 It is a simulation waveform diagram of the reference voltage and the high voltage VIN of the embodiment of the present utility model. Detailed Embodiment

[0026] Next, the technical solutions in the embodiments of the present utility model will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all the embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present utility model.

[0027] Please refer to Figures 3 - 5 , the present utility model provides a technical solution:

[0028] A voltage reference circuit with a simple architecture that can achieve high-voltage applications, which includes a resistor R5 connected to a high-voltage power supply, MOS transistors PM1, PM2, PM3, bipolar transistors Q0, Q1, Q2, and MOS transistors NM0 and NM5;

[0029] The POS terminal of the resistor R5 is connected to the high-voltage power supply, the Neg terminal of the resistor R5 is used as the output terminal of the reference voltage signal, and the Neg terminal of the resistor R5 is connected to the POS terminals of the resistor R1, resistor R0, the source terminal of the MOS transistor PM2, the source, substrate, drain terminals of the MOS transistor PM1, and the source terminal of the MOS transistor NM0; the gate terminal of the MOS transistor NM0 is connected to the gate terminal of the MOS transistor PM1, the drain terminal of the MOS transistor PM3, and the POS terminal of the resistor R2, and the Neg terminal of the resistor R2 and the drain terminal of the MOS transistor NM0 are connected to the common ground; the source terminal of the MOS transistor PM3 is connected to the drain terminal of the MOS transistor PM2, the gate terminal of the MOS transistor PM3 is connected to the Neg terminal of the resistor R1, and the drain terminal of the MOS transistor NM5; the source terminal of the MOS transistor NM5 is connected to the emitter of the bipolar transistor Q0, the gate terminal of the MOS transistor NM5 is connected to the base of the bipolar transistor Q2, and the POS terminal of the resistor R3; the base and collector of the bipolar transistor Q0 are connected to the common ground terminal; the Neg terminal of the resistor R3 is connected to the emitter of the bipolar transistor Q1; the base and collector of the bipolar transistor Q1 are connected to the common ground terminal, the emitter of the bipolar transistor Q2 is connected to the Neg terminal of the resistor R0, and the collector of the bipolar transistor Q2 is connected to the common ground terminal.

[0030] As a preferred implementation, on the basis of the above structure, preferably, both the MOS transistors NM0 and NM5 are low-voltage 5V process NMOS devices.

[0031] As a preferred implementation, on the basis of the above structure, preferably, the MOS transistors PM1, PM2, and PM3 are all low-voltage 5V process PMOS devices.

[0032] As a preferred implementation, on the basis of the above structure, preferably, the bipolar transistors Q0, Q1, and Q2 are all PNP-type bipolar transistors.

[0033] As a preferred implementation, on the basis of the above structure, preferably, the resistor R5 is a resistor for the circuit to achieve the withstand voltage function, and the resistors R2, R1, and R0 are all voltage-dividing resistors.

[0034] The present utility model also provides a technical solution:

[0035] A method for implementing a voltage reference circuit with a simple architecture that can achieve high-voltage applications, which includes the following working steps:

[0036] Step S1: The voltage input from the high-voltage power supply voltage input terminal VIN generates a current through resistor R1 and resistor R0, and generates the bias voltages of MOS transistor PM3 and MOS transistor NM5.

[0037] Step S2: MOS transistors PM3 and NM5 operate in the saturation region to provide a reasonable bias to determine the clamping voltage point.

[0038] Step S3: MOS transistor NM0 serves as a negative feedback adjustment transistor, equivalent to a variable resistance. Its resistance value changes in the opposite trend to the value of the reference voltage VREF. As the core device to ensure the stability of the reference voltage, it pulls down the voltage when the reference voltage is too high and raises the voltage when it is too low.

[0039] Step S4: MOS transistor PM1 serves as a voltage stabilizing capacitor to prevent the instability of the reference voltage caused by the sensitivity of the bias voltage of MOS transistor NM0.

[0040] Step S5: The introduction of triodes Q1 and Q2 provides temperature compensation to make the system more stable.

[0041] Step S6: The high-voltage power supply voltage input terminal VIN generates a voltage drop across resistor R5 to generate the reference voltage VREF.

[0042] Specifically, as Figure 3 described, the reference voltage circuit diagram of the present utility model. This circuit is mainly used for voltage clamping, that is, when the input voltage VIN changes, the VDD voltage remains almost unchanged, thereby generating a stable VDD voltage to provide the power supply voltage for the subsequent circuit. Its working principle is as follows:

[0043] After the circuit is powered on, the high-voltage power supply voltage input terminal VIN generates a voltage drop across resistor R5. Ideally, the resistance value of resistor R5 does not affect the clamping voltage. The circuit except resistor R5 can be equivalent to a variable resistor. The change in the resistance value of resistor R5 only affects the discharge current of MOS transistor NM0 in the circuit. It can be regarded as resistor R5 and the rest of the circuit in a series relationship up and down, and their relative impedance remains unchanged. This principle is also the key for the clamping voltage to remain stable.

[0044] When the circuit is working normally, the gate voltage of MOS transistor PM3 is close to GND, and the transistor is in the deep linear region, and the voltage drop across it is very small and can be ignored. Its function is to be used as a conducting switch.

[0045] The clamping voltage stability of this clamping circuit mainly depends on setting a reasonable bias voltage to make MOS transistors NM5 and PM3 enter the saturation region. Utilizing the constant-current characteristic of MOS transistors, a relatively fixed voltage drop is generated across the resistor to achieve the clamping function. At the same time, the introduction of MOS transistor NM0 as an adjustment transistor makes the circuit a closed-loop negative-feedback system, making the output voltage more stable.

[0046] When VIN increases, VIN causes the gate potential of MOS transistor NM5 to rise through the voltage-dividing direct path, and IDS5 also rises. At this time, the voltage drop across resistor R1 also rises. VR1 is the same as |VGS3|, so IDS5 also rises. When VIN rises to a certain value, MOS transistor NM5 saturates, and IDS5 starts to change less, making VR1 and |VGS3| also change less, and then VR2 changes less, that is, the circuit enters the clamping state.

[0047] MOS transistors NM5 and PM3 respectively form a common-source amplifier circuit with the resistors on their drains. When the circuit is working normally, if there is a small change in VIN, it will form a negative-feedback signal through these two stages and MOS transistor NM0 as an adjustment transistor to cancel the change, thereby stabilizing the output voltage.

[0048] The introduction of transistor Q0 raises the source potential of MOS transistor NM5, making the output VDD voltage increase. Removing transistor Q0 and transistor Q1, the circuit can still work normally. However, the introduction of transistor Q1 and transistor Q2 also brings temperature compensation. Since the resistor and NMOS are both positive temperature coefficient devices, while the on-resistance of the transistor has a negative temperature coefficient, and the two offset each other, the reference voltage VREF of the circuit is not easily affected by temperature, thus being more stable.

[0049] From the above analysis, it can be seen that all the marked devices except MOS transistor PM2 will affect the output voltage. Here, the size of MOS transistor NM5 is selected to change the output voltage. Keeping the L of MOS transistor NM5 unchanged, increasing W will lower VDD, and vice versa. This is because increasing W will make IDS5 increase, so VR1 and |VGS3| also increase, and then IDS3 also increases, making the gate potential of NM0 adjustment transistor rise, and the current discharged by the power supply increase, thus lowering the output VDD, and vice versa.

[0050] As Figure 4 shown, according to the equivalent circuit diagram of the clamping circuit, we can calculate the expression between VIN and VDD, and then obtain the change situation of VDD when VIN changes. According to Figure 4 The obtained expression is as follows:

[0051]

[0052] The curves of VIN and VDD can be drawn according to the above expressions. Finally, it will be found that the curves are Figure 5 basically similar, that is, as VIN increases, VDD hardly changes.

[0053] The simulation results of the present utility model are as Figure 5 shown. When the power supply voltage is 6.3V, the reference voltage VREF is 4.6V. When the power supply voltage rises to the high voltage of 120V, the reference voltage VREF can still be stabilized at 4.75V.

[0054] The above shows that the present utility model can generate a voltage reference circuit structure with a breakdown voltage exceeding 100V, without the need for a high-voltage process, without additional circuit assistance and special devices, achieving the purpose of high-voltage resistance, step-down voltage regulation, meeting the characteristics of low cost and simple design.

[0055] Although the embodiments of the present utility model have been shown and described, for those of ordinary skill in the art, it can be understood that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principle and spirit of the present utility model. The scope of the present utility model is defined by the appended claims and their equivalents.

Claims

1. A voltage reference circuit with a simple structure capable of realizing high voltage applications, characterized in that: It includes a resistor R5 connected to a high voltage power supply, MOS tubes PM1, PM2, PM3, transistors Q0, Q1, Q2, and MOS tubes NM0 and NM5; The POS end of the resistor R5 is connected to a high voltage power supply, the Neg end of the resistor R5 is used as an output end of a reference voltage signal, the Neg end of the resistor R5 is connected to the resistor R1, the POS end of the resistor R0, the source end of the MOS transistor PM2, the source, substrate, and drain ends of the MOS transistor PM1, and the source end of the MOS transistor NM0; the gate end of the MOS transistor NM0 is connected to the gate end of the MOS transistor PM1, the drain end of the MOS transistor PM3, and the POS end of the resistor R2, the Neg end of the resistor R2 and the drain end of the MOS transistor NM0 are connected to a common ground; the source end of the MOS transistor PM3 .... The drain end of the MOS tube PM2, the gate terminal of the MOS tube PM3 is connected to the Neg end of the resistor R1, and the drain end of the MOS tube NM5; the source end of the MOS tube NM5 is connected to the emitter of the transistor Q0, the gate terminal of the MOS tube NM5 is connected to the base of the transistor Q2, and the POS end of the resistor R3; the base and the collector of the transistor Q0 are connected to the common ground end; the Neg end of the resistor R3 is connected to the emitter of the transistor Q1; the base and the collector of the transistor Q1 are connected to the common ground end, the emitter of the transistor Q2 is connected to the Neg end of the resistor R0, and the collector of the transistor Q2 is connected to the common ground end.

2. A voltage reference circuit with a simple structure and capable of realizing high voltage application according to claim 1, characterized in that: The MOS transistors NM0 and NM5 are both low-voltage 5V process NMOS devices.

3. The voltage reference circuit with a simple structure and capable of realizing high voltage application according to claim 1, characterized in that: The MOS tubes PM1, PM2 and PM3 are all low-voltage 5V process PMOS devices.

4. The voltage reference circuit with a simple structure and capable of realizing high voltage application according to claim 1, characterized in that: The transistors Q0, Q1 and Q2 are all PNP transistors.

5. The voltage reference circuit with a simple structure and capable of realizing high voltage application according to claim 1, characterized in that: The resistor R5 is a resistor for the circuit to achieve a withstand voltage function, and the resistors R2, R1 and R0 are all voltage-dividing resistors.

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