Ceramic patch packaging ideal diode

Through the ceramic chip packaging design, integrated control chips and MOS chips solve the problems of power loss and system efficiency reduction caused by Schottky diodes in the power supply system, and realizes an ideal diode product with a smaller area and higher power density.

CN223023272UActive Publication Date: 2025-06-24CHINA ZHENHUA GRP YONGGUANG ELECTRONICS CO LTD STATE OWNED NO 873 FACTORY
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Patent Information

Application Number
CN202422111821.4
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-08-29
Publication Date
2025-06-24
Estimated Expiration
2034-08-29

AI Technical Summary

Technical Problem

In power systems, Schottky diodes have large areas, high costs and complex designs due to power losses and system efficiency reductions caused by large forward voltage drops and reverse leakage.

Method used

Through ceramic patch packaging design, the control chip and MOS chip are integrated, and silver alumina base plates are used as carrier components to achieve the integration of power input, output and common ground, reducing system area and cost.

Benefits of technology

It realizes reducing the system or PCB area while reducing conduction loss, improving power density, and simplifying design workload.

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Abstract

The utility model provides an ideal diode packaged by a ceramic patch. The ideal diode comprises a tube seat, a groove is machined in the end face of the tube base, three through holes are machined in the groove, a grounding electrode, an input electrode and an output electrode with the two ends protruding out of the two end faces of the tube base are fixed in the three through holes respectively, and a control chip and an MOS chip are installed on the output electrode. The aluminum oxide silver base plate is used as a bearing part of the control chip, the MOS tube and the control chip are integrated in one package, a Schottky diode with a power input port, a power output port and a common ground port is replaced, and compared with the scheme of the Schottky diode and an existing diode controller, the scheme of the utility model has the advantages that the cost is reduced; while the conduction loss is reduced, the area of a system or a PCB is further reduced, and higher power density is achieved.
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Description

Technical Field

[0001] The utility model relates to an ideal diode with ceramic patch package. Background Art

[0002] Schottky diodes are widely used in various power systems to provide protection against current backflow during input power failure, increase power capacity by paralleling power supplies, or provide backup power, etc. However, the relatively large forward voltage drop of Schottky diodes and the reverse leakage current that rises sharply with increasing temperature will lead to significant power losses and reduced system efficiency. MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) has lower conduction loss and extremely small reverse leakage compared with traditional Schottky diodes. Therefore, an ideal diode product with ultra-low conduction voltage drop and negligible reverse leakage can be obtained by using a combination of a drive chip and MOSFET, which can greatly reduce power loss in high-current scenarios.

[0003] The existing solution to replace Schottky diodes is to electrically connect a diode controller and a MOSFET with low on-resistance through a PCB board or other circuit methods to achieve the function of an ideal diode. However, this method uses a relatively large area, increases the cost of part of the PCB manufacturing, and also needs to consider the selection of low on-resistance MOSFET, increasing the design workload of the system. Summary of the Utility Model

[0004] To solve the above technical problems, the utility model provides an ideal diode with ceramic patch package.

[0005] The utility model is achieved through the following technical solutions.

[0006] An ideal diode with ceramic patch package provided by the utility model includes a header. Grooves are processed on the end face of the header, and three through holes are processed in the grooves. A grounding electrode, an input electrode, and an output electrode that protrude from both ends of the header at both ends are respectively fixed in the three through holes. A control chip and a MOS chip are installed on the output electrode. The output terminal, input terminal, and control terminal of the control chip are respectively connected to the drain, source, and gate of the MOS chip. The grounding terminal of the control chip is also connected to the grounding electrode, and the source of the MOS chip is also connected to the input electrode.

[0007] The output electrode is arranged at one end of the groove, and the grounding electrode and the input electrode are arranged together at the other end of the groove. The distances between the grounding electrode, the input electrode, and the output electrode are the same.

[0008] The output electrode fixes the control chip through the control chip base plate. The control chip base plate is arranged adjacent to the grounding electrode. A back electrode is provided on the back surface of the control chip base plate. The back electrode is attached to the output electrode. The control chip is installed in the middle of the front surface of the control chip base plate. One end of the front surface of the control chip base plate adjacent to the grounding electrode is provided with a chip grounding electrode and a chip control electrode. One end of the control chip base plate is provided with a through hole, and the through hole is connected to the back electrode;

[0009] The power supply terminal and the output terminal of the control chip are respectively connected to the through hole through gold wire leads. The control terminal and the grounding terminal of the control chip are respectively connected to the chip control electrode and the chip grounding electrode through gold wire leads.

[0010] A chip output electrode is processed on the through hole, and the chip output electrode penetrates through the control chip base plate and the back electrode.

[0011] The drain of the MOS chip is attached to the output electrode. The source is connected to the input electrode through an aluminum wire lead and is also connected to the input terminal of the control chip through a gold wire lead; the gate is connected to the chip control electrode through a gold wire lead.

[0012] The beneficial effect of the present utility model lies in that: by using an alumina silver base plate as the bearing component of the control chip, integrating the MOS transistor and the control chip in one package, realizing the replacement of a Schottky diode with three ports of power input, power output and common ground. Compared with the scheme of the Schottky diode and the existing diode controller, it can reduce the conduction loss while further reducing the system or PCB area, achieving a higher power density. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a structural schematic diagram of the present utility model;

[0014] Figure 2 is a schematic diagram of the front wiring structure of the control chip of the present utility model

[0015] Figure 3 is a schematic diagram of the chip structure on the back of the chip of the present utility model;

[0016] Figure 4 is a schematic diagram of the circuit principle of the present utility model.

[0017] In the figure: 1 - socket, 2 - control chip, 3 - control chip base plate, 4 - gold wire lead, 5 - grounding electrode, 6 - input electrode, 7 - aluminum wire lead, 8 - MOS chip, 9 - output electrode, 10 - back electrode, 11 - through hole, 12 - chip grounding electrode, 13 - chip control electrode, 14 - chip output electrode. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0018] The technical solution of the present utility model will be further described below, but the scope of protection is not limited thereto.

[0019] A ceramic patch package ideal diode includes a header 1. Grooves are machined on the end face of the header 1, and three through holes are machined in the grooves. A ground electrode 5, an input electrode 6, and an output electrode 9 that protrude from both end faces of the header 1 at both ends are respectively fixed in the three through holes. A control chip 2 and a MOS chip 8 are installed on the output electrode 9. The input terminal, output terminal, and control terminal of the control chip 2 are respectively connected to the drain, source, and gate of the MOS chip 8. The ground terminal of the control chip 2 is also connected to the ground electrode 5, and the drain of the MOS chip 8 is also connected to the input electrode 6. As Figure 1 shown, with the header 1 of the ceramic package structure as the main body, it includes three electrodes, namely the ground electrode 5, the input electrode 6, and the output electrode 9. An electrode piece is installed on the input electrode 9 and connected using a solder pad. A 380um aluminum wire bond is used on the electrode piece to form an electrical connection with the source terminal of the MOS chip. A control chip base plate 3 made of alumina silver and the MOS chip 8 are installed on the output electrode and fixed on the output electrode 9 using a solder pad;

[0020] The output electrode 9 is provided at one end of the groove, and the ground electrode 5 and the input electrode 6 are provided together at the other end of the groove. The distances between the ground electrode 5, the input electrode 6, and the output electrode 9 are all the same.

[0021] The output electrode 9 fixes the control chip 2 through the control chip base plate 3. The control chip base plate 3 is arranged adjacent to the ground electrode 5. The specific structure of the control chip base plate 3 is as Figure 2 shown. The middle part thereof is a control chip placement area. One end is provided with a ground electrode piece 12 for grounding and a chip control electrode for outputting a control signal. The other end is provided with a chip output electrode and is connected to the electrode on its back through a through hole, regarded as one electrode. The control chip placement area 1 is used to place the control chip and is connected using a solder pad to provide mechanical support. The VDD and VOUT electrodes on the surface of the control chip are connected to the base plate electrode 2 through a 20um gold wire bond to form an electrical connection with the electrode 1 (OUT). The GND electrode on the surface of the control chip is connected to the electrode 3 (GND) through a 20um gold wire bond and a jumper through the base plate electrode 3 to form an electrical connection. The VIN electrode on the surface of the control chip is connected to the source of the MOS chip 2 through a 20um gold wire bond. The GATE electrode on the surface of the control chip is connected to the gate of the MOS chip 2 through a 20um gold wire bond and a jumper through the base plate electrode 4 to form an electrical connection.

[0022] During production, the base, MOS chip, control chip base plate 3, control chip 2, and output electrode plate 9 are first subjected to a sintering process. The control chip 2 is placed on the control chip placement area on the oxidation control chip base plate 3 through a solder chip. Subsequently, the drain end of the MOS chip and the bottom of the control chip base plate 3 are placed on the base 1 through a solder chip. Immediately afterwards, the electrode plate 5 is placed at one end of the groove of the base 1 through a solder chip. Then, all components are welded together using the sintering process;

[0023] Then comes the bonding process. Using the 20um gold wire ball bonding process, the electrical connections related to the control chip are completed, as well as the electrical connections between the input electrode and the source electrode of the MOS chip, between the GATE electrode and the control chip electrode 13, between the control chip electrode 13 and the gate of the MOS chip, between the ground terminal of the control chip and the chip ground electrode 12, and between the chip ground electrode 12 and the ground electrode 5. Using the 380um aluminum wire wedge bonding process, the electrical connection between the MOS chip and the input electrode is completed;

[0024] Finally, the cover and the base are connected using the parallel seam welding process to complete the hermetic packaging.

[0025] The ideal diode of this application is mainly applied to various power supply systems or automatic control systems, etc. Its characteristics are that the product structure is compact, the surface mount packaging is convenient to use, the turn-off response time is relatively fast, the operating voltage range is wide, the internal electrode connection distance is particularly short, the parasitic parameters are very small, the power density is high, and the reliability is better at the same time.

Claims

1. A ceramic chip packaged ideal diode, comprising a tube holder (1), characterized in that: The end surface of the tube seat (1) is machined with a groove, and three through holes are machined in the groove. A grounding electrode (5), an input electrode (6), and an output electrode (9) are respectively fixed in the three through holes, both ends of which protrude from the two end surfaces of the tube seat (1). The output electrode (9) is mounted with a control chip (2) and a MOS chip (8); the output end, input end, and control end of the control chip (2) are respectively connected to the drain, source, and gate of the MOS chip (8); the grounding end of the control chip (2) is also connected to the grounding electrode (5), and the source of the MOS chip (8) is also connected to the input electrode (6).

2. The ceramic chip packaged ideal diode according to claim 1, characterized in that: The output electrode (9) is arranged at one end of the groove, and the grounding electrode (5) and the input electrode (6) are arranged together at the other end of the groove. The distances between the grounding electrode (5), the input electrode (6) and the output electrode (9) are the same.

3. The ceramic chip packaged ideal diode according to claim 1, characterized in that: The output electrode (9) fixes the control chip (2) via the control chip base plate (3); the control chip base plate (3) is arranged adjacent to the ground electrode (5); a back electrode (10) is arranged on the back of the control chip base plate (3); the back electrode (10) is in contact with the output electrode (9); the control chip (2) is mounted in the middle of the front of the control chip base plate (3); a chip grounding electrode (12) and a chip control electrode (13) are arranged on one end of the front of the control chip base plate (3) adjacent to the ground electrode (5); a through hole (11) is arranged on one end of the control chip base plate (3); and the through hole (11) is connected to the back electrode (10); The power supply terminal and the output terminal of the control chip (2) are respectively connected to the through hole (11) through the gold wire lead (4), and the control terminal and the ground terminal of the control chip (2) are respectively connected to the chip control electrode (13) and the chip ground electrode (12) through the gold wire lead (4).

4. The ceramic chip packaged ideal diode as claimed in claim 3, characterized in that: The through hole (11) is processed with a chip output electrode (14), and the chip output electrode (14) penetrates the control chip bottom plate (3) and the back electrode (10).

5. The ceramic chip packaged ideal diode according to claim 1, characterized in that: The drain electrode of the MOS chip (8) is bonded to the output electrode (9), the source electrode is connected to the input electrode (6) via an aluminum wire lead (7), and is also connected to the input end of the control chip (2) via a gold wire lead (4); and the gate electrode is connected to the chip control electrode (13) via the gold wire lead (4).