Circuit for communicating single-phase electric quantity acquisition double-wire 485 bus to wire controller and OTA

Abstract

The utility model discloses a single-phase electric quantity acquisition circuit for communicating a double-wire 485 bus to a wire controller and an OTA, a zero line part of a circuit acquisition circuit acquires a current value, and a live line part of the circuit acquisition circuit acquires a single-phase voltage value of a live line; a chip U1 of the circuit acquisition circuit performs accumulative calculation on the acquired voltage value and current value and then generates a pulse signal RX and a pulse signal TX to a 485 communication circuit; the 485 communication circuit isolates a pulse signal RX and a pulse signal TX through two optocouplers respectively and then enters a 485 chip IC1 to be processed, the 485 chip IC1 uploads processed electric energy parameter data to a bus A and a bus B, and the bus A and the bus B send the electric energy parameter data to a remote communication OTA module; and the remote communication OTA module sends the data to a computer, a mobile phone, a wire controller and other tools for displaying the electric energy parameter data. By means of the arrangement, parameters such as the effective voltage value, the effective current value, the power factor and the used electricity quantity can be transmitted without an MCU chip.

Description

Technical Field

[0001] The present invention relates to the field of data acquisition, and particularly to a circuit for single-phase power quantity acquisition with two-wire 485 bus communication to a line controller and OTA. Background Art

[0002] Currently, various countries have gradually implemented intelligent management of electricity. As a large country with a large population and high electricity consumption, China is more necessary to do a good job in intelligent management. Based on the strong promotion of the intelligentization of the distribution network, it is currently in the pilot stage. For the intelligentization of the distribution network, first of all, it is necessary to make the working conditions information of the distribution network equipment, that is, to obtain the real-time information of the working conditions of the distribution network equipment. Among them, the distribution cabinet, as a crucial link for commercial use into households, the acquisition of its working conditions information is particularly important. By detecting the load, dividing time and regions, and dynamically collecting and analyzing the real-time working conditions of the distribution cabinet, it is possible to detect and manage the electricity consumption in the area in real time, which can not only minimize the waste of electric energy and achieve reasonable electricity use, but also avoid the damage of distribution equipment caused by overloading, and achieve true intelligentization of the distribution network.

[0003] The prior art with the publication number of CN2935221Y discloses a remote measurement and control unit device with a power acquisition function. It can collect the AC voltage signal and AC current signal at the controlled site, calculate the active power and reactive power; and can perform real-time data transmission through the CAN bus method and the 485 bus method. The control circuit of the present invention uses a DSP microprocessor with high-speed computing ability, and is composed of an AC signal acquisition circuit, an analog signal processing circuit, an analog input and processing circuit, an A / D conversion circuit, a digital input circuit, a digital output circuit, an opto-isolation circuit, and a CAN bus / 485 bus communication interface circuit.

[0004] In the prior art, the device structure for collecting and measuring and controlling electric energy is complex in layout and too high in cost, and cannot be directly connected to a heat pump unit. Summary of the Invention

[0005] In order to solve the problems of complex structure and too high cost of the electric energy acquisition device in the prior art, the purpose of the present invention is to provide a circuit for single-phase power quantity acquisition with two-wire 485 bus communication to a line controller and OTA.

[0006] In order to achieve the above purpose, the present invention adopts the following technical solutions: A circuit for single-phase power quantity acquisition with two-wire 485 bus communication to a line controller and OTA, including an electric energy acquisition circuit, a 485 communication circuit, an isolation circuit module, and a remote communication OTA module;

[0007] The external power grid is connected to the electric energy acquisition circuit through a neutral wire terminal, the electric energy acquisition circuit is connected to the 485 communication circuit, and the isolation circuit module supplies power to the electric energy acquisition circuit and the 485 communication circuit;

[0008] Among them, the neutral line part of the circuit acquisition circuit collects the current value, and the live wire part of the circuit acquisition circuit collects the single-phase voltage value of the live wire. The chip U1 of the circuit acquisition circuit accumulatively calculates the collected voltage value and current value and then sends pulse signals RX and TX to the 485 communication circuit; the 485 communication circuit enters the 485 chip IC1 for processing after isolating the pulse signals RX and TX through two optocouplers respectively. The 485 chip IC1 uploads the processed power parameter data to bus A and bus B, and bus A and bus B send the power parameter data to the remote communication OTA module; the remote communication OTA module sends the data to tools such as a computer, a mobile phone, and a wired controller that display the power parameter data.

[0009] Preferably, the neutral line part of the power acquisition circuit includes a neutral line access terminal SGND and a neutral line output terminal OUT_N; the neutral line access terminal SGND is connected to the IN terminal of the chip U1, the neutral line output terminal OUT_N is connected to the IP terminal of the chip U1, the neutral line access terminal SGND and the neutral line output terminal OUT_N are connected by a line installed with a resistor R66 for collecting the current value, and the neutral line access terminal SGND and the neutral line output terminal OUT_N are connected by a line in series with capacitors C17 and C18; among them, the line installed with capacitors C17 and C18 is located between the line installed with resistor R66 and the chip U1.

[0010] Preferably, the live wire part of the power acquisition circuit includes a live wire access terminal INL, and the live wire access terminal INL is connected to the thermal ground terminal SGND of the circuit, the GND terminal of the chip U1, and the VP terminal of the chip U1 through a resistor patch capacitor; the resistor patch capacitor includes resistors R56, R57, R58, R76, R77, R63, and capacitor C8; among them, resistors R56, R57, R58, and R76 are sequentially connected in series with resistor R77 and then connected to the VP terminal and GND terminal of the chip U1 respectively; a parallel part is provided on the line between resistor R77 and the GND terminal of the chip U1, and resistors R63 and capacitor C8 are respectively installed on the two lines of the parallel part, and the line between the parallel part and the GND terminal of the chip U1 is connected to the thermal ground terminal SGND of the circuit.

[0011] Preferably, the pin 1 of the terminal block is connected to the output terminal OUT_N of the connected neutral line of the power acquisition end circuit, the pin 1 and pin 3 of the terminal block are connected, and the pin 3 of the terminal block is connected to the neutral line; the pin 2 and pin 4 of the terminal block are respectively connected to the live wire and the live wire access terminal INL of the power acquisition circuit, and the pin 2 and pin 4 in the terminal block are connected.

[0012] Preferably, the 485 communication circuit includes an optocoupler U18. The pin 4 of the receiving end of the optocoupler U18 is connected to the RX / SDI end of the chip U1 of the power acquisition circuit. The +VOUT end of the chip U2 is connected to the line between the pin 4 of the optocoupler U18 and the RX / SDI end of the chip U1 through a resistor R71. The pin 3 of the receiving end of the optocoupler U18 is connected to the cold ground end GND of the circuit. The isolated power supply circuit is connected to the pin 1 of the sending end of the optocoupler U18 through a resistor R67. The pin 2 of the sending end of the optocoupler U18 is connected to the RO end of the chip IC1. The isolated power supply circuit is connected to the circuit between the pin 2 of the optocoupler U18 and the RO end of the chip IC1 through a resistor R28.

[0013] Preferably, the 485 communication circuit includes an optocoupler U19. The +VOUT end of the chip U2 is connected to the pin 1 of the sending end of the optocoupler U19 through a resistor R68, and the +VOUT end of the chip U2 is connected to the pin 2 of the sending end of the optocoupler U19 through a resistor R75. The pin 4 of the receiving end of the optocoupler U19 is connected to the RE end and the DE end of the chip IC1 respectively through a triode Q1. The pin 3 of the receiving end of the optocoupler U19 is connected to the DI end of the chip IC1 and the cold ground end GND of the circuit respectively.

[0014] Preferably, a resistor R70 is installed on the line between the pin 4 of the optocoupler U19 and the triode Q1. The line between the pin 3 of the optocoupler U19 and the DI end of the chip IC1 is connected to the line between the pin 4 of the optocoupler U19 and the resistor R70 through a capacitor C30. A resistor R52 is installed at the DI end of the chip IC1. The isolated power supply circuit is connected to the line between the pin 3 of the optocoupler U19 and the DI end of the chip IC1 through a resistor R27. The resistor R52 is located between the resistor R27 and the DI end of the chip IC1.

[0015] Preferably, the A end of the chip IC1 is connected to the bus A, and the B end of the chip IC1 is connected to the bus B. The isolated power supply circuit is connected to the Vcc end of the chip IC1 and the bus A respectively through a line. The line between the isolated power supply circuit and the Vcc end of the chip IC1 is connected to the cold ground end GND of the circuit through a capacitor C19. The bus B is connected to the cold ground end GND of the circuit through a resistor 48. The GND end of the chip IC1 is connected to the cold ground end GND of the circuit.

[0016] Preferably, the A end of the chip IC1 is connected to the green terminal through the bus A, and the B end of the chip IC1 is connected to the green terminal through the bus B. The remote communication OTA module or the wire controller is connected to the green terminal.

[0017] Preferably, the isolated power supply circuit includes a chip U2, which includes a -VIN terminal, a +VOUT terminal, a +VIN terminal, and a –VOUT terminal. The +VIN terminal of the chip U2 supplies power to the power acquisition circuit, and the +VIN terminal and the +VOUT terminal of the chip U2 supply power to the 485 communication circuit; the -VIN terminal of the chip U2 is connected to the cold ground terminal GND, and the -VIN terminal of the chip U2 is connected to the +VIN terminal of the chip U2 through a line equipped with a capacitor C22; the –VOUT terminal of the chip U2 is connected to the hot ground terminal SGND of the circuit, and the –VOUT terminal and the +VOUT terminal of the chip U2 are connected through a line equipped with a capacitor C21.

[0018] The beneficial effects of the technical solution of the present invention are as follows: dual-line power quantity acquisition can be achieved, and parameters such as effective voltage value, effective current value, active power, apparent power, power factor, and electricity consumption can be transmitted to the 485 bus without the need for an MCU chip; the solution has the characteristics of low overall cost and large data parameter transmission volume, and through the remote communication OTA module, the uploaded data can be sent to an upper computer, a mobile phone capable of displaying data, or a computer and other devices, thus facilitating users to view the electricity consumption situation and cumulative electricity consumption situation of their own heat pump air conditioner at any time and place. The rational use of electricity in the user's home can be optimized by analyzing the electricity data of the user's home, improving the electricity consumption efficiency. Description of the Drawings

[0019] Figure 1 It is a schematic structural diagram of the power acquisition circuit;

[0020] Figure 2 It is a schematic structural diagram of the terminal block;

[0021] Figure 3 It is a schematic structural diagram of the isolated power supply circuit;

[0022] Figure 4 It is a schematic structural diagram of the 485 communication circuit. Detailed Embodiment

[0023] The embodiments of the present invention will be described in detail below. The examples of the embodiments are shown in the drawings, where the same or similar reference numerals represent the same or similar elements or elements with the same or similar functions from beginning to end. The embodiments described below with reference to the drawings are exemplary and are intended to explain the present invention and should not be construed as a limitation of the present invention.

[0024] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "clockwise", "counterclockwise", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus cannot be construed as a limitation on the present invention.

[0025] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present invention, unless otherwise specified, the meaning of "a plurality" is two or more, unless otherwise clearly defined.

[0026] In the present invention, unless otherwise clearly specified and limited, terms such as "mounted", "connected", "connected to", "fixed" and the like should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0027] In the present invention, unless otherwise clearly specified and limited, the first feature being "above" or "below" the second feature may include the direct contact between the first and second features, or may include the situation where the first and second features are not in direct contact but in contact through other features between them. Moreover, the first feature being "above", "over" and "on" the second feature includes that the first feature is directly above and obliquely above the second feature, or merely means that the horizontal height of the first feature is higher than that of the second feature. The first feature being "under", "beneath" and "under" the second feature includes that the first feature is directly below and obliquely below the second feature, or merely means that the horizontal height of the first feature is lower than that of the second feature. Embodiment

[0028] As Figures 1 to 4 shown, a single-phase power quantity acquisition two-wire 485 bus communication circuit to a line controller and OTA includes a power acquisition circuit, a 485 communication circuit, an isolation circuit module and a remote communication OTA module; the external power grid is connected to the power acquisition circuit through a neutral wire terminal, the power acquisition circuit is connected to the 485 communication circuit, and the isolation circuit module supplies power to the power acquisition circuit and the 485 communication circuit;

[0029] Among them, the neutral line part of the circuit acquisition circuit acquires the current value, and the live wire part of the circuit acquisition circuit acquires the single-phase voltage value of the live wire. The chip U1 of the circuit acquisition circuit accumulatively calculates the acquired voltage value and current value and then sends out the pulse signal RX and the pulse signal TX to the 485 communication circuit; after the 485 communication circuit isolates the pulse signal RX and the pulse signal TX through two optocouplers respectively, it enters the 485 chip IC1 for processing. The 485 chip IC1 uploads the processed power parameter data to the bus A and the bus B, and the bus A and the bus B send the power parameter data to the remote communication OTA module; the remote communication OTA module sends the data to tools such as a computer, a mobile phone, and a wire controller that display the power parameter data. Among them, the remote communication OTA module wirelessly uploads the data parameter of the electric energy to the cloud server. Next, we can use the mobile phone APP or the computer web page to display on the accessed cloud server, and can read the existing acquired power parameter data and the cumulative power parameter value of the electric energy.

[0030] With such a setting, dual-line power acquisition can be realized, and parameters such as the effective voltage value, effective current value, active power, apparent power, power factor, and consumed electricity can be transmitted to the 485 bus without the need for an MCU chip; the scheme has the characteristics of low overall cost and large data parameter transmission volume, and through the remote communication OTA module, the uploaded data can be sent to the upper computer, a mobile phone that can display data, or a computer and other devices, thus facilitating users to view the electric energy usage situation and cumulative electric energy usage situation of their own heat pump air conditioner at any time and place. The reasonable use of electric energy in the user's home can be optimized by analyzing the electric energy data of the user's home, and the power consumption efficiency can be improved.

[0031] In this embodiment, the isolated power supply circuit includes a chip U2. The chip U2 includes a -VIN terminal, a +VOUT terminal, a +VIN terminal, and a –VOUT terminal. The +VIN terminal of the chip U2 supplies power to the power acquisition circuit, and the +VIN terminal and the +VOUT terminal of the chip U2 supply power to the 485 communication circuit; the -VIN terminal of the chip U2 is connected to the cold ground terminal GND, and the -VIN terminal of the chip U2 and the +VIN terminal of the chip U2 are connected through a line installed with a capacitor C22; the –VOUT terminal of the chip U2 is connected to the hot ground terminal SGND of the circuit, and the –VOUT terminal and the +VOUT terminal of the chip U2 are connected through a line installed with a capacitor C21.

[0032] Furthermore, the +VIN terminal of the chip U2 outputs a 5V voltage, and the +VOUT terminal of the chip U2 outputs a +3.3V voltage; the model of the chip U2 is B0503S-1WR3, the specification of the capacitor C21 is: C-0603, 10%, X7R, 50V, 104; the specification of the capacitor C22 is: C-0603, 10%, X7R, 50V, 104.

[0033] In this embodiment, pin 1 of the terminal is connected to the outgoing terminal OUT_N of the neutral line connected to the power acquisition circuit. Pin 1 and pin 3 of the terminal are connected, and pin 3 of the terminal is connected to the neutral line. Pins 2 and 4 of the terminal are respectively connected to the live wire and the incoming terminal INL of the live wire of the power acquisition circuit, and pins 2 and 4 in the terminal are connected.

[0034] In this embodiment, the neutral line part of the power acquisition circuit includes a neutral line incoming terminal SGND and a neutral line outgoing terminal OUT_N. The neutral line incoming terminal SGND is connected to the IN terminal of chip U1, the neutral line outgoing terminal OUT_N is connected to the IP terminal of chip U1, and the neutral line incoming terminal SGND and the neutral line outgoing terminal OUT_N are connected by a line with a resistor R66 installed for collecting current values. The neutral line incoming terminal SGND and the neutral line outgoing terminal OUT_N are connected by a line in series with capacitors C17 and C18. Among them, the line with capacitors C17 and C18 installed is located between the line with resistor R66 installed and chip U1. Among them, resistor R66 is an alloy resistor with a specification of 1mR2575; the specifications of capacitors C17 and C18 are: 0603683 / 275VAC.

[0035] Further preferably, capacitor C17 is arranged close to the neutral line outgoing terminal OUT_N, capacitor C18 is arranged close to the neutral line incoming terminal SGND, a resistor R65 is installed on the line between resistor R66 and capacitor C17 on the neutral line outgoing terminal OUT_N, and a resistor R64 is installed on the line between resistor R66 and capacitor C18 on the neutral line incoming terminal SGND. Among them, the specifications of resistor R64 and resistor R65 are: 0603, 510Ω, 1%.

[0036] In this embodiment, the live wire part of the power acquisition circuit includes a live wire incoming terminal INL. The live wire incoming terminal INL is connected to the thermal ground terminal SGND of the circuit, the GND terminal of chip U1, and the VP terminal of chip U1 through a resistor chip capacitor. The resistor chip capacitor includes resistors R56, R57, R58, R76, R77, R63 and capacitor C8. Among them, resistors R56, R57, R58, R76, and R77 are sequentially connected in series and then respectively connected to the VP terminal and the GND terminal of chip U1. A parallel part is arranged on the line between resistor R77 and the GND terminal of chip U1. Resistor R63 and capacitor C8 are respectively installed on the two lines of the parallel part. The line between the parallel part and the GND terminal of chip U1 is connected to the thermal ground terminal SGND of the circuit. Among them, the specifications of resistors R56, R57, R58, R76, and R77 are: 0603, 390K, 1%; the specification of resistor R63 is: 0603, 510Ω, 1%; the specification of capacitor C8 is: 0603683 / 275VAC.

[0037] In this embodiment, the +VOUT terminal of chip U2 is connected to the VDD terminal of chip U1, and the line between the +VOUT terminal of chip U2 and the VDD of chip U1 is connected to the thermal ground terminal SGND of the circuit through a line with a capacitor C16 installed; the +VOUT terminal of chip U2 is connected to the SCLK-BPS terminal of chip U1.

[0038] In this embodiment, the model of chip U1 is BL0942.

[0039] In this embodiment, the 485 communication circuit includes an optocoupler U18; the pin 4 of the receiving end of the optocoupler U18 is connected to the RX / SDI terminal of the chip U1 of the power acquisition circuit, and the pulse signal RX emitted by the chip U1 in the power acquisition chip enters the optocoupler U18; the +VOUT terminal of chip U2 is connected to the line between the pin 4 of the optocoupler U18 and the RX / SDI terminal of chip U1 through a resistor R71; the pin 3 of the receiving end of the optocoupler U18 is connected to the cold ground terminal GND of the circuit; the +VIN terminal of chip U2 is connected to the pin 1 of the sending end of the optocoupler U18 through a resistor R67, and the pin 2 of the sending end of the optocoupler U18 is connected to the RO terminal of chip IC1. The +VIN terminal of chip U2 is connected to the circuit between the pin 2 of the optocoupler U18 and the RO terminal of chip IC1 through a resistor R28.

[0040] In this embodiment, the 485 communication circuit includes an optocoupler U19; the +VOUT terminal of chip U2 is connected to the pin 1 of the sending end of the optocoupler U19 through a resistor R68, and the +VOUT terminal of chip U2 is connected to the pin 2 of the sending end of the optocoupler U19 through a resistor R75; the pin 2 of the sending end of the optocoupler U19 is connected to the TX / SDO terminal of the chip U1 of the power acquisition circuit, and the pulse signal TX emitted by the chip U1 in the power acquisition chip enters the optocoupler U19; the pin 4 of the receiving end of the optocoupler U19 is connected to the RE terminal and the DE terminal of chip IC1 respectively through a triode Q1, and the pin 3 of the receiving end of the optocoupler U19 is connected to the DI terminal of chip IC1 and the cold ground terminal GND of the circuit respectively.

[0041] Further, the pin 3 and pin 4 of the optocoupler U19 are connected to the DI terminal of chip IC1 through a line with a capacitor C30 and a resistor R52 installed. The capacitor C30 is located between the pin 3 and pin 4 of the optocoupler U19, and the resistor R52 is located between the pin 4 of the optocoupler U19 and the DI terminal of chip IC1; the +VIN terminal of chip U2 is connected to the line between the pin 4 of the optocoupler U19 and the resistor R52 through a resistor R27.

[0042] Further, the pin 4 of the receiving end of the optocoupler U19 is connected to the base of the triode Q1 through the resistor R70. The emitter of the triode Q1 is connected to the cold ground terminal GND of the circuit, and the collector of the triode Q1 is respectively connected to the RE terminal and the DE terminal of the chip IC1.

[0043] With such a setting, the hot ground terminal SGND of the electric energy acquisition end is isolated from the cold ground terminal GND of the 485 communication end through the optocoupler, thereby protecting the communication security of the backend and electronic components.

[0044] In this embodiment, the A terminal of the chip IC1 is connected to the bus A, and the B terminal of the chip IC1 is connected to the bus B; the +VIN terminal of the chip U2 is respectively connected to the Vcc terminal of the chip IC1 and the bus A through a circuit. The circuit between the +VIN terminal of the chip U2 and the Vcc terminal of the chip IC1 is connected to the cold ground terminal GND of the circuit through the capacitor C19; the bus B is connected to the cold ground terminal GND of the circuit through the resistor 48; the GND terminal of the chip IC1 is connected to the cold ground terminal GND of the circuit.

[0045] In this embodiment, the A terminal of the chip IC1 is connected to the green terminal through the bus A, and the B terminal of the chip IC1 is connected to the green terminal through the bus B; the remote communication OTA module is connected to the green terminal. Specifically, the A terminal of the chip is connected to the green terminal through the bus A installed with the resettable fuse PCT2, and the B terminal of the chip is connected to the green terminal through the bus B of the resettable fuse PCT1; the bus A is connected to the cold end GND of the circuit through the transient voltage suppression diode TVS2, and the bus B is connected to the cold end GND of the circuit through the transient voltage suppression diode TVS1.

[0046] In this embodiment, the green terminal includes the JP32 terminal and the JP13 terminal. The bus A is connected to the pin 4 and the pin 5 of the JP13 terminal after passing through the pin 2 of the JP32 terminal. The bus B is connected to the pin 2 and the pin 3 of the JP13 terminal after passing through the pin 3 of the JP32 terminal. The pin 4 of the JP32 terminal is connected to the pin 1 of the JP13 terminal. The circuit between the pin 4 of the JP32 terminal and the pin 1 of the JP13 terminal is connected to the +VIN terminal of the isolation power supply circuit. The pin 1 of the JP32 terminal is connected to the pin 6 of the JP13 terminal. The circuit between the pin 1 of the JP32 terminal and the pin 6 of the JP13 terminal is connected to the cold ground terminal GND of the circuit.

[0047] In the description of this specification, the descriptions referring to terms such as "one embodiment", "some embodiments", "examples", "specific examples", or "some examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0048] Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present invention without departing from the principles and purposes of the present invention.

Claims

1. A single-phase power consumption acquisition circuit with two-wire 485 bus communication to the line controller and OTA, characterized in that: It includes an electric energy acquisition circuit, a 485 communication circuit, an isolation circuit module, and a remote communication OTA module; The external power grid is connected to the electric energy acquisition circuit through the neutral wire terminal. The electric energy acquisition circuit is connected to the 485 communication circuit, and the isolation circuit module supplies power to the electric energy acquisition circuit and the 485 communication circuit; Among them, the neutral wire part of the circuit acquisition circuit can collect the current value, the live wire part of the circuit acquisition circuit can collect the single-phase voltage value of the live wire, and the chip U1 of the circuit acquisition circuit can perform cumulative calculation on the collected voltage value and current value and then send pulse signals RX and pulse signals TX to the 485 communication circuit; the 485 communication circuit can isolate the pulse signals RX and pulse signals TX respectively through two optocouplers and then send them to the 485 chip IC1 for processing. The 485 chip IC1 can upload the processed electric energy parameter data to bus A and bus B, and bus A and bus B can send the electric energy parameter data to the remote communication OTA module; the remote communication OTA module can send the data to tools such as computers, mobile phones, and wire controllers that display the electric energy parameter data.

2. The circuit of a single-phase power consumption acquisition with two-wire 485 bus communication to the line controller and OTA according to claim 1, wherein: The neutral wire part of the electric energy acquisition circuit includes a neutral wire access terminal SGND and a neutral wire output terminal OUT_N; The neutral wire access terminal SGND is connected to the IN terminal of the chip U1, the neutral wire output terminal OUT_N is connected to the IP terminal of the chip U1, the neutral wire access terminal SGND and the neutral wire output terminal OUT_N are connected through a line installed with a resistor R66 for collecting the current value, and the neutral wire access terminal SGND and the neutral wire output terminal OUT_N are connected through a line in series with a capacitor C17 and a capacitor C18; among them, the line installed with the capacitor C17 and the capacitor C18 is located between the line installed with the resistor R66 and the chip U1.

3. A circuit for single-phase power consumption acquisition with two-wire 485 bus communication to a line controller and OTA, characterized in that: The live wire part of the electric energy acquisition circuit includes a live wire access terminal INL, and the live wire access terminal INL is connected to the thermal ground terminal SGND of the circuit, the GND terminal of the chip U1, and the VP terminal of the chip U1 through a resistor patch capacitor; The resistor patch capacitor includes resistors R56, R57, R58, R76, R77, R63, and a capacitor C8; among them, the resistors R56, R57, R58, R76, and R77 are connected in series in sequence and then connected to the VP terminal and the GND terminal of the chip U1 respectively; A parallel part is provided on the line between the resistor R77 and the GND terminal of the chip U1, the resistor R63 and the capacitor C8 are respectively installed on the two lines of the parallel part, and the line between the parallel part and the GND terminal of the chip U1 is connected to the thermal ground terminal SGND of the circuit.

4. A circuit for single-phase power consumption acquisition with two-wire 485 bus communication to a line controller and OTA, characterized in that: The 485 communication circuit includes an optocoupler U18; Pin 4 of the receiving end of optocoupler U18 is connected to the RX / SDI terminal of chip U1 of the power acquisition circuit. The +VOUT terminal of chip U2 is connected to the line between pin 4 of optocoupler U18 and the RX / SDI terminal of chip U1 through resistor R71. Pin 3 of the receiving end of optocoupler U18 is connected to the cold ground terminal GND of the circuit. The isolated power supply circuit is connected to pin 1 of the transmitting end of optocoupler U18 through resistor R67. Pin 2 of the transmitting end of optocoupler U18 is connected to the RO terminal of chip IC1. The isolated power supply circuit is connected to the circuit between pin 2 of optocoupler U18 and the RO terminal of chip IC1 through resistor R28.

5. A circuit for single-phase power quantity acquisition with two-wire 485 bus communication to a line controller and OTA, characterized in that: The 485 communication circuit includes optocoupler U19. The +VOUT terminal of chip U2 is connected to pin 1 of the transmitting end of optocoupler U19 through resistor R68, and the +VOUT terminal of chip U2 is connected to pin 2 of the transmitting end of optocoupler U19 through resistor R75. Pin 4 of the receiving end of optocoupler U19 is connected to the RE terminal and the DE terminal of chip IC1 respectively through triode Q1. Pin 3 of the receiving end of optocoupler U19 is connected to the DI terminal of chip IC1 and the cold ground terminal GND of the circuit respectively.

6. A circuit for single-phase power consumption acquisition with two-wire 485 bus communication to a line controller and OTA, characterized in that: Resistor R70 is installed on the line between pin 4 of optocoupler U19 and triode Q1. The line between pin 3 of optocoupler U19 and the DI terminal of chip IC1 is connected to the line between pin 4 of optocoupler U19 and resistor R70 through capacitor C30. Resistor R52 is installed at the DI terminal of chip IC1. The isolated power supply circuit is connected to the line between pin 3 of optocoupler U19 and the DI terminal of chip IC1 through resistor R27. Resistor R52 is located between resistor R27 and the DI terminal of chip IC1.

7. A circuit for single-phase power consumption acquisition with two-wire 485 bus communication to a line controller and OTA, characterized in that: Terminal A of chip IC1 is connected to bus A, and terminal B of chip IC1 is connected to bus B. The isolated power supply circuit is connected to the Vcc terminal of chip IC1 and bus A respectively through lines. The line between the isolated power supply circuit and the Vcc terminal of chip IC1 is connected to the cold ground terminal GND of the circuit through capacitor C19. Bus B is connected to the cold ground terminal GND of the circuit through resistor 48. The GND terminal of chip IC1 is connected to the cold ground terminal GND of the circuit.

8. A circuit for single-phase power quantity acquisition with two-wire 485 bus communication to a line controller and OTA, characterized in that: Terminal A of chip IC1 is connected to the green terminal through bus A, and terminal B of chip IC1 is connected to the green terminal through bus B. The remote communication OTA module or the wire controller is connected to the green terminal.

9. The circuit for single-phase power consumption acquisition with two-wire 485 bus communication to the line controller and OTA according to claim 1, characterized in that: The isolated power supply circuit includes chip U2. Chip U2 includes -VIN terminal, +VOUT terminal, +VIN terminal and –VOUT terminal. The +VIN terminal of chip U2 supplies power to the power acquisition circuit. The +VIN terminal and the +VOUT terminal of chip U2 supply power to the 485 communication circuit. The -VIN terminal of chip U2 is connected to the cold ground terminal GND. The -VIN terminal and the +VIN terminal of chip U2 are connected through a line installed with capacitor C22. The –VOUT terminal of chip U2 is connected to the hot ground terminal SGND of the circuit. The –VOUT terminal and the +VOUT terminal of chip U2 are connected through a line installed with capacitor C21.

10. A single-phase power consumption acquisition two-wire 485 bus communication circuit to a line controller and OTA, characterized in that: The pin 1 of the terminal is connected to the outgoing end OUT_N of the neutral wire connected to the power energy acquisition terminal circuit. The pin 1 and pin 3 of the terminal are connected. The pin 3 of the terminal is connected to the neutral wire. The pin 2 and pin 4 of the terminal are respectively connected to the live wire and the incoming end INL of the live wire of the power energy acquisition circuit. The pin 2 and pin 4 in the terminal are connected.

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