Pulse power supply with voltage-limiting and current-limiting functions

Abstract

The utility model discloses a pulse power supply with voltage limiting and current limiting functions, which comprises a rectification inverter circuit and a chopper circuit, the rectification inverter circuit inputs power frequency alternating current and outputs controllable direct current, and the chopper circuit inputs controllable direct current and outputs pulse current; the inverter control circuit controls and outputs a pulse width driving signal to the rectification inverter circuit according to the voltage control signal; the system is characterized in that the system also comprises a voltage limiting acquisition circuit and a current limiting acquisition circuit, and the voltage limiting acquisition circuit collects a voltage signal of the controllable direct current and outputs a voltage limiting control signal; the current-limiting acquisition circuit acquires a current signal of the controllable direct current and outputs a current-limiting control signal; after a voltage limiting control signal or a current limiting control signal is input into the inversion control circuit, the duty ratio of an output pulse width driving signal is zero, and then the voltage and current of the controllable direct current are controlled to be zero. The voltage limiting and the current limiting of the direct current input to the chopper circuit are realized.

Description

Technical Field

[0001] The utility model relates to the technical field of pulse power supplies, and particularly to a pulse power supply with overvoltage and overcurrent limiting functions. Background Art

[0002] High-frequency pulse power supplies are applicable to electroplating gold, silver, nickel, tin, and alloys, and can significantly improve the functionality of the coating; they include a rectification and inversion circuit that converts industrial-frequency alternating current into direct current, and a chopper circuit that converts direct current into pulsed current. By controlling the duty cycle of the pulse-width drive signal sent to the rectification and inversion circuit, the current and voltage of the direct current can be controlled.

[0003] By directly setting the duty cycle of the pulse-width drive signal, the pulsed current finally output reaches the required voltage or current. However, when setting the duty cycle, the duty cycle may be set too high, resulting in overvoltage or overcurrent of the direct current, and further causing overvoltage or overcurrent of the pulsed current output by the chopper circuit.

[0004] Disadvantages of the prior art: The direct current input to the chopper circuit is not limited in voltage and current, and finally, the output pulsed current may be overvoltage or overcurrent. Summary of the Utility Model

[0005] In view of at least one defect of the prior art, the purpose of the utility model is to provide a pulse power supply with overvoltage and overcurrent limiting functions, which can limit the voltage and current of the direct current input to the chopper circuit.

[0006] To achieve the above purpose, the utility model adopts the following technical scheme: A pulse power supply with overvoltage and overcurrent limiting functions includes a rectification and inversion circuit and a chopper circuit. The rectification and inversion circuit inputs industrial-frequency alternating current and outputs controllable direct current, and the chopper circuit inputs controllable direct current and outputs pulsed current.

[0007] It further includes an inversion control circuit. The inversion control circuit inputs a voltage control signal, outputs a pulse-width drive signal to the rectification and inversion circuit, and controls the duty cycle of the pulse-width drive signal according to the voltage control signal, thereby controlling the voltage and current of the controllable direct current.

[0008] The key lies in: It further includes an overvoltage acquisition circuit and an overcurrent acquisition circuit. The overvoltage acquisition circuit acquires the voltage signal of the controllable direct current and outputs an overvoltage control signal; the overcurrent acquisition circuit acquires the current signal of the controllable direct current and outputs an overcurrent control signal.

[0009] The voltage control signal includes an overvoltage control signal and an overcurrent control signal. After the inversion control circuit inputs the overvoltage control signal or the overcurrent control signal, the duty cycle of the output pulse-width drive signal is zero, thereby controlling the voltage and current of the controllable direct current to be zero.

[0010] The overvoltage protection circuit and overcurrent protection circuit collect the voltage signal and current signal of the controllable direct current, and output an overvoltage control signal and an overcurrent control signal. The inverter control circuit outputs a pulse width drive signal with a duty cycle of zero according to the overvoltage control signal or the overcurrent control signal, thereby controlling the voltage of the controllable direct current to zero, and realizing overvoltage protection and overcurrent protection for the controllable direct current input to the chopper circuit.

[0011] Furthermore, the overvoltage protection circuit includes operational amplifier U5B;

[0012] The +12V power supply terminal is connected to the front end of resistor R315. The rear end of resistor R315 is connected in reverse series with zener diode D306 and then grounded. The common terminal of resistor R315 and zener diode D306 is connected to the inverting terminal of operational amplifier U5B;

[0013] The voltage acquisition terminal VY of the controllable direct current is connected to the front end of resistor R312. The rear end of resistor R312 is connected to the front end of adjustable resistor VR5. The rear end of adjustable resistor VR5 is connected in series with resistor R314 and then grounded. The sliding terminal of adjustable resistor VR5 is connected to the non-inverting terminal of operational amplifier U5B;

[0014] The output terminal of operational amplifier U5B is connected to the anode of diode D307, and the cathode of diode D307 is connected to the inverter control circuit;

[0015] When the controllable direct current is overvoltage, the voltage at the non-inverting terminal of operational amplifier U5B is greater than the voltage at the inverting terminal. Operational amplifier U5B outputs a high level, controlling the duty cycle of the pulse width drive signal output by the inverter control circuit to be zero, thereby controlling the voltage and current of the controllable direct current to be zero;

[0016] The rear end of resistor R312 is connected in series with capacitor C314 and then grounded. The non-inverting terminal of operational amplifier U5B is connected in series with capacitor C315 and then grounded. The inverting terminal of operational amplifier U5B is connected in series with capacitor C316 and then grounded. The inverting terminal of operational amplifier U5B is connected to the anode of capacitor C317, and the cathode of capacitor C317 is connected to the output terminal of operational amplifier U5B.

[0017] The voltage signal of the controllable direct current passes through the voltage dividing circuit composed of resistor R312, adjustable resistor VR5 and resistor R314, and then is input to the non-inverting terminal of operational amplifier U5B. A fixed voltage is input to the inverting terminal of operational amplifier U5B, and the magnitude of this fixed voltage is the regulated voltage value of zener diode D306. When the voltage signal of the controllable direct current exceeds the overvoltage threshold, the voltage at the non-inverting terminal of operational amplifier U5B is higher than that at the inverting terminal, and the output terminal of operational amplifier U5B outputs a high level, controlling the duty cycle of the pulse width drive signal output by the inverter control circuit to be zero, thereby controlling the voltage of the controllable direct current to be zero and realizing overvoltage protection; when the voltage signal of the controllable direct current is lower than the overvoltage threshold, the voltage at the non-inverting terminal of operational amplifier U5B is lower than that at the inverting terminal, and the output terminal of operational amplifier U5B outputs a low level, which does not affect the duty cycle of the pulse width drive signal; by adjusting the adjustable resistor VR5, the overvoltage threshold can be adjusted;

[0018] Diode D307 can not only ensure that the duty cycle of the pulse width drive signal can be normally controlled to be zero when the output of operational amplifier U5B is high, but also ensure that the duty cycle of the pulse width drive signal is not affected when the output of operational amplifier U5B is low, and at the same time ensure that other signals at the negative terminal of diode D307 do not interfere with operational amplifier U5B.

[0019] Furthermore, the current limiting and sampling circuit includes operational amplifiers U5C and U5D;

[0020] The current sampling terminal IY of the controllable direct current is connected to the front end of resistor R316, the rear end of resistor R316 is connected to the front end of resistor R317, the rear end of resistor R317 is connected to the inverting terminal of operational amplifier U5C, the non-inverting terminal of operational amplifier U5C is grounded, the output terminal of operational amplifier U5C is connected to the rear end of resistor R318, and the front end of resistor R318 is connected to the inverting terminal of operational amplifier U5C;

[0021] The output terminal of operational amplifier U5C is connected to the front end of adjustable resistor VR6, the rear end of adjustable resistor VR6 is grounded after being in series with resistor R319, and the sliding end of adjustable resistor VR6 is connected to the non-inverting terminal of operational amplifier U5D;

[0022] The +12V power supply terminal is connected to the front end of resistor R320, the rear end of resistor R320 is connected to the ground after being reversely connected in series with zener diode D308, and the common terminal of resistor R320 and zener diode D308 is connected to the inverting terminal of operational amplifier U5D;

[0023] The output terminal of operational amplifier U5D is connected to the positive electrode of diode D309, and the negative electrode of diode D309 is connected to the inverter control circuit;

[0024] When the controllable direct current is overcurrent, the current signal is converted into a voltage signal by operational amplifier U5C, and then the comparator function is realized by operational amplifier U5D. Furthermore, operational amplifier U5D outputs a high level to control the duty cycle of the pulse-width drive signal output by the inverter control circuit to be zero, and further control the voltage and current of the controllable direct current to be zero;

[0025] The rear end of resistor R316 is grounded after being connected in series with capacitor C318, the output end of operational amplifier U5C is grounded after being connected in series with capacitor C320, and a capacitor C319 is connected in parallel across resistor R318; the inverting terminal of operational amplifier U5D is grounded after being connected in series with capacitor C321, the inverting terminal of operational amplifier U5D is connected to the positive electrode of capacitor C322, and the negative electrode of capacitor C322 is connected to the output end of operational amplifier U5D.

[0026] The current signal of the controllable direct current first passes through the current-to-voltage circuit composed of operational amplifier U5C, and then passes through the voltage-dividing circuit composed of adjustable resistor VR6 and resistor R319, and then is input to the non-inverting terminal of operational amplifier U5D. A fixed-value voltage is input to the inverting terminal of operational amplifier U5D, and the magnitude of this fixed-value voltage is the regulated voltage value of zener diode D308;

[0027] When the current signal of the controllable direct current exceeds the overcurrent threshold, the voltage at the non-inverting terminal of operational amplifier U5D is greater than the voltage at the inverting terminal, and operational amplifier U5D outputs a high level to control the duty cycle of the pulse-width drive signal output by the inverter control circuit to be zero, and further control the voltage of the controllable direct current to be zero, realizing current-limiting protection; when the current signal of the controllable direct current is lower than the overcurrent threshold, the voltage at the non-inverting terminal of operational amplifier U5B is lower than the voltage at the inverting terminal, and operational amplifier U5D outputs a low level, which does not affect the duty cycle of the pulse-width drive signal; by adjusting the adjustable resistor VR6, the overcurrent threshold can be adjusted;

[0028] Diode D309 can not only ensure that the duty cycle of the pulse-width drive signal can be normally controlled to be zero when operational amplifier U5D outputs a high level, but also ensure that it does not affect the duty cycle of the pulse-width drive signal when operational amplifier U5D outputs a low level. At the same time, it also ensures that other signals at the negative terminal of diode D309 do not interfere with operational amplifier U5D.

[0029] Furthermore, the inverter control circuit includes a pulse-width modulation circuit and a pulse-width drive circuit;

[0030] After the pulse-width modulation circuit inputs the voltage-controlled signal, it outputs a pulse-width control signal. After the inverter drive circuit inputs the pulse-width control signal, it outputs a pulse-width drive signal;

[0031] The pulse-width modulation circuit is used for: controlling the duty cycle of the pulse-width control signal according to the voltage-controlled signal;

[0032] The pulse-width drive circuit is used for: isolating and enhancing the driving ability of the pulse-width drive signal.

[0033] Since the switching transistors in the rectifier-inverter circuit have high power and are vulnerable devices, directly applying the pulse-width modulation circuit for control has insufficient driving ability first, and secondly, it is easy to damage the pulse-width modulation circuit and other circuits connected to the pulse-width modulation circuit. However, the pulse-width driving circuit not only realizes isolation but also improves the driving ability of the pulse-width driving signal.

[0034] Furthermore, the pulse-width modulation circuit includes a pulse-width modulation chip U4, and the model of the pulse-width modulation chip U4 is SW494;

[0035] The +V1 terminal of the pulse-width modulation chip U4 is grounded through a series resistor R302, the +V2 terminal of the pulse-width modulation chip U4 is grounded through a series resistor R301, the -V1 terminal and -V2 terminal of the pulse-width modulation chip U4 are grounded through a series resistor R303, and the voltage-controlled signal is input to the +V1 terminal or +V2 terminal of the pulse-width modulation chip U4;

[0036] The E1 terminal and E2 terminal of the pulse-width modulation chip U4 output two groups of the pulse-width control signals with dead-time complementary;

[0037] The first pin and the third pin of the terminal group JP7 are short-circuited to ground the E1 terminal and E2 terminal of the pulse-width modulation chip U4, and the duty cycle is forced to be zero.

[0038] With the dead-time and complementary pulse-width control signals, it is possible to avoid the current conflict and short-circuit problems caused by the conduction and switching of the switching transistors in the rectifier-inverter circuit.

[0039] Furthermore, the -V1 terminal and -V2 terminal of the pulse-width modulation chip U4 are grounded through a series capacitor C304; the +V1 terminal of the pulse-width modulation chip U4 is grounded through a series capacitor C303; the +V2 terminal of the pulse-width modulation chip U4 is grounded through a series capacitor C301; the +V2 terminal of the pulse-width modulation chip U4 is grounded through a series capacitor C302.

[0040] The voltage-controlled signal input to the +V1 terminal of the pulse-width modulation chip U4 is filtered by the capacitor C303, and the voltage-controlled signal input to the +V2 terminal of the pulse-width modulation chip U4 is filtered and prevented from sudden change by the capacitors C301 and C302.

[0041] Furthermore, the pulse-width driving circuit includes an opto-isolation chip U1;

[0042] The E1 terminal of the pulse-width modulation chip U4 is connected to the front end of a resistor R103, the rear end of the resistor R103 is connected to the positive input terminal of the opto-isolation chip U1, and the negative input terminal of the opto-isolation chip U1 is grounded;

[0043] The output terminal of the optocoupler isolation chip U1 is connected to the bases of the NPN transistor Q1 and the PNP transistor Q2. The +20V power supply terminal is connected to the collector of the transistor Q1. The emitter of the transistor Q1 is connected to the emitter of the transistor Q2. The collector of the transistor Q2 is grounded. The common terminal of the transistors Q1 and Q2 outputs the pulse width drive signal.

[0044] Through the optocoupler isolation chip of the pulse width drive circuit, the isolation function is realized. Through the push-pull output circuit composed of the NPN transistor and the PNP transistor, the driving ability of the pulse width drive signal is enhanced.

[0045] Furthermore, the +20V power supply terminal is connected to the front end of the resistor R101. The rear end of the resistor R101 is connected to the ground after being connected in series with the reverse voltage stabilizing diode D101. The common terminal of the resistor R101 and the voltage stabilizing diode D101 is connected to the second pin of the terminal group JP1.

[0046] The common terminal of the transistors Q1 and Q2 is connected to the front end of the resistor R107. The rear end of the resistor R107 is connected to the front end of the resistor R108. The rear end of the resistor R108 is connected to the second pin of the terminal group JP1. The common terminal of the resistor R107 and the resistor R108 is connected to the first pin of the terminal group JP1.

[0047] A bidirectional voltage stabilizing diode DW1 is connected in series between the first pin and the second pin of the terminal group JP1.

[0048] When the transistor Q1 is turned on, a positive voltage exists between the first pin and the second pin of the terminal group JP1. When the transistor Q2 is turned on, a negative voltage exists between the first pin and the second pin of the terminal group JP1.

[0049] The first pin and the second pin of the terminal group JP1 output a set of the pulse width drive signal.

[0050] When the transistor Q2 is turned on, a negative voltage exists between the first pin and the second pin of the terminal group JP1, realizing the function of reverse turn-off of the pulse width drive signal. The reverse turn-off voltage value of the pulse width drive signal is the voltage stabilizing value of the voltage stabilizing diode D101, and the forward conduction voltage value of the pulse width drive signal is the voltage stabilizing value of the bidirectional voltage stabilizing diode DW1.

[0051] Furthermore, the collector of the transistor Q1 is connected to the collector of the transistor Q2 after being connected in series with the capacitor C101. The collector of the transistor Q1 is connected to the collector of the transistor Q2 after being connected in series with the capacitor C102. The reverse voltage stabilizing diode D101 is connected in parallel with the capacitor C103. The reverse voltage stabilizing diode D101 is connected in parallel with the capacitor C104.

[0052] The signals output from the first pin of terminal group JP1 can be filtered and the start-up impact can be smoothed through capacitors C103 and C104; the signals output from the second pin of terminal group JP1 can be filtered and the start-up impact can be smoothed through capacitors C103 and C104.

[0053] Significant effects: The present utility model provides a pulse power supply with voltage-limiting and current-limiting functions, which can limit the voltage and current of the direct current input to the chopper circuit. At the same time, when the voltage is lower than the voltage-limiting threshold and the current is lower than the current-limiting threshold, it can automatically recover, has a reverse shutdown function and an isolation function, and has strong driving ability. Description of the Drawings

[0054] Figure 1 is the module structure diagram of the present utility model;

[0055] Figure 2 is the schematic diagram of the rectifier-inverter circuit;

[0056] Figure 3 is the schematic diagram of the pulse width modulation circuit;

[0057] Figure 4 is the schematic diagram of the pulse width drive circuit;

[0058] Figure 5 is the schematic diagram of the voltage-limiting acquisition circuit;

[0059] Figure 6 is the schematic diagram of the current-limiting acquisition circuit. Detailed Implementation Modes

[0060] The present utility model will be further described in detail below with reference to the drawings and specific embodiments.

[0061] As Figure 1 shown, a pulse power supply with voltage-limiting and current-limiting functions includes a rectifier-inverter circuit and a chopper circuit. The rectifier-inverter circuit inputs industrial frequency alternating current and outputs controllable direct current. The chopper circuit inputs controllable direct current and outputs pulsed electricity;

[0062] It further includes an inverter control circuit. The inverter control circuit inputs a voltage control signal, outputs a pulse width drive signal to the rectifier-inverter circuit, controls the duty cycle of the pulse width drive signal according to the voltage control signal, and further controls the voltage and current of the controllable direct current;

[0063] It further includes a voltage-limiting acquisition circuit and a current-limiting acquisition circuit. The voltage-limiting acquisition circuit acquires the voltage signal of the controllable direct current and outputs a voltage-limiting control signal; the current-limiting acquisition circuit acquires the current signal of the controllable direct current and outputs a current-limiting control signal;

[0064] The voltage-controlled signal includes a voltage-limiting control signal and a current-limiting control signal. After the inverter control circuit inputs the voltage-limiting control signal or the current-limiting control signal, the duty cycle of the pulse-width drive signal output is zero, thereby controlling the voltage and current of the controllable direct current to be zero.

[0065] It also includes a low-voltage power supply. Using existing mature technologies, it provides a +20V power supply terminal, a +12V power supply terminal, a -12V power supply terminal, and an L5V power supply terminal to supply power to the inverter control circuit, the voltage-limiting acquisition circuit, and the current-limiting acquisition circuit.

[0066] The rectifier-inverter circuit includes a power-frequency rectifier circuit, a first filter circuit, a high-frequency inverter circuit, a high-frequency rectifier circuit, and a second filter circuit connected in sequence;

[0067] The power-frequency rectifier circuit is used to: rectify the input three-phase alternating current;

[0068] The first filter circuit is used to: filter out the three-phase ripple generated after the rectification by the power-frequency rectifier circuit.

[0069] The high-frequency inverter circuit is used to: invert the direct current output by the first filter circuit into high-frequency alternating current according to the pulse-width drive signal, and perform step-up or step-down;

[0070] The high-frequency rectifier circuit is used to: rectify the high-frequency alternating current into direct current;

[0071] The second filter circuit is used to: filter out the high-frequency ripple generated after the rectification by the high-frequency rectifier circuit, and output the controllable direct current.

[0072] As Figure 2 shown, the power-frequency rectifier circuit is a three-phase full-bridge rectifier circuit composed of diode D91, diode D92, diode D93, diode D94, diode D5, and diode D6. The power-frequency rectifier circuit inputs three-phase alternating current and outputs direct current with three-phase ripple;

[0073] The first filter circuit is composed of inductor L11, capacitor C11, and capacitor C12, and filters the direct current with three-phase ripple;

[0074] The high-frequency inverter circuit is composed of switch tube IGBT1, switch tube IGBT2, switch tube IGBT3, switch tube IGBT4, overcurrent sampling resistor R815, and transformer T1; the inverter circuit composed of switch tube IGBT1, switch tube IGBT2, switch tube IGBT3, and switch tube IGBT4 inverts the direct current output by the first filter circuit into high-frequency alternating current, and then performs step-up or step-down through transformer T1; the overcurrent sampling resistor R815 can sample the current of the inverted high-frequency alternating current;

[0075] The high-frequency rectifier circuit mainly includes diode D96 and diode D97; both ends of the secondary side of transformer T1 are respectively connected to the anodes of diode D96 and diode D97, the cathodes of diode D96 and diode D97 serve as the positive output terminal of the high-frequency rectifier circuit, and the center tap of the secondary side of transformer T1 serves as the negative output terminal of the high-frequency rectifier circuit; the high-frequency rectifier circuit rectifies the high-frequency alternating current boosted or bucked by transformer T1 into direct current with high-frequency ripple.

[0076] The second filter circuit mainly includes inductor L12, which filters out the high-frequency ripple so that the controllable direct current output has no ripple.

[0077] By inputting a group of pulse-width drive signals to the gates of IGBT1 and IGBT4, or inputting another group of pulse-width drive signals to the gates of IGBT2 and IGBT3, the control of the controllable direct current output by the second filter circuit can be achieved. The two groups of pulse-width drive signals are complementary and have a dead zone. When the duty cycle of the pulse-width drive signal is zero, the high-frequency inverter circuit stops inverting, and the voltage and current of the controllable direct current output are zero.

[0078] The pulse-width drive signal is output by the inverter control circuit, and the duty cycle of the pulse-width drive signal is controlled by the voltage-controlled signal input to the inverter control circuit.

[0079] As Figure 1 shown, the inverter control circuit includes a pulse-width modulation circuit and a pulse-width drive circuit.

[0080] After the pulse-width modulation circuit inputs the voltage-controlled signal, it outputs a pulse-width control signal. After the inverter drive circuit inputs the pulse-width control signal, it outputs a pulse-width drive signal.

[0081] The pulse-width modulation circuit is used to: control the duty cycle of the pulse-width control signal according to the voltage-controlled signal.

[0082] The pulse-width drive circuit is used to: isolate and enhance the driving ability of the pulse-width drive signal.

[0083] Since the switching tubes in the rectifier-inverter circuit have a high power and are vulnerable devices, when directly controlled by the pulse-width modulation circuit, firstly, the driving ability is insufficient, and secondly, the pulse-width modulation circuit and other circuits connected to the pulse-width modulation circuit are easily damaged. However, through the pulse-width drive circuit, both isolation is achieved and the driving ability of the pulse-width drive signal is enhanced.

[0084] As Figure 3 shown, the pulse-width modulation circuit includes pulse-width modulation chip U4, and the model of pulse-width modulation chip U4 is SW494.

[0085] The +V1 terminal of the pulse width modulation chip U4 is grounded after being in series with resistor R302, the +V2 terminal of the pulse width modulation chip U4 is grounded after being in series with resistor R301, the -V1 terminal and -V2 terminal of the pulse width modulation chip U4 are grounded after being in series with resistor R303, and the voltage-controlled signal is input to the +V1 terminal or +V2 terminal of the pulse width modulation chip U4;

[0086] The E1 terminal and E2 terminal of the pulse width modulation chip U4 output two groups of the pulse width control signals with dead zone and complementarity;

[0087] The RT terminal of the pulse width modulation chip U4 is connected to the front end of resistor R305, the rear end of resistor R305 is connected to the front end of resistor R306, and the rear end of resistor R306 is grounded; the CT terminal of the pulse width modulation chip U4 is grounded after being in series with capacitor C306, the VREF terminal of the pulse width modulation chip U4 is connected to the front end of resistor R330, the rear end of resistor R330 is connected to the front end of resistor R304, the rear end of resistor R304 is grounded, and the common terminal of resistor R330 and resistor R304 is connected to the DTC terminal of the pulse width modulation chip U4; the VREF terminal and OC terminal of the pulse width modulation chip U4 are connected to the L5V power supply terminal;

[0088] By adjusting the capacitance value or resistance value of capacitor C306, resistor R305 and resistor R306, the frequency of the pulse width control signal is adjusted; by adjusting the resistance values of resistor R330 and resistor R304, the dead time of the pulse width control signal output from the E1 terminal and E2 terminal of the pulse width modulation chip U4 is adjusted;

[0089] By adjusting the voltage-controlled signal input to the +V1 terminal or +V2 terminal of the pulse width modulation chip U4, the duty cycle of the pulse width control signal output from the E1 terminal and E2 terminal of the pulse width modulation chip U4 is adjusted;

[0090] By using the pulse width control signals with dead zone and complementarity, the current conflict and short circuit problems caused by the conduction and switching of the switching tubes in the rectifier-inverter circuit can be avoided.

[0091] The E1 terminal of the pulse width modulation chip U4 is connected to the positive pole of diode D301, the E2 terminal of the pulse width modulation chip U4 is connected to the positive pole of diode D302, the negative pole of diode D301 is connected to the negative pole of diode D302, the common terminal of diode D301 and diode D302 is grounded after being in series with resistor R313, and the common terminal of diode D301 and diode D302 is connected to the first pin of terminal group JP7, and the third pin of terminal group JP7 is grounded;

[0092] The first pin and the third pin of terminal group JP7 are short-circuited to ground the E1 terminal and E2 terminal of the pulse width modulation chip U4, and the duty cycle is forced to be zero.

[0093] The -V1 terminal and -V2 terminal of the pulse width modulation chip U4 are grounded after being connected in series with the capacitor C304; the +V1 terminal of the pulse width modulation chip U4 is grounded after being connected in series with the capacitor C303; the +V2 terminal of the pulse width modulation chip U4 is grounded after being connected in series with the capacitor C301; the +V2 terminal of the pulse width modulation chip U4 is grounded after being connected in series with the capacitor C302.

[0094] The voltage - controlled signal input to the +V1 terminal of the pulse width modulation chip U4 is filtered by the capacitor C303, and the voltage - controlled signal input to the +V2 terminal of the pulse width modulation chip U4 is filtered by the capacitors C301 and C302.

[0095] As Figure 4 shown, the pulse width driving circuit includes 2 groups of isolation driving circuits with the same structure. Taking the first group of isolation driving circuits as an example:

[0096] The E1 terminal of the pulse width modulation chip U4 is connected to the front end of the resistor R103, the rear end of the resistor R103 is connected to the positive input terminal of the opto - isolator chip U1, and the negative input terminal of the opto - isolator chip U1 is grounded;

[0097] The output terminal of the opto - isolator chip U1 is connected to the bases of the NPN - type triode Q1 and the PNP - type triode Q2. The +20V power supply terminal is connected to the collector of the triode Q1. The emitter of the triode Q1 is connected to the emitter of the triode Q2, and the collector of the triode Q2 is grounded; the common terminal of the triodes Q1 and Q2 outputs the pulse width driving signal;

[0098] Through the opto - isolator chip of the pulse width driving circuit, the isolation function is realized. Through the push - pull output circuit composed of the NPN - type triode and the PNP - type triode, the driving ability of the pulse width driving signal is enhanced.

[0099] The +20V power supply terminal is connected to the front end of the resistor R101. The rear end of the resistor R101 is grounded after being connected in series with the reverse voltage - stabilizing diode D101. The common terminal of the resistor R101 and the voltage - stabilizing diode D101 is connected to the second pin of the terminal group JP1;

[0100] The common terminal of the triodes Q1 and Q2 is connected to the front end of the resistor R107. The rear end of the resistor R107 is connected to the front end of the resistor R108. The rear end of the resistor R108 is connected to the second pin of the terminal group JP1; the common terminal of the resistor R107 and the resistor R108 is connected to the first pin of the terminal group JP1;

[0101] A bidirectional voltage - stabilizing diode DW1 is connected in series between the first pin and the second pin of the terminal group JP1;

[0102] When the triode Q1 conducts, the voltage between the first pin and the second pin of the terminal group JP1 is positive; when the triode Q2 conducts, the voltage between the first pin and the second pin of the terminal group JP1 is negative;

[0103] The first pin and the second pin of terminal group JP1 output a set of the pulse width drive signals.

[0104] When triode Q2 conducts, there is a negative voltage between the first pin and the second pin of terminal group JP1, realizing the function of reverse turn-off of the pulse width drive signal. The reverse turn-off voltage value of the pulse width drive signal is the regulated voltage value of voltage regulator diode D101, and the forward conduction voltage value of the pulse width drive signal is the regulated voltage value of bidirectional voltage regulator diode DW1.

[0105] The collector of triode Q1 is connected to the collector of triode Q2 after series-connected with capacitor C101; the collector of triode Q1 is connected to the collector of triode Q2 after series-connected with capacitor C102; reverse voltage regulator diode D101 is connected in parallel with capacitor C103; reverse voltage regulator diode D101 is connected in parallel with capacitor C104.

[0106] Through capacitors C103 and C104, the signal output from the first pin of terminal group JP1 can be filtered and the start-up impact can be smoothed; through capacitors C103 and C104, the second pin of terminal group JP1 can be filtered and the start-up impact can be smoothed.

[0107] As Figure 5 shown, the overvoltage acquisition circuit includes operational amplifier U5B;

[0108] The +12V power supply terminal is connected to the front end of resistor R315. The rear end of resistor R315 is connected in reverse series with voltage regulator diode D306 and then grounded. The common terminal of resistor R315 and voltage regulator diode D306 is connected to the inverting terminal of operational amplifier U5B;

[0109] The voltage acquisition terminal VY of the controllable direct current is connected to the front end of resistor R312. The rear end of resistor R312 is connected to the front end of adjustable resistor VR5. The rear end of adjustable resistor VR5 is connected in series with resistor R314 and then grounded. The sliding end of adjustable resistor VR5 is connected to the non-inverting terminal of operational amplifier U5B;

[0110] The output terminal of operational amplifier U5B is connected to the anode of diode D307, and the cathode of diode D307 is connected to the inverter control circuit;

[0111] When the controllable direct current is overvoltage, the voltage at the non-inverting terminal of operational amplifier U5B is greater than the voltage at the inverting terminal. Operational amplifier U5B outputs a high level, controlling the duty cycle of the pulse width drive signal output by the inverter control circuit to be zero, and further controlling the voltage and current of the controllable direct current to be zero;

[0112] The rear end of resistor R312 is grounded after being connected in series with capacitor C314. The non-inverting input terminal of operational amplifier U5B is grounded after being connected in series with capacitor C315. The inverting input terminal of operational amplifier U5B is grounded after being connected in series with capacitor C316. The inverting input terminal of operational amplifier U5B is connected to the positive electrode of capacitor C317, and the negative electrode of capacitor C317 is connected to the output terminal of operational amplifier U5B.

[0113] The voltage signal of the controllable direct current passes through the voltage dividing circuit composed of resistor R312, adjustable resistor VR5 and resistor R314 and is input to the non-inverting input terminal of operational amplifier U5B. A fixed value voltage is input to the inverting input terminal of operational amplifier U5B, and the magnitude of this fixed value voltage is the regulated voltage value of voltage stabilizing diode D306. When the voltage signal of the controllable direct current exceeds the overvoltage threshold, the voltage at the non-inverting input terminal of operational amplifier U5B is higher than that at the inverting input terminal. The output terminal of operational amplifier U5B outputs a high level, controlling the duty cycle of the pulse width drive signal output by the inverter control circuit to be zero, thereby controlling the voltage of the controllable direct current to be zero and realizing overvoltage protection. When the voltage signal of the controllable direct current is lower than the overvoltage threshold, the voltage at the non-inverting input terminal of operational amplifier U5B is lower than that at the inverting input terminal. The output terminal of operational amplifier U5B outputs a low level, which does not affect the duty cycle of the pulse width drive signal. By adjusting adjustable resistor VR5, the overvoltage threshold can be adjusted.

[0114] Diode D307 can not only ensure that the duty cycle of the pulse width drive signal can be normally controlled to be zero when operational amplifier U5B outputs a high level, but also ensure that the duty cycle of the pulse width drive signal is not affected when operational amplifier U5B outputs a low level. At the same time, it also ensures that other signals at the negative terminal of diode D307 do not interfere with operational amplifier U5B.

[0115] As Figure 6 shown, the current limiting and sampling circuit includes operational amplifiers U5C and U5D;

[0116] The current sampling terminal IY of the controllable direct current is connected to the front end of resistor R316. The rear end of resistor R316 is connected to the front end of resistor R317. The rear end of resistor R317 is connected to the inverting input terminal of operational amplifier U5C. The non-inverting input terminal of operational amplifier U5C is grounded. The output terminal of operational amplifier U5C is connected to the rear end of resistor R318, and the front end of resistor R318 is connected to the inverting input terminal of operational amplifier U5C;

[0117] The output terminal of operational amplifier U5C is connected to the front end of adjustable resistor VR6. The rear end of adjustable resistor VR6 is grounded after being connected in series with resistor R319. The sliding terminal of adjustable resistor VR6 is connected to the non-inverting input terminal of operational amplifier U5D;

[0118] The +12V power supply terminal is connected to the front end of resistor R320. The rear end of resistor R320 is grounded after being connected in reverse series with voltage stabilizing diode D308. The common terminal of resistor R320 and voltage stabilizing diode D308 is connected to the inverting input terminal of operational amplifier U5D;

[0119] The output terminal of the operational amplifier U5D is connected to the positive electrode of the diode D309, and the negative electrode of the diode D309 is connected to the inverter control circuit;

[0120] When the controllable direct current is overcurrent, the current signal is converted into a voltage signal through the operational amplifier U5C, and then the comparator function is realized through the operational amplifier U5D. Furthermore, the operational amplifier U5D outputs a high level, controlling the duty cycle of the pulse width drive signal output by the inverter control circuit to be zero, and further controlling the voltage and current of the controllable direct current to be zero;

[0121] The rear end of the resistor R316 is grounded after being connected in series with the capacitor C318, the output terminal of the operational amplifier U5C is grounded after being connected in series with the capacitor C320, and the capacitor C319 is connected in parallel across both ends of the resistor R318; the inverting terminal of the operational amplifier U5D is grounded after being connected in series with the capacitor C321, the inverting terminal of the operational amplifier U5D is connected to the positive electrode of the capacitor C322, and the negative electrode of the capacitor C322 is connected to the output terminal of the operational amplifier U5D.

[0122] The current signal of the controllable direct current first passes through the current-to-voltage circuit composed of the operational amplifier U5C, and then passes through the voltage dividing circuit composed of the adjustable resistor VR6 and the resistor R319, and then is input to the non-inverting terminal of the operational amplifier U5D. A fixed-value voltage is input to the inverting terminal of the operational amplifier U5D, and the magnitude of this fixed-value voltage is the regulated voltage value of the zener diode D308;

[0123] When the current signal of the controllable direct current exceeds the overcurrent threshold, the voltage at the non-inverting terminal of the operational amplifier U5D is greater than the voltage at the inverting terminal, and the operational amplifier U5D outputs a high level, controlling the duty cycle of the pulse width drive signal output by the inverter control circuit to be zero, and further controlling the voltage of the controllable direct current to be zero, realizing overcurrent protection; when the current signal of the controllable direct current is lower than the overcurrent threshold, the voltage at the non-inverting terminal of the operational amplifier U5B is lower than the voltage at the inverting terminal, and the operational amplifier U5D outputs a low level, which does not affect the duty cycle of the pulse width drive signal; by adjusting the adjustable resistor VR6, the overcurrent threshold can be adjusted;

[0124] The diode D309 can not only ensure that when the operational amplifier U5D outputs a high level, it can normally control the duty cycle of the pulse width drive signal to be zero, but also ensure that when the operational amplifier U5D outputs a low level, it does not affect the duty cycle of the pulse width drive signal. At the same time, it also ensures that other signals at the negative terminal of the diode D309 do not interfere with the operational amplifier U5D.

[0125] Such as Figure 5 and Figure 6 shown, the output terminals of the voltage limit acquisition circuit and the current limit acquisition circuit are respectively connected to the positive electrodes of the diodes D307 and D309, and the negative electrodes of the diodes D307 and D309 output voltage control signals to Figure 3 the pulse width modulation circuit in Figure 3 The E1 terminal and the E2 terminal of the pulse width modulation circuit in Figure 4 output two groups of complementary pulse width control signals with dead zones toFigure 4 The first and second pins of the middle terminal group JP1 drive Figure 2 the middle IGBT1 and IGBT4, Figure 2 the current on the primary side of the middle transformer flows forward, or select Figure 4 The third and fourth pins of the middle terminal group JP1 drive Figure 2 the middle IGBT2 and IGBT3, Figure 2 the current on the primary side of the middle transformer flows backward.

[0126] Finally, it should be noted that: the specific implementation examples listed above are only for the present utility model. Of course, those skilled in the art can make changes and modifications to the present utility model. If these modifications and variations fall within the scope of the claims of the present utility model and its equivalent technologies, they should all be considered as within the protection scope of the present utility model.

Claims

1. A pulse power supply with overvoltage and overcurrent limiting functions, comprising a rectifier-inverter circuit and a chopper circuit. The rectifier-inverter circuit inputs industrial-frequency alternating current and outputs controllable direct current. The chopper circuit inputs controllable direct current and outputs pulsed electricity; It further includes an inverter control circuit. The inverter control circuit inputs a voltage-controlled signal, outputs a pulse-width drive signal to the rectifier-inverter circuit, controls the duty cycle of the pulse-width drive signal according to the voltage-controlled signal, and further controls the voltage and current of the controllable direct current; It is characterized in that: It further includes an overvoltage acquisition circuit and an overcurrent acquisition circuit. The overvoltage acquisition circuit acquires the voltage signal of the controllable direct current and outputs an overvoltage control signal; the overcurrent acquisition circuit acquires the current signal of the controllable direct current and outputs an overcurrent control signal; The voltage-controlled signal includes an overvoltage control signal and an overcurrent control signal. After the inverter control circuit inputs the overvoltage control signal or the overcurrent control signal, the duty cycle of the output pulse-width drive signal is zero, and further controls the voltage and current of the controllable direct current to be zero.

2. The pulsed power supply with overvoltage and overcurrent limiting functions according to claim 1, wherein: The overvoltage acquisition circuit includes an operational amplifier U5B; The +12V power supply terminal is connected to the front end of resistor R315. The rear end of resistor R315 is reversely connected in series with a voltage-regulator diode D306 and then grounded. The common terminal of resistor R315 and the voltage-regulator diode D306 is connected to the inverting terminal of the operational amplifier U5B; The voltage acquisition terminal VY of the controllable direct current is connected to the front end of resistor R312. The rear end of resistor R312 is connected to the front end of an adjustable resistor VR5. The rear end of the adjustable resistor VR5 is connected in series with resistor R314 and then grounded. The sliding terminal of the adjustable resistor VR5 is connected to the non-inverting terminal of the operational amplifier U5B; The output terminal of the operational amplifier U5B is connected to the anode of diode D307, and the cathode of diode D307 is connected to the inverter control circuit; When the controllable direct current is overvoltage, the voltage at the non-inverting terminal of the operational amplifier U5B is greater than the voltage at the inverting terminal. The operational amplifier U5B outputs a high level, controls the duty cycle of the output pulse-width drive signal of the inverter control circuit to be zero, and further controls the voltage and current of the controllable direct current to be zero; The rear end of resistor R312 is connected in series with capacitor C314 and then grounded. The non-inverting terminal of the operational amplifier U5B is connected in series with capacitor C315 and then grounded. The inverting terminal of the operational amplifier U5B is connected in series with capacitor C316 and then grounded. The inverting terminal of the operational amplifier U5B is connected to the anode of capacitor C317, and the cathode of capacitor C317 is connected to the output terminal of the operational amplifier U5B.

3. The pulsed power supply with overvoltage and overcurrent limiting functions according to claim 1, wherein: The overcurrent acquisition circuit includes operational amplifiers U5C and U5D; The current acquisition terminal IY of the controllable direct current is connected to the front end of resistor R316. The rear end of resistor R316 is connected to the front end of resistor R317. The rear end of resistor R317 is connected to the inverting terminal of the operational amplifier U5C. The non-inverting terminal of the operational amplifier U5C is grounded. The output terminal of the operational amplifier U5C is connected to the rear end of resistor R318. The front end of resistor R318 is connected to the inverting terminal of the operational amplifier U5C; The output terminal of the operational amplifier U5C is connected to the front end of an adjustable resistor VR6. The rear end of the adjustable resistor VR6 is connected in series with resistor R319 and then grounded. The sliding terminal of the adjustable resistor VR6 is connected to the non-inverting terminal of the operational amplifier U5D; The +12V power supply terminal is connected to the front end of resistor R320. The rear end of resistor R320 is connected to the ground after being reversely connected in series with voltage-regulating diode D308. The common terminal of resistor R320 and voltage-regulating diode D308 is connected to the inverting terminal of operational amplifier U5D; The output terminal of operational amplifier U5D is connected to the anode of diode D309, and the cathode of diode D309 is connected to the inverter control circuit; When the controllable direct current is overcurrent, the current signal is converted into a voltage signal through operational amplifier U5C, and then the comparator function is realized through operational amplifier U5D. Furthermore, operational amplifier U5D outputs a high level, controlling the duty cycle of the pulse-width drive signal output by the inverter control circuit to be zero, and further controlling the voltage and current of the controllable direct current to be zero; The rear end of resistor R316 is connected to the ground after being connected in series with capacitor C318. The output terminal of operational amplifier U5C is connected to the ground after being connected in series with capacitor C320. Capacitor C319 is connected in parallel across both ends of resistor R318; The inverting terminal of operational amplifier U5D is connected to the ground after being connected in series with capacitor C321. The inverting terminal of operational amplifier U5D is connected to the anode of capacitor C322, and the cathode of capacitor C322 is connected to the output terminal of operational amplifier U5D.

4. The pulsed power supply with overvoltage and overcurrent limiting functions according to claim 2 or 3, characterized in that: The inverter control circuit includes a pulse-width modulation circuit and a pulse-width drive circuit; After the pulse-width modulation circuit inputs the voltage-controlled signal, it outputs a pulse-width control signal. After the inverter drive circuit inputs the pulse-width control signal, it outputs a pulse-width drive signal; The pulse-width modulation circuit is used for: controlling the duty cycle of the pulse-width control signal according to the voltage-controlled signal; The pulse-width drive circuit is used for: isolating and enhancing the driving ability of the pulse-width drive signal.

5. The pulse power supply with voltage limiting and current limiting functions according to claim 4, wherein: The pulse-width modulation circuit includes pulse-width modulation chip U4, and the model of pulse-width modulation chip U4 is SW494; The +V1 terminal of pulse-width modulation chip U4 is connected to the ground after being connected in series with resistor R302. The +V2 terminal of pulse-width modulation chip U4 is connected to the ground after being connected in series with resistor R301. The -V1 terminal and -V2 terminal of pulse-width modulation chip U4 are connected to the ground after being connected in series with resistor R303. The voltage-controlled signal is input to the +V1 terminal or +V2 terminal of pulse-width modulation chip U4; The E1 terminal and E2 terminal of pulse-width modulation chip U4 output two groups of pulse-width control signals with dead-time complementarity; The E1 terminal of pulse-width modulation chip U4 is connected to the anode of diode D301. The E2 terminal of pulse-width modulation chip U4 is connected to the anode of diode D302. The cathode of diode D301 is connected to the cathode of diode D302. The common terminal of diode D301 and diode D302 is connected to the ground after being connected in series with resistor R313. The common terminal of diode D301 and diode D302 is connected to the first pin of terminal group JP7, and the third pin of terminal group JP7 is grounded; The first pin and the third pin of terminal group JP7 are short-circuited to ground the E1 terminal and E2 terminal of pulse-width modulation chip U4, and the duty cycle is forced to be zero.

6. The pulsed power supply with overvoltage and overcurrent limiting functions according to claim 5, characterized in that: The -V1 terminal and -V2 terminal of pulse-width modulation chip U4 are connected to the ground after being connected in series with capacitor C304; The +V1 terminal of pulse-width modulation chip U4 is connected to the ground after being connected in series with capacitor C303; The +V2 terminal of pulse-width modulation chip U4 is connected to the ground after being connected in series with capacitor C301; The +V2 terminal of pulse-width modulation chip U4 is connected to the ground after being connected in series with capacitor C302.

7. The pulse power supply with overvoltage and overcurrent limiting functions according to claim 4, characterized in that: The pulse-width drive circuit includes optocoupler isolation chip U1; The E1 terminal of the pulse width modulation chip U4 is connected to the front end of the resistor R103, and the rear end of the resistor R103 is connected to the positive input terminal of the opto-isolation chip U1. The negative input terminal of the opto-isolation chip U1 is grounded. The output terminal of the opto-isolation chip U1 is connected to the bases of the NPN transistor Q1 and the PNP transistor Q2. The +20V power supply terminal is connected to the collector of the transistor Q1. The emitter of the transistor Q1 is connected to the emitter-collector of the transistor Q2. The collector of the transistor Q2 is grounded. The common terminal of the transistors Q1 and Q2 outputs the pulse width drive signal.

8. The pulsed power supply with voltage limiting and current limiting functions according to claim 7, characterized in that: The +20V power supply terminal is connected to the front end of the resistor R101. The rear end of the resistor R101 is connected to the ground after being connected in series with the reverse voltage stabilizing diode D101. The common terminal of the resistor R101 and the voltage stabilizing diode D101 is connected to the second pin of the terminal group JP1. The common terminal of the transistors Q1 and Q2 is connected to the front end of the resistor R107. The rear end of the resistor R107 is connected to the front end of the resistor R108. The rear end of the resistor R108 is connected to the second pin of the terminal group JP1. The common terminal of the resistor R107 and the resistor R108 is connected to the first pin of the terminal group JP1. A bidirectional voltage stabilizing diode DW1 is connected in series between the first pin and the second pin of the terminal group JP1. When the transistor Q1 is turned on, the voltage between the first pin and the second pin of the terminal group JP1 is positive. When the transistor Q2 is turned on, the voltage between the first pin and the second pin of the terminal group JP1 is negative. A set of the pulse width drive signals is output between the first pin and the second pin of the terminal group JP1.

9. The pulse power supply with voltage limiting and current limiting functions according to claim 8, wherein: The collector of the transistor Q1 is connected to the collector of the transistor Q2 after being connected in series with the capacitor C101. The collector of the transistor Q1 is connected to the collector of the transistor Q2 after being connected in series with the capacitor C102. The reverse voltage stabilizing diode D101 is connected in parallel with the capacitor C103. The reverse voltage stabilizing diode D101 is connected in parallel with the capacitor C104.

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