EtherCAT master station circuit
By using the microcontroller STM32F407V and EtherCAT master station circuit, combined with the PHY interface and RS485 communication circuit, the problems of high cost and large size of the EtherCAT master station equipment are solved, and the low-cost and simple structure of the EtherCAT master station circuit is realized to meet the real-time and accuracy requirements of industrial control.
Patent Information
- Application Number
- CN202421694904.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-17
- Publication Date
- 2025-07-11
- Estimated Expiration
- 2034-07-17
AI Technical Summary
The existing EtherCAT communication master equipment is costly and large in size, especially in the case of small calculations, lacking low-cost and simple structure solutions.
The EtherCAT main station circuit is built using the microcontroller STM32F407V, combining the PHY interface circuit and the RS485 communication circuit, including data processing, the first communication circuit and the second communication circuit, and utilizing the high real-time characteristics of the microcontroller, the system structure is simplified and the hardware and software complexity is reduced.
The low-cost and small size EtherCAT master station circuit is realized, which can meet the real-time and accuracy requirements of industrial control, reduce equipment costs and simplify system structure.
Smart Images

Figure CN223093786U_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of circuit technologies, and particularly to an EtherCAT master station circuit. Background Art
[0002] In the field of industrial automation control, control systems need to continuously meet the requirements of communication speed, control accuracy, anti-interference ability, and real-time performance. Traditional bus control methods can no longer meet these needs, and industrial Ethernet technology has become an important driving force for the development of industrial technologies due to its high real-time performance and stability. EtherCAT (Ethernet for Control Automation Technology) is a real-time industrial Ethernet technology introduced by Beckhoff Automation GmbH in Germany, aiming to meet the needs of high-speed, real-time, and high-precision communication in industrial automation. In the industrial Ethernet bus technology EtherCAT, communication between slave stations adopts a distributed clock synchronization mechanism, ensuring high-speed, low-latency, synchronous, and deterministic communication.
[0003] Currently, the main EtherCAT communication master station devices are mainly PLCs or industrial control computers, but these devices have disadvantages such as high cost and large volume. Especially in situations where the computational workload is not large, a low-cost and simple-structured solution is needed. Summary of the Utility Model
[0004] Therefore, an embodiment of the present invention provides an EtherCAT master station circuit to solve the problems of high cost and large volume of existing EtherCAT communication master station devices.
[0005] To achieve the above objective, the embodiment of the present invention provides the following technical solutions:
[0006] An EtherCAT master station circuit, characterized in that it includes a data processing circuit, a first communication circuit, and a second communication circuit;
[0007] The data processing circuit includes a microcontroller;
[0008] The first communication circuit includes a PHY interface circuit and an RJ45 interface circuit. One end of the PHY interface circuit is connected to the microcontroller, and the other end of the PHY interface circuit is connected to the RJ45 interface circuit;
[0009] The second communication circuit includes a first RS485 communication circuit and a second RS485 communication circuit. The first RS485 communication circuit and the second RS485 communication circuit are respectively connected to the microcontroller.
[0010] Optionally, the microcontroller is a STMicroelectronics microcontroller STM32F407V.
[0011] Optionally, the PHY interface circuit includes a chip DP83848PHY, and the second pin, third pin, fourth pin, forty-third pin, and forty-fourth pin of the chip DP83848PHY are respectively connected to the microcontroller STM32F407V.
[0012] Optionally, the RJ45 interface circuit is an RJ45 socket HY951180A.
[0013] Optionally, the first pin of the RJ45 socket HY951180A is connected to the seventeenth pin of the chip DP83848PHY; the second pin of the RJ45 socket HY951180A is connected to the sixteenth pin of the chip DP83848PHY; the sixth pin of the RJ45 socket HY951180A is connected to the fourteenth pin of the chip DP83848PHY; the seventh pin of the RJ45 socket HY951180A is connected to the one hundred and thirteenth pin of the chip DP83848PHY; the tenth pin of the RJ45 socket HY951180A is connected to the twenty-sixth pin of the chip DP83848PHY; the eleventh pin of the RJ45 socket HY951180A is connected to the twenty-eighth pin of the chip DP83848PHY.
[0014] Optionally, the thirty-fourth pin of the PHY interface circuit is connected to a chip X2, and the chip X2 is used to clock the PHY interface circuit from an external 50 MHz clock.
[0015] Optionally, the RJ45 interface circuit has a network isolation transformer.
[0016] Optionally, the first RS485 communication circuit and the second RS485 communication circuit have the same structure;
[0017] Both the first RS485 communication circuit and the second RS485 communication circuit include a chip D248MAX485.
[0018] Optionally, the data processing circuit further includes an off-chip storage module, the off-chip storage module is connected to the microcontroller, and the off-chip storage module is used to store ROM data.
[0019] The present invention has at least the following beneficial effects:
[0020] This utility model uses a microcontroller to implement bus EtherCAT communication, migrating the complex and cumbersome host computer hardware and software system into the microcontroller for implementation, and using the high real-time characteristics of the microcontroller to complete some industrial controls with high timing requirements. The EtherCAT master station circuit of the present invention replaces the industrial control computer, reducing the volume of the equipment control box and lowering the cost while realizing the original functions. This patent builds the master station with a microcontroller plus an external PHY interface circuit. The slave station consists of multiple servo drivers, servo motors, and IO modules. The master station sends EtherCAT messages to all slave stations through a network cable. The EtherCAT master station controls the servo motor in the periodic synchronous position mode and can control other devices of the motor to complete the set actions. Description of the Drawings
[0021] To more clearly illustrate the prior art and the present invention, the following will briefly introduce the drawings required for describing the prior art and the embodiments of the present invention. Obviously, the drawings in the following description are merely exemplary. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on the provided drawings.
[0022] The structures, ratios, sizes, etc. illustrated in this specification are only used to cooperate with the content disclosed in the specification for those familiar with this technology to understand and read, and are not used to limit the limiting conditions under which the present invention can be implemented. Any modification of the structure, change in the proportional relationship, or adjustment of the size, without affecting the effects that the present invention can produce and the purposes that can be achieved, should still fall within the scope covered by the technical content disclosed in the present invention.
[0023] Figure 1 It is a circuit principle block diagram of an EtherCAT master station circuit provided by an embodiment of the present invention;
[0024] Figure 2 It is one of the circuit schematic diagrams of an EtherCAT master station circuit provided by an embodiment of the present invention;
[0025] Figure 3 It is another circuit schematic diagram of an EtherCAT master station circuit provided by an embodiment of the present invention;
[0026] Figure 4 It is a third circuit schematic diagram of an EtherCAT master station circuit provided by an embodiment of the present invention. Detailed Embodiments
[0027] To make the objectives, technical solutions, and advantages of this application clearer, the following further elaborates on this application in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not used to limit this application.
[0028] In the description of the present invention, unless otherwise specified, the meaning of "a plurality of" is two or more. Terms such as "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present invention and the above-mentioned drawings are intended to distinguish the objects being referred to. For a solution with a time sequence process, this way of term expression does not necessarily need to be understood as describing a specific order or sequence. For a solution of a device structure, this way of term expression also does not distinguish the importance level, positional relationship, etc.
[0029] In addition, the terms "comprising", "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units does not necessarily have to be limited to those steps or units that are clearly listed, but may also include other steps or units that are inherent to these processes, methods, products or devices although not clearly listed, or steps or units added by further optimized solutions based on the concept of the present invention.
[0030] As Figure 1 shown, an EtherCAT master station circuit, characterized in that it includes a data processing circuit, a first communication circuit and a second communication circuit;
[0031] The data processing circuit includes a microcontroller;
[0032] The first communication circuit includes a PHY interface circuit and an RJ45 interface circuit. One end of the PHY interface circuit is connected to the microcontroller, and the other end of the PHY interface circuit is connected to the RJ45 interface circuit;
[0033] The second communication circuit includes a first RS485 communication circuit and a second RS485 communication circuit. The first RS485 communication circuit and the second RS485 communication circuit are respectively connected to the microcontroller.
[0034] Among them, the EtherCAT master station circuit is composed of three parts: a microprocessor minimum system part, an EtherCAT network part communication part, and an RS485 communication part. The microprocessor minimum system part is the data processing circuit, the EtherCAT network part communication part is the first communication circuit, and the RS485 communication part is the second communication circuit.
[0035] The processor chip (microprocessor chip) uses a high-performance microcontroller of STMicroelectronics.
[0036] The microprocessor minimum system part is responsible for the logic processing of the EtherCAT master circuit. The master circuit is built using the internal network interface of the microprocessor. The microprocessor chip is connected to the PHY chip, and then the PHY chip is connected to the RJ45 interface with a network isolation transformer to form the EtherCAT master. At the same time, this circuit supports off-chip storage and can store more ROM data information.
[0037] This utility model uses a microcontroller to implement EtherCAT communication on the bus, migrates the complex and cumbersome host computer hardware and software system into the microcontroller for implementation, and uses the high real-time feature of the microcontroller to complete some industrial controls with high timing requirements. The EtherCAT master circuit of this invention replaces the industrial control computer, reduces the volume of the equipment control box, and reduces the cost while realizing the original functions. This patent completes the construction of the master station with a microcontroller plus an external PHY interface circuit. The slave station consists of multiple servo drivers, servo motors and IO modules. The master station sends EtherCAT messages to all slave stations through the network cable. The EtherCAT master controls the servo motor in the periodic synchronous position mode and can control other equipment of the motor to complete the set actions.
[0038] In an embodiment of this application, the microcontroller is the STM32F407V microcontroller of STMicroelectronics.
[0039] In an embodiment of this application, the PHY interface circuit includes the DP83848PHY chip. The second pin, third pin, fourth pin, forty-third pin and forty-fourth pin of the DP83848PHY chip are respectively connected to the STM32F407V microcontroller.
[0040] It should be noted that the DP83848PHY chip is used for the communication part of the EtherCAT network. TDP, TDN, RDP, and RDN are used to connect to the network transformer RJ1. U2 uses RMII_TX_EN, RMII_TX0, RMII_TX1, RMII_RX0 and RMII_RX1 to connect to U1, and realizes the communication of the master control through the media access interface (MII) and the PHY chip connection.
[0041] In an embodiment of this application, the RJ45 interface circuit is the RJ45 socket HY951180A.
[0042] In an embodiment of the present application, the first pin of the RJ45 socket HY951180A is connected to the 17th pin of the chip DP83848PHY; the second pin of the RJ45 socket HY951180A is connected to the 16th pin of the chip DP83848PHY; the sixth pin of the RJ45 socket HY951180A is connected to the 14th pin of the chip DP83848PHY; the seventh pin of the RJ45 socket HY951180A is connected to the 113th pin of the chip DP83848PHY; the tenth pin of the RJ45 socket HY951180A is connected to the 26th pin of the chip DP83848PHY; the eleventh pin of the RJ45 socket HY951180A is connected to the 28th pin of the chip DP83848PHY.
[0043] In an embodiment of the present application, the 34th pin of the PHY interface circuit is connected to the chip X2, and the chip X2 is used to clock the PHY interface circuit from an external 50 MHz clock.
[0044] It should be noted that X2 uses 50Mhz to clock the PHY from an external 50 MHz clock.
[0045] In an embodiment of the present application, the RJ45 interface circuit has a network isolation transformer.
[0046] In an embodiment of the present application, the first RS485 communication circuit and the second RS485 communication circuit have the same structure;
[0047] Both the first RS485 communication circuit and the second RS485 communication circuit include the chip D248MAX485,
[0048] It should be noted that the RS485 communication part provides external data communication for the circuit board. There are a total of 2 RS485 channels, which can be flexibly matched to meet most practical applications. This part of the circuit increases the EMI ability by adding a variety of protection components. By adding TVS tubes D1, D2, and D3, the voltage amplitude of the bus is limited, so that the voltage between 485_A / 485_B and between 485_A / 485_B and ground is less than the breakdown voltage of the TVS. At the same time, self-resetting fuses F1 and F2 are added to disconnect the output to protect the transceiver when the external load is short-circuited. The L2 common-mode inductor is used to suppress common-mode interference.
[0049] In an embodiment of the present application, the data processing circuit further includes an off-chip storage module, the off-chip storage module is connected to the microcontroller, and the off-chip storage module is used to store ROM data.
[0050] The utility model solves the problem of a microcontroller device connecting and controlling an EtherCAT bus device. Using this circuit, the function of controlling a servo motor IO module without a complex host computer or PLC system can be realized, the cost advantage of the device is improved, and the system structure composition is simplified.
[0051] In the embodiment of the present application, first, the PCB board is fabricated and components are mounted. After there are no problems with the circuit board, it can be connected and communicated with the ETHERCAT device for control.
[0052] Components: According to the BOM list of the PCB, purchase a microprocessor, resistors, inductors, capacitors, relays, connectors, etc. from reliable component manufacturers.
[0053] Circuit board: Fabricated by a professional circuit board manufacturer. Send the Gerber file to the PCBA manufacturer, and also give the purchased components to the manufacturer for SMT soldering.
[0054] The specific steps for fabricating the PCB board and mounting components include: S1, drawing the schematic diagram; S2, drawing the PCB; S3, outsourcing the PCB manufacturing to a manufacturer; S4, performing SMT soldering on the PCB board; S5, testing; S6, finalizing the design.
[0055] The above-described embodiments only represent the specific implementation manners of the utility model, and the description is relatively specific and detailed. However, it should not be construed as a limitation of the scope of the utility model patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the utility model, several modifications and improvements can still be made, and these all fall within the protection scope of the utility model.
Claims
1. An EtherCAT master station circuit, characterized in that, It includes a data processing circuit, a first communication circuit, and a second communication circuit; The data processing circuit includes a microcontroller; The first communication circuit includes a PHY interface circuit and an RJ45 interface circuit. One end of the PHY interface circuit is connected to the microcontroller, and the other end of the PHY interface circuit is connected to the RJ45 interface circuit; The second communication circuit includes a first RS485 communication circuit and a second RS485 communication circuit. The first RS485 communication circuit and the second RS485 communication circuit are respectively connected to the microcontroller.
2. The EtherCAT master station circuit according to claim 1, characterized in that, The microcontroller is the STM32F407V microcontroller of STMicroelectronics.
3. The EtherCAT master station circuit according to claim 2, characterized in that, The PHY interface circuit includes the chip DP83848PHY. The 2nd pin, 3rd pin, 4th pin, 43rd pin, and 44th pin of the chip DP83848PHY are respectively connected to the microcontroller STM32F407V.
4. The EtherCAT master station circuit according to claim 3, characterized in that, The RJ45 interface circuit is the RJ45 socket HY951180A.
5. The EtherCAT master station circuit according to claim 4, characterized in that, The 1st pin of the RJ45 socket HY951180A is connected to the 17th pin of the chip DP83848PHY; the 2nd pin of the RJ45 socket HY951180A is connected to the 16th pin of the chip DP83848PHY; the 6th pin of the RJ45 socket HY951180A is connected to the 14th pin of the chip DP83848PHY; the 7th pin of the RJ45 socket HY951180A is connected to the 113th pin of the chip DP83848PHY; the 10th pin of the RJ45 socket HY951180A is connected to the 26th pin of the chip DP83848PHY; the 11th pin of the RJ45 socket HY951180A is connected to the 28th pin of the chip DP83848PHY.
6. The EtherCAT master station circuit according to claim 3, wherein The 34th pin of the PHY interface circuit is connected to the chip X2, and the chip X2 is used to clock the PHY interface circuit from an external 50MHz clock.
7. The EtherCAT master station circuit according to claim 1, characterized in that, The RJ45 interface circuit has a network isolation transformer.
8. The EtherCAT master station circuit according to claim 1, characterized in that, The structures of the first RS485 communication circuit and the second RS485 communication circuit are the same; Both the first RS485 communication circuit and the second RS485 communication circuit include the chip D248MAX485.
9. The EtherCAT master station circuit according to claim 1, characterized in that, The data processing circuit further includes an off-chip storage module. The off-chip storage module is connected to the microcontroller, and the off-chip storage module is used to store ROM data.