Battery power failure detection circuit and electronic equipment
The interruption of the MCU is triggered by the dual MOS tube switch, which solves the problems of high delay, high power consumption and high cost of power outage detection in battery-powered equipment, and achieves ultra-low latency, low cost and low power consumption power outage detection effects.
Patent Information
- Application Number
- CN202422273910.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-18
- Publication Date
- 2025-07-22
- Estimated Expiration
- 2034-09-18
AI Technical Summary
The power-down detection of existing battery-powered devices has problems such as high latency, high power consumption and high cost, especially low-cost MCUs do not have ADC acquisition function or high power consumption of high cost MCUs.
Using a battery power-down detection circuit composed of a first MOS tube, a second MOS tube, a first resistor, a second resistor, a third resistor and a diode, the interrupt of the MCU is triggered through the dual MOS tube switch to realize ultra-low-latency power-down detection, and does not require the ADC acquisition function of the MCU. The MCU can enter sleep mode to reduce power consumption.
It realizes ultra-low latency power-down detection, reduces the cost and power consumption of the whole machine, extends the battery life, and has a simple circuit structure and low cost.
Smart Images
Figure CN223139803U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the power-off detection technology, in particular to a battery power-off detection circuit and an electronic device. Background Art
[0002] With the update and evolution of the intelligent era, various system-integrated whole-machine products have witnessed booming development, such as the main boards of gas meters, water meters, and so on. Due to factors such as safety reasons and usage scenarios, these products cannot use household regular power supply and need to be powered by batteries. Devices that require battery power need to control power consumption, because the lower the power consumption is controlled, the longer the battery usage time will be, the lower the frequency of battery replacement will be, and the user experience can be improved. In addition, for such products, the main board needs to handle power-off situations such as battery removal, so the main board should be able to maintain power for a certain period of time after the battery is removed and respond to the power-off processing.
[0003] Currently, the products on the market generally choose large electrolytic capacitors to continue the current in the case of power-off, and then use the ADC acquisition function of the MCU to achieve power-off detection, that is, let the MCU work regularly and frequently for power acquisition and comparison. If the comparison value is lower than a threshold, it is determined that the power is off. This solution has the following defects:
[0004] First, many low-cost MCUs on the market do not have the ADC acquisition function, and if some external chips are added additionally for power comparison, the cost will also increase.
[0005] Second, there is a delay in power-off detection, which highly tests the response processing frequency of the selected MCU.
[0006] Third, since the MCU needs to respond to ADC acquisition frequently, it also highly tests the power consumption of the selected MCU when responding to ADC acquisition.
[0007] For MCUs with ADC acquisition function, lower power consumption, and faster response frequency, the price will be more expensive, which will undoubtedly increase the cost of the product; and because it uses ADC acquisition and comparison to achieve power-off detection, the MCU needs to be in a working state, and the power consumption is still relatively high. Due to the existence of the acquisition cycle, and the comparison and response of the acquired data also require time, this method cannot achieve low-latency detection. Summary of the Utility Model
[0008] The technical problem to be solved by the utility model is to provide a battery power-off detection circuit and an electronic device, which can achieve ultra-low-latency power-off detection, and have low power consumption and low cost.
[0009] The technical solution adopted by the utility model to solve the above technical problem is:
[0010] On the one hand, the present utility model provides a battery power-off detection circuit, which is applied to an electronic device powered by a battery and is composed of a first MOS transistor, a second MOS transistor, a first resistor, a second resistor, a third resistor and a diode;
[0011] The drain of the first MOS transistor is connected to the interrupt IO port of the MCU of the electronic device; the terminal IO port of the MCU of the electronic device is connected to the first resistor as a pull-up resistor; the source of the first MOS transistor is grounded, and the gate is connected to the second resistor as a pull-up resistor and is connected to the drain of the second MOS transistor; the source of the second MOS transistor is grounded, the gate is grounded through the third resistor and is connected to the positive electrode of the battery of the electronic device; the positive electrode of the diode is connected to the positive electrode of the battery of the electronic device, the negative electrode is connected to the negative electrode of the energy storage capacitor in the electronic device, and is connected to the power supply input terminal of the electronic device; the positive electrode of the energy storage capacitor in the electronic device is grounded.
[0012] Further, both the first MOS transistor and the second MOS transistor are NMOS transistors.
[0013] Further, the second resistor is a resistor with a resistance value of 500K ohms or more.
[0014] Further, the third resistor is a resistor with a resistance value of 1 megohm or more.
[0015] On the other hand, based on the above battery power-off detection circuit, the present utility model further provides an electronic device, which includes an MCU, an energy storage capacitor, and also includes the above battery power-off detection circuit.
[0016] The beneficial effects of the present utility model are:
[0017] (1) The power-off detection circuit provided by the present utility model uses a dual MOS transistor switch to trigger the interrupt of the MCU, so that the MCU can know the battery power-off situation. The on and off time of the MOS transistor is usually in the nanosecond level, so that the battery power-off can be detected with ultra-low latency.
[0018] (2) The power-off detection circuit provided by the present utility model does not require the MCU of the electronic device to have an ADC acquisition function, and does not use the MCU to frequently perform the ADC power acquisition function to determine the power-off. Therefore, a cheaper MCU can be selected to carry this power-off detection circuit, thereby reducing the overall cost of the machine. In addition, the present utility model only triggers the interrupt IO of the MCU at the moment of power-off to detect the power-off, so the MCU does not need to be in a working state for a long time and can adopt a sleep mode, thereby reducing the overall power consumption of the machine and prolonging the service life of the battery.
[0019] (3) The power-off detection circuit provided by the present utility model only uses two MOS transistors, three resistors and one diode, and has a simple circuit structure, is easy to implement, and has a low cost. Brief Description of the Drawings
[0020] Figure 1 It is a schematic diagram of the battery power-off detection circuit structure in the embodiment of the present utility model;
[0021] Wherein, Q11 is the first MOS transistor, Q12 is the second MOS transistor, R62 is the first resistor, R61 is the second resistor, R64 is the third resistor, D4 is the diode, and C32 is the energy storage capacitor. Detailed Embodiment
[0022] The present utility model aims to provide a battery power-off detection circuit and an electronic device, which can realize ultra-low latency power-off detection, and has low power consumption and low cost. The battery power-off detection circuit provided by the present utility model mainly includes two MOS transistors; wherein, one MOS transistor is connected to the battery output as an interrupt response switch, which flips the battery power-off signal and then transmits it to the other MOS transistor, and the other MOS transistor is used as an instantaneous switch to connect to the interrupt IO port of the MCU. When the other MOS transistor receives the flipped signal of the power-off signal, it controls the interrupt IO of the MCU to change the level state, thereby triggering the power-off detection of the MCU. That is, the present utility model uses a dual-MOS transistor switch to trigger the interrupt of the MCU, so that the MCU can know the battery power-off situation, and the on and off time of the MOS transistor is usually in the nanosecond level, so that the battery power-off can be detected with ultra-low latency.
[0023] At the same time, the power-off detection circuit provided by the present utility model does not require the MCU of the electronic device to have an ADC acquisition function, and does not use the MCU to frequently perform the ADC power acquisition function to determine the power-off. Therefore, a cheaper MCU can be selected to carry this power-off detection circuit, thereby reducing the overall cost of the machine. In addition, the present utility model only triggers the interrupt IO of the MCU at the moment of power-off to detect the power-off, then the MCU does not need to be in the working state for a long time, and the sleep mode can be adopted, thereby reducing the overall power consumption of the machine and prolonging the service life of the battery.
[0024] Finally, the power-off detection circuit provided by the present utility model only uses two MOS transistors, three resistors and one diode, and has a simple circuit structure, is easy to implement, and has low cost.
[0025] The solution of the present utility model will be further described below with reference to the drawings and embodiments.
[0026] Embodiment
[0027] See Figure 1 , the battery power-off detection circuit provided in this embodiment is composed of a first MOS transistor Q11, a second MOS transistor Q12, a first resistor R62, a second resistor R61, a third resistor R64 and a diode D4;
[0028] The drain of the first MOS transistor Q11 is connected to the interrupt IO port of the MCU of the electronic device; the terminal IO port of the MCU of the electronic device is connected to the first resistor R62 as a pull-up resistor; the source of the first MOS transistor Q11 is grounded, and the gate is connected to the second resistor R61 as a pull-up resistor and is connected to the drain of the second MOS transistor Q12; the source of the second MOS transistor Q12 is grounded, the gate is grounded through the third resistor R64 and is connected to the positive pole of the battery of the electronic device; the positive pole of the diode D4 is connected to the positive pole of the battery of the electronic device, the negative pole is connected to the negative pole of the energy storage capacitor C32 in the electronic device, and is connected to the power supply input terminal of the electronic device; the positive pole of the energy storage capacitor C32 in the electronic device is grounded.
[0029] The functions of each device in the circuit are described as follows:
[0030] The MCU interrupt IO port is connected to the first resistor R62. The pull-up of the first resistor R62 is to clamp the normal state of the MCU interrupt IO at a high level.
[0031] The first MOS transistor Q11 uses an NMOS transistor, which acts as an instantaneous switch to control the level of the MCU interrupt IO.
[0032] The first MOS transistor Q11 is connected to the second resistor R61. The pull-up of the second resistor R61 is to clamp the potential of the G pole of the first MOS transistor Q11 at a high level when the second MOS transistor Q12 is not conducting. The resistance value of the second resistor R61 needs to be set above 500K ohms to control the leakage current when the second MOS transistor Q12 is conducting to a very small value.
[0033] The second MOS transistor Q12 acts as an interrupt response switch and flips and transmits the power-off signal to the G pole of the first MOS transistor Q11; the G pole of the second MOS transistor Q12 is connected to the third resistor to ground to provide a reference ground plane for the G pole of the second MOS transistor Q12. R64 needs to be above 1 megohm to control the battery leakage current to a very small value.
[0034] The function of the diode D4 is to achieve unidirectional current flow, that is, to allow current to only flow from the battery to the load (electronic device) and the energy storage capacitor C32, and not to flow from the energy storage capacitor C32 and the load in the reverse direction to the battery.
[0035] The function of the energy storage capacitor C32 is to continue to supply power to the load using the electrical energy stored in it after the battery is powered off.
[0036] The working principle of the above power-off detection circuit is as follows:
[0037] When the battery is working properly, it charges the energy storage capacitor C32 through the diode D4 and supplies power to the load MCU. At this time, the potential of the G pole of the second MOS transistor Q12 is at a high potential (battery voltage). Therefore, the forward voltage difference between the GS of the second MOS transistor Q12 causes the D terminal and the S terminal of the second MOS transistor Q12 to conduct. Therefore, the D terminal of the second MOS transistor Q12, which is also the G pole of the first MOS transistor Q11, is at a low potential. At this time, both the G pole and the S pole of the first MOS transistor Q11 are at a low potential. Therefore, the first MOS transistor Q11 is in the off state, and the MCU interrupt IO is in the high-level state.
[0038] When the battery loses power (such as being removed), the MCU in the load continues to be powered by the energy storage capacitor C32. The G pole of the second MOS transistor Q12 becomes low level, and the voltage difference between the G pole and the S pole of the second MOS transistor Q12 is insufficient, so the second MOS transistor Q12 turns off. The D pole of the second MOS transistor Q12 (the G pole of the first MOS transistor Q11) becomes high potential, making the forward voltage difference between the G pole and the S pole of the first MOS transistor Q11 sufficient, thus conducting the D terminal and the S terminal of the first MOS transistor Q11. The MCU interrupt IO is thus pulled low to the low-level state, and this signal is sent back to the MCU for processing to achieve battery power loss detection.
[0039] Finally, it should be noted that the above embodiments are only preferred embodiments and are not intended to limit the present invention. It should be pointed out that for those of ordinary skill in the art in this technical field, without departing from the spirit of the present invention and the scope protected by the claims, several modifications, equivalent replacements, improvements, etc. can be made, and all should be included in the protection scope of the present invention.
Claims
1. A battery power-off detection circuit is applied to an electronic device powered by a battery. It is characterized in that the circuit consists of a first MOS transistor (Q11), a second MOS transistor (Q12), a first resistor (R62), a second resistor (R61), a third resistor (R64) and a diode (D4); the drain of the first MOS transistor (Q11) is connected to the interrupt IO port of the MCU of the electronic device; the terminal IO port of the MCU of the electronic device is connected to the first resistor (R62) as a pull-up resistor; the source of the first MOS transistor (Q11) is grounded, and the gate is connected to the second resistor (R61) as a pull-up resistor and is connected to the drain of the second MOS transistor (Q12); the source of the second MOS transistor (Q12) is grounded, the gate is grounded through the third resistor (R64) and is connected to the positive electrode of the battery of the electronic device; the positive electrode of the diode (D4) is connected to the positive electrode of the battery of the electronic device, the negative electrode is connected to the negative electrode of the energy storage capacitor (C32) in the electronic device and is connected to the power supply input terminal of the electronic device; the positive electrode of the energy storage capacitor (C32) in the electronic device is grounded.
2. The battery power-off detection circuit according to claim 1, characterized in that both the first MOS transistor (Q11) and the second MOS transistor (Q12) are NMOS transistors.
3. The battery power-off detection circuit according to claim 1, characterized in that the second resistor (R61) uses a resistor with a resistance value of more than 500 K ohms.
4. The battery power-off detection circuit according to claim 1, characterized in that the third resistor (R64) uses a resistor with a resistance value of more than 1 M ohm.
5. An electronic device, comprising an MCU and an energy storage capacitor, characterized in that, It further includes a battery power-off detection circuit according to any one of claims 1-4.