Secondary integrated chip, integrated circuit package, and charging device

Abstract

The embodiment of the utility model discloses a secondary integrated chip, an integrated circuit package and a charging device, a power supply circuit comprises a primary coil and a secondary coil, the primary coil is coupled with the secondary coil, and the secondary coil is connected with an output port. The secondary integrated chip comprises a substrate, a synchronous rectification circuit, a synchronous rectification control circuit, an output control circuit and a protocol circuit, and the synchronous rectification circuit is arranged on the substrate and connected with the secondary coil; the synchronous rectification control circuit is arranged on the substrate and is connected with the secondary coil and the synchronous rectification circuit; the output control circuit is arranged on the substrate and is connected with the secondary coil and the output port; and the protocol circuit is arranged on the substrate and is connected with the secondary coil, the output control circuit and the output port, so that the number of electronic components in the secondary circuit can be reduced, the overall secondary circuit is relatively simple, a circuit board is relatively small, the charging device is relatively small, and the miniaturization of the charging device is realized.

Description

Technical Field

[0001] The present application relates to the technical field of charging, and more specifically, to a secondary integrated chip, an integrated circuit package, and a charging device. Background Art

[0002] Nowadays, there is an increasing number of smart devices that need to be charged in daily life, such as smart phones, laptops, tablets, and other smart devices, as well as power tools, cordless vacuum cleaners, car vacuum cleaners, etc., all of which need to be charged.

[0003] In the related technical fields, due to the large number of electronic components in the power supply circuit, it is not conducive to the miniaturization of products. Summary of the Utility Model

[0004] Embodiments of the present application provide a secondary integrated chip, an integrated circuit package, and a charging device to reduce the number of electronic components in the power supply circuit and achieve the miniaturization of the charging device, so as to facilitate the use and carrying of the charging device.

[0005] Embodiments of the present application provide a secondary integrated chip applicable to a power supply circuit. The power supply circuit includes a secondary coil for connecting to an output port. The secondary integrated chip includes a substrate, a synchronous rectification circuit, a synchronous rectification control circuit, an output control circuit, and a protocol circuit. The synchronous rectification circuit is disposed on the substrate and is used to connect to the secondary coil. The synchronous rectification control circuit is disposed on the substrate, connected to the synchronous rectification circuit, and used to connect to the secondary coil. The synchronous rectification control circuit is used to control the synchronous rectification circuit to perform synchronous rectification. The output control circuit is disposed on the substrate and is used to connect to the secondary coil and the output port. The protocol circuit is disposed on the substrate, connected to the output control circuit, and further used to connect to the output port and the secondary coil. The protocol circuit sends a conduction signal to the output control circuit to control the output control circuit to conduct, so that the secondary coil supplies power to the output port through the output control circuit. The protocol circuit sends a turn-off signal to the output control circuit to control the output control circuit to turn off.

[0006] Embodiments of the present application further provide an integrated circuit package, including a package body and a secondary integrated chip. The synchronous rectification circuit, the synchronous rectification control circuit, the output control circuit, and the protocol circuit are disposed inside the package body.

[0007] An embodiment of the present application further provides a charging device, which includes a housing, a circuit board, and a power supply circuit. The housing has a mains interface and an output port; the circuit board is disposed inside the housing; the power supply circuit includes a primary circuit and a secondary circuit. The primary circuit includes a rectification circuit and a primary coil; the rectification circuit is connected to the primary coil and the mains interface, and is configured to convert alternating current into direct current; the secondary circuit includes a secondary coil and a secondary integrated chip. The secondary coil is coupled to the primary coil, and is connected to the secondary integrated chip and the output port.

[0008] Based on the above embodiment, the number of electronic components in the secondary circuit can be reduced, so that the overall secondary circuit is relatively simple, thereby reducing the space occupied by the power supply circuit on the circuit board, making the circuit board smaller, reducing the space occupied by the circuit board in the housing, and further making the charging device smaller, achieving the miniaturization of the charging device, which is convenient for the use and carrying of the charging device. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present application. For those skilled in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0010] Figure 1 It is a schematic structural diagram of a charging device in an embodiment of the present application;

[0011] Figure 2 It is a schematic framework diagram of a power supply circuit in an embodiment of the present application;

[0012] Figure 3 It is a schematic framework diagram of a secondary integrated chip in an embodiment of the present application;

[0013] Figure 4 It is a schematic structural diagram of a secondary integrated chip in an embodiment of the present application;

[0014] Figure 5 It is a circuit diagram of a secondary circuit in an embodiment of the present application;

[0015] Figure 6 It is a circuit diagram of a secondary circuit in another embodiment of the present application;

[0016] Figure 7 It is a circuit diagram of a secondary circuit in another embodiment of the present application.

[0017] Description of the reference numerals: 1, charging device; 11, housing; 11A, output port; 12, circuit board; 2, power circuit; 21, primary circuit; 211, rectifier circuit; L1, primary coil; 22, secondary circuit; L2, secondary coil; 3, secondary integrated chip; 31, substrate; 311, high voltage side; 312, low voltage side; 31A, power input pin; 31B, coil loop pin; 31C, ground pin; 31D, power output pin; 31E, first power supply pin; 31F, first power supply pin; 31G, first power supply pin; 31G, second ... 1F, second power supply pin; 31G, first communication pin; 31H, second communication pin; 31I, first data pin; 31J, second data pin; 31K, photocoupler pin; 31L, voltage reference pin; 31M, temperature detection pin; 31N, drive delay pin; 31O, power supply pin; 32, synchronous rectification circuit; 32A, rectification input terminal; 32B, rectification output terminal; 32C, rectification controlled terminal; 33, synchronous rectification control circuit; 33A, synchronous control output terminal output terminal; 33B, synchronous voltage detection terminal; 33C, synchronous power terminal; 33D, synchronous ground terminal; 33E, drive delay terminal; 34, output control circuit; 34A, control input terminal; 34B, control output terminal; 34C, control controlled terminal; 35, protocol circuit; 35A, protocol power terminal; 35B, protocol power output terminal; 35C, protocol control output terminal; 35D, first communication terminal; 35E, second communication terminal; 35F, first data terminal; 35G, second data terminal; 35 H, photoelectric coupler terminal; 35I, voltage reference terminal; 35J, current reference terminal; Q1, first switching element; Q2, second switching element; R1, first resistor; R2, second resistor; R3, third resistor; R4, temperature-sensitive resistor; C1, first capacitor; C2, second capacitor; C3, third capacitor; C4, fourth capacitor; C5, fifth capacitor; EC, energy storage capacitor; U1, photoelectric coupler circuit; U2, voltage reference circuit; U3, current reference circuit; U4, temperature detection circuit. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0019] Please refer to Figure 1 An embodiment of the present application provides a charging device 1, including a housing 11, a circuit board 12 and a power supply circuit 2.

[0020] The housing 11 can support and protect the electronic components disposed within the housing 11. The material of the housing 11 can be plastic or metal. Specifically, the material of the housing 11 can be plastic, so that the housing 11 is insulated, thereby reducing the risk of electric shock to the user. And because the plastic material is of relatively light weight, the housing 11 is of relatively light weight, thus making the overall weight of the charging device 1 relatively light, facilitating the user to carry and use the charging device 1. Specifically, the housing 11 can be integrally injection-molded, so that the housing 11 has high structural strength, making the housing 11 not easily damaged, capable of protecting other components within the housing 11, reducing the probability of damage to other components, and thus enabling the charging device 1 to have a long service life.

[0021] The housing 11 also has a mains interface (not shown in the figure) and an output port 11A. The mains interface is used to connect to the mains power, and the output port 11A is used to connect to external devices. Exemplarily, the output port 11A includes at least one of a USB-A interface, a Micro USB interface, a USB Type-C interface, or a Lightning interface. The external devices include but are not limited to mobile phones, tablet computers, and smart watches.

[0022] The power circuit 2 can be formed on the circuit board 12 by an etching process, thereby improving the manufacturing efficiency of the power circuit 2 and further reducing the manufacturing cost of the power circuit 2.

[0023] It can be understood that the charging device 1 involved in the present application is mainly applicable to powering mobile phones, earphones, tablet computers, smart watches, and other small external devices. For example, the charging device 1 can be a charger, a mobile power supply, a socket, etc.; and is not applicable to powering large devices such as electric vehicles and electric scooters. For example, the charging device 1 cannot be a charging pile.

[0024] Please refer to Figure 1 and Figure 2 , in an embodiment, the power circuit 2 includes a primary circuit 21 and a secondary circuit 22.

[0025] The primary circuit 21 includes a rectifier circuit 211 and a primary coil L1. The rectifier circuit 211 is connected to the primary coil L1. The rectifier circuit 211 has an AC input terminal and a DC output terminal. The AC input terminal of the rectifier circuit 211 can be connected to the mains interface of the housing 11, and the DC output terminal of the rectifier circuit 211 is connected to the primary coil L1.

[0026] Exemplarily, the rectification circuit 211 may include a rectification circuit (not shown in the figure), a filtering circuit (not shown in the figure), and a voltage regulation circuit (not shown in the figure). The rectification circuit is used to rectify alternating current into direct current, and the rectification circuit includes, but is not limited to, a bridge rectification circuit and a PWM (Pulse Width Modulation) rectification circuit. The filtering circuit is used to filter the pulsating direct current output by the rectification circuit so that the waveform of the output direct current is smooth. The voltage regulation circuit is used to keep the output voltage constant. In the embodiments of the present application, the specific form of the rectification circuit 211 is not limited.

[0027] Please refer to Figure 1 and Figure 2 , in one embodiment, the secondary circuit 22 includes a secondary coil L2 and a secondary integrated chip 3. The secondary coil L2 is coupled to the primary coil L1, and the secondary coil L2 is connected to the output port 11A via the secondary integrated chip 3.

[0028] Please refer to Figure 3 and Figure 4 , specifically, the secondary integrated chip 3 may include a substrate 31, a synchronous rectification circuit 32, a synchronous rectification control circuit 33, an output control circuit 34, and a protocol circuit 35. The synchronous rectification circuit 32, the synchronous rectification control circuit 33, the output control circuit 34, and the protocol circuit 35 are all disposed on the substrate 31.

[0029] The synchronous rectification circuit 32 is connected to the secondary coil L2. The synchronous rectification circuit 32 is used to convert the alternating current signal output by the secondary coil L2 into a high-frequency pulse signal, so as to adapt to the charging power required by the external device connected to the output port 11A, thereby improving the charging efficiency of the charging device 1 for the external device. The synchronous rectification circuit 32 can also cut off the connection between the secondary coil L2 and the output port 11A when the power supply circuit 2 is short-circuited, which helps to improve the reliability of the power supply circuit 2, and further improves the reliability of the charging device 1.

[0030] The synchronous rectification control circuit 33 is connected to the secondary coil L2 and the synchronous rectification circuit 32, and is used to control the synchronous rectification circuit 32 to conduct or turn off, so as to control the synchronous rectification circuit 32 to perform synchronous rectification.

[0031] The output control circuit 34 is connected to the secondary coil L2 and the output port 11A. When the output control circuit 34 is conducting, the connection between the secondary coil L2 and the output port 11A is conducting, and the high-frequency pulsed direct current output by the synchronous rectification circuit 32 can supply power to the external device via the output port 11A.

[0032] The protocol circuit 35 is connected to the secondary coil L2, the output control circuit 34, and the output port 11A. After an external device is connected to the output port 11A, the protocol circuit 35 exchanges information with the external device through the output port 11A. The content of the information exchange includes but is not limited to the remaining power of the external device and the rated charging power of the external device. After that, the protocol circuit 35 can output power parameter information corresponding to the external device to the primary coil L1 to adjust the output power of the primary coil L1, so that the secondary coil L2 can output the charging power required by the external device, thereby realizing the matching of the output power of the power supply circuit 2 with the external device. The above process can be referred to as the handshake communication between the charging device 1 and the external device in other embodiments.

[0033] Specifically, the protocol circuit 35 sends a conduction signal to the output control circuit 34 to control the conduction of the output control circuit 34, so that the secondary coil L2 supplies power to the output port 11A through the output control circuit 34, so that the output port 11A can supply power to the external device. The protocol circuit 35 sends a turn-off signal to the output control circuit 34 to control the turn-off of the output control circuit 34, so that the output port 11A stops supplying power to the external device.

[0034] In the embodiment of the present application, integrating the synchronous rectification circuit 32, the synchronous rectification control circuit 33, the output control circuit 34, and the protocol circuit 35 onto the substrate 31 can reduce the number of electronic components in the secondary circuit 22, making the overall secondary circuit 22 relatively simple, thereby reducing the space occupied by the power supply circuit 2 on the circuit board 12, making the circuit board 12 smaller, reducing the space occupied by the circuit board 12 in the housing 11, and further making the charging device 1 smaller, realizing the miniaturization of the charging device 1, which is convenient for the use and carrying of the charging device 1. And because the number of electronic components in the secondary circuit 22 is small, the probability of the power supply circuit 2 being damaged due to the damage of electronic components can be reduced, and thus the use reliability of the charging device 1 can be improved. Also because the number of electronic components in the secondary circuit 22 is small, the number of materials can be reduced, thereby reducing the procurement cost of the electronic components in the power supply circuit 2, and thus reducing the production cost of the charging device 1; at the same time, it can also improve the production efficiency of the secondary circuit 22 to improve the production efficiency of the charging device 1. Moreover, integrating the synchronous rectification circuit 32, the synchronous rectification control circuit 33, the output control circuit 34, and the protocol circuit 35 onto the substrate 31 to form the secondary integrated chip 3 will make the distance between the synchronous rectification circuit 32 and the synchronous rectification control circuit 33 and the distance between the output control circuit 34 and the protocol circuit 35 smaller, which can improve the response speed of the synchronous rectification circuit 32 and the output control circuit 34, thereby improving the overall response speed of the power supply circuit 2 to improve the power output efficiency of the charging device 1.

[0035] It can be understood that the synchronous rectification circuit 32, the synchronous rectification control circuit 33, the output control module 34, and the protocol circuit 35 can be disposed within the encapsulation to form an integrated circuit package, so as to isolate the synchronous rectification circuit 32, the synchronous rectification control circuit 33, the output control module 34, and the protocol circuit 35 from the external environment by means of the encapsulation, thereby being able to reduce the probability of damage to the synchronous rectification circuit 32, the synchronous rectification control circuit 33, the output control module 34, and the protocol circuit 35, so that the secondary integrated chip 3 can have a long service life, and can make the production and manufacturing of the secondary integrated chip 3 standardized and normalized, thereby being able to improve the production efficiency of the secondary integrated chip 3 and reduce the cost.

[0036] Please refer to Figure 3 , further, the output control circuit 34 is disposed on one side of the substrate 31, and the synchronous rectification circuit 32 is disposed on the other side of the substrate 31, so that the output control circuit 34 can be far away from the synchronous rectification circuit 32, thereby preventing the temperature concentration of the substrate 31, reducing the probability of excessive local temperature of the secondary integrated chip 3, and further reducing the probability of damage to the internal components of the secondary integrated chip 3, so that the secondary integrated chip 3 can have a long service life.

[0037] Moreover, the protocol circuit 35 is disposed close to the output control circuit 34, the synchronous rectification control circuit 33 is disposed close to the synchronous rectification circuit 32, the output control circuit 34 is farther away from the synchronous rectification control circuit 33 than the protocol circuit 35, and the synchronous rectification control circuit 33 is farther away from the protocol circuit 35 than the synchronous rectification circuit 32, which can make the synchronous rectification control circuit 33 as far away from the protocol circuit 35 as possible, so as to reduce the noise influence between the protocol circuit 35 and the synchronous rectification control circuit 33, thereby improving the accuracy of the output signals of the protocol circuit 35 and the synchronous rectification control circuit 33, and improving the control accuracy of the power supply circuit 2. And the synchronous rectification circuit 32, the synchronous rectification control circuit 33, the output control circuit 34, and the protocol circuit 35 occupy a small area on the substrate 31, so that the area of the secondary integrated chip 3 is small, and further the charging device 1 is small, realizing the miniaturization of the charging device 1, so as to facilitate the use and carrying of the charging device 1.

[0038] Please refer to Figure 1 , Figure 3 and Figure 4, in one embodiment, the synchronous rectification circuit 32 and the synchronous rectification control circuit 33 are disposed on one side of the substrate 31 close to the secondary coil L2, which can shorten the wiring length between the synchronous rectification circuit 32 and the synchronous rectification control circuit 33 and the secondary coil L2, thereby reducing the area of the substrate 31 and the circuit board 12, and thus reducing the volume of the charging device 1; similarly, the output control circuit 34 and the protocol circuit 35 are disposed on one side of the substrate 31 close to the output port 11A, which can shorten the wiring length between the output control circuit 34 and the protocol circuit 35 and the output port 11A, thereby reducing the area of the substrate 31 and the circuit board 12, and thus reducing the volume of the charging device 1.

[0039] Please refer to Figures 3 - 5 and Figure 7 , in one embodiment, the secondary circuit 22 further includes a storage capacitor EC. The first electrode plate of the storage capacitor EC is connected to the positive terminal of the secondary coil L2, and the second electrode plate of the storage capacitor EC is grounded, so that when the secondary coil L2 supplies power to an external device through the output port 11A, the secondary coil L2 can simultaneously charge the storage capacitor EC; when the secondary coil L2 cannot supply power to the external device, the storage capacitor EC discharges to supply power to the external device via the output port 11A.

[0040] Please refer to Figures 3 - 5 and Figure 7 , in one embodiment, the substrate 31 has a power input pin 31A, a coil loop pin 31B, and a ground pin 31C. The power input pin 31A is connected to the positive terminal of the secondary coil L2, the coil loop pin 31B is connected to the negative terminal of the secondary coil L2, and the ground pin 31C is connected to the output port 11A.

[0041] The synchronous rectification circuit 32 has a rectification input terminal 32A, a rectification output terminal 32B, and a rectification control terminal 32C; the rectification input terminal 32A is connected to the coil loop pin 31B, the rectification output terminal 32B is connected to the ground pin 31C; the synchronous rectification control circuit 33 has a synchronous control output terminal 33A, a synchronous voltage detection terminal 33B, a synchronous power connection terminal 33C, and a synchronous ground terminal 33D; the synchronous control output terminal 33A is connected to the rectification control terminal 32C, the synchronous voltage detection terminal 33B is connected to the coil loop pin 31B, the synchronous power connection terminal 33C is connected to the power input pin 31A, and the synchronous ground terminal 33D is connected to the ground pin 31C.

[0042] Please refer to Figures 3 - 5 and Figure 7 , in one embodiment, the synchronous rectification circuit 32 includes a first switching element Q1. The input terminal of the first switching element Q1 is the rectification input terminal 32A, the output terminal of the first switching element Q1 is the rectification output terminal 32B, and the control terminal of the first switching element Q1 is the rectification control terminal 32C.

[0043] The synchronous rectification control circuit 33 sends a conduction signal to the controlled terminal of the first switching element Q1 through the synchronous control output terminal 33A, so that the first switching element Q1 is turned on, so that the secondary coil L2 can supply power to the output port 11A, so that the output port 11A can supply power to an external device. The synchronous rectification control circuit 33 can also send a turn-off signal to the controlled terminal of the first switching element Q1 through the synchronous control output terminal 33A, so that the first switching element Q1 is turned off, so that the energy storage capacitor EC supplies power to the output port 11A, so that the output port 11A supplies power to an external device, thereby improving the output efficiency of the power supply circuit 2.

[0044] Among them, the first switching element Q1 can be at least one of a bipolar junction transistor (BJT), a metal oxide semiconductor (MOS), an insulated gate bipolar transistor (IGBT), and an electromagnetic relay. In the embodiments of the present application, the specific form of the first switching element Q1 is not limited.

[0045] Please refer to Figure 6 and Figure 7 , it can be understood that the rectification input terminal 32A can also be connected to the power input pin 31A, the rectification output terminal 32B can be connected to the output port 11A. At this time, the coil loop pin 31B is connected to the ground pin 31C. At this time, the synchronous voltage detection terminal 33B is connected to the rectification output terminal 32B, the synchronous power connection terminal 33C is connected to the power input pin 31A, and the synchronous ground terminal 33D is connected to the ground pin 31C. Similarly, the on / off of the first switching element Q1 can be controlled through the synchronous rectification control circuit 33 to control the first switching element Q1 to perform synchronous rectification.

[0046] Please refer to Figures 3 - 5 and Figure 7 , in one embodiment, the substrate 31 further has a power output pin 31D, and the power output pin 31D is used to connect to the output port 11A.

[0047] The output control circuit 34 has a control input terminal 34A, a control output terminal 34B, and a control controlled terminal 34C; the control input terminal 34A is connected to the power input pin 31A, and the control output terminal 34B is connected to the power output pin 31D; the protocol circuit 35 has a protocol power connection terminal 35A, a protocol power output terminal 35B, a protocol control output terminal 35C, and a protocol ground terminal 35K. The protocol power connection terminal 35A is connected to the power input pin 31A, the protocol power output terminal 35B is connected to the power output pin 31D, the protocol control output terminal 35C is connected to the control controlled terminal 34C, and the protocol ground terminal 35K is connected to the ground pin 31C.

[0048] Please refer to Figures 3 - 6 , in an embodiment, the output control circuit 34 includes a second switching element Q2. The input terminal of the second switching element Q2 is the control input terminal 34A, the output terminal of the second switching element Q2 is the control output terminal 34B, and the controlled terminal of the second switching element Q2 is the control controlled terminal 34C. The protocol control output terminal 35C of the protocol circuit 35 can send a conduction signal to the controlled terminal of the second switching element Q2 to turn on the second switching element Q2, so that the power supply circuit 2 can supply power to the output port 11A, so that the output port 11A can supply power to an external device.

[0049] Wherein, the second switching element Q2 can be at least one of a triode, a field effect transistor, an insulated gate bipolar transistor, and an electromagnetic relay. In the embodiment of the present application, the specific form of the second switching element Q2 is not limited.

[0050] It can be understood that in the high-power charging device 1, the first switching element Q1 and the second switching element Q2 can be arranged outside the encapsulation to reduce the temperature inside the encapsulation, reduce the selection cost of other components inside the encapsulation, and reduce the overall cost of the power supply circuit 2. Exemplarily, the charging power of the high-power charging device 1 can be 35W, 40W, 50W and above.

[0051] It can be understood that after the second switching element Q2 is turned on, there is a voltage drop between the input terminal and the output terminal of the second switching element Q2. The secondary integrated chip 3 can perform current sampling through the second switching element Q2 to monitor the output current in the power supply circuit 2, so as to achieve precise control of the output current, and further improve the output stability and reliability of the power supply circuit 2. And because current sampling can be performed through the second switching element Q2, there is no need to set a sampling resistor, which can further reduce the use of electronic components in the power supply circuit 2.

[0052] It can be understood that in the high-power charging device 1, in order to ensure the reliability of current sampling, the secondary integrated chip 3 may further include a sampling resistor. The sampling resistor can be connected to the current sampling terminal of the protocol circuit 35 and the input terminal of the second switching element Q2, so that the protocol circuit 35 can obtain the output current in the power supply circuit 2 via the sampling resistor, thereby improving the output stability and reliability of the power supply circuit 2.

[0053] Please refer to Figures 3 - 5 and Figure 7 , further, the secondary circuit 22 further includes a third capacitor C3. The first plate of the third capacitor C3 is connected to the power output pin 31D, and the second plate of the third capacitor C3 is grounded. The third capacitor C3 can filter the electrical energy output by the power output pin 31D to make the output electrical energy of the power output pin 31D stable, so that the electrical energy received by the external device is stable, thereby reducing the probability of damage to the external device.

[0054] Please refer to Figures 3 - 5 and Figure 7 , in one embodiment, the protocol power connection terminal 35A of the protocol circuit 35 is connected to the power input pin 31A to facilitate power supply to the protocol circuit 35, and the protocol power output terminal 35B of the protocol circuit 35 is connected to the power output pin 31D to facilitate power output of the protocol circuit 35.

[0055] Please refer to Figures 3 - 5 and Figure 7 , in one embodiment, the substrate 31 further has a first power supply pin 31E and a second power supply pin 31F. Both the first power supply pin 31E and the second power supply pin 31F are connected to the power input pin 31A. The first power supply pin 31E provides the required voltage and current for the field effect transistor in the secondary integrated chip 3. The second power supply pin 31F provides a positive voltage for the digital circuit in the secondary integrated chip 3. And both the protocol power connection terminal 35A of the protocol circuit 35 and the synchronous power connection terminal 33C of the synchronous rectification control circuit 33 are connected to the power input pin 31A, which can reduce the number of pins on the periphery of the secondary integrated chip 3, thereby reducing the volume of the secondary integrated chip 3, and further making the charging device 1 smaller.

[0056] It can be understood that the first power supply pin 31E and the second power supply pin 31F can be connected to the power input pin 31A through a low-dropout regulator (LDO) so that the power input pin 31A can supply power to the first power supply pin 31E and the second power supply pin 31F.

[0057] After the power input pin 31A is connected to the power supply, a low-dropout regulator can be used to supply power to the protocol circuit 35 and the synchronous rectification control circuit 33, or two low-dropout regulators can be used to supply power to the protocol circuit 35 and the synchronous rectification control circuit 33 respectively. The two low-dropout regulators can be integrated in the protocol circuit 35 and the synchronous rectification control circuit 33 respectively, or can be independent of the protocol circuit 35 and the synchronous rectification control circuit 33 respectively. In the embodiments of the present application, the number of low-dropout regulators is not specifically limited.

[0058] Please refer to Figures 3 - 5 and Figure 7 , further, the secondary circuit 22 may further include a fourth capacitor C4. The first plate of the fourth capacitor C4 is connected to the first power supply pin 31E, and the second plate of the fourth capacitor C4 is grounded, so as to stabilize the voltage and current input by the first power supply pin 31E.

[0059] Please refer to Figures 3 - 5 and Figure 7 , further, the secondary circuit 22 may further include a fifth capacitor C5. The first plate of the fifth capacitor C5 is connected to the second power supply pin 31F, and the second plate of the fifth capacitor C5 is grounded, so as to stabilize the voltage and current input by the second power supply pin 31F.

[0060] Please refer to Figures 3 - 5 and Figure 7 , in one embodiment, the substrate 31 further has a first communication pin 31G, a second communication pin 31H, a first data pin 31I, and a second data pin 31J. The first communication pin 31G, the second communication pin 31H, the first data pin 31I, and the second data pin 31J are all used to connect to the output port 11A; the first communication pin 31G and the second communication pin 31H are used to realize information interaction between the external device and the charging device 1, and the information interaction content includes handshake communication between the charging device 1 and the external device.

[0061] Please refer to Figure 4 , Figure 5 and Figure 7 , specifically, the protocol circuit 35 further has a first communication end 35D, a second communication end 35E, a first data end 35F, and a second data end 35G. The first communication end 35D is connected to the first communication pin 31G, the second communication end 35E is connected to the second communication pin 31H, the first data end 35F is connected to the first data pin 31I, and the second data end 35G is connected to the second data pin 31J, so that the protocol circuit 35 can realize information interaction with the external device.

[0062] Please refer to Figures 3 - 5 and Figure 7, in one embodiment, the substrate 31 further has an optocoupler pin 31K, and the protocol circuit 35 further has an optocoupler terminal 35H. The optocoupler terminal 35H is connected to the optocoupler pin 31K. The secondary circuit 22 further includes an optocoupler circuit U1. The optocoupler pin 31K is connected to the optocoupler circuit U1, which is used to realize the signal transmission from the secondary circuit 22 to the primary circuit 21.

[0063] Please refer to Figure 4 , Figure 5 and Figure 7 , specifically, the optocoupler circuit U1 may include a light-emitting element and a photosensitive element. The input terminal of the light-emitting element is connected to the positive terminal of the secondary coil L2, and the output terminal of the light-emitting element is connected to the optocoupler pin 31K. The input terminal of the photosensitive element is connected to the primary circuit 21, and the output terminal of the photosensitive element is grounded. The photosensitive element is used to receive the light emitted by the light-emitting element to adjust the output voltage or current of the power supply circuit 2, so as to realize the precise control of the output voltage or current of the power supply circuit 2.

[0064] Exemplarily, the light-emitting element in the optocoupler circuit U1 may be a light-emitting diode, and the photosensitive element in the optocoupler circuit U1 may be a photosensitive transistor. The photosensitive transistor can receive the optical signal emitted by the light-emitting diode and convert the optical signal into an electrical signal, so as to realize the signal transmission from the secondary circuit 22 to the primary circuit 21.

[0065] It can be understood that in other embodiments, the signal transmission from the secondary circuit 22 to the primary circuit 21 can also be realized through a magnetic coupler. The signal transmission from the secondary circuit 22 to the primary circuit 21 can also be realized through a coupling capacitor. This application does not elaborate too much on this in the embodiments.

[0066] Please refer to Figure 4 , Figure 5 and Figure 7 , further, the secondary circuit 22 further includes a second resistor R2. The second resistor R2 is connected in series between the positive terminal of the secondary coil L2 and the input terminal of the light-emitting element. The second resistor R2 is used for voltage division and current limiting to prevent the light-emitting element from being burned out, so that the light-emitting element can have a long service life, so that the optocoupler circuit U1 can have a long service life, and further ensure the precise control of the output voltage or current of the power supply circuit 2.

[0067] Please refer to Figures 3 - 5 and Figure 7, in one embodiment, the substrate 31 further has a voltage reference pin 31L, the protocol circuit 35 further has a voltage reference terminal 35I, the voltage reference terminal 35I is connected to the voltage reference pin 31L, the secondary circuit 22 further includes a voltage reference circuit U2, and the voltage reference pin 31L is connected to the voltage reference circuit U2; the voltage reference pin 31L is connected to the voltage reference terminal 35I of the protocol circuit 35 to provide a reference voltage for the protocol circuit 35, so as to stabilize the voltage in the secondary circuit 22.

[0068] Please refer to Figures 4 - 6 , specifically, the voltage reference circuit U2 may include a third resistor R3 and a second capacitor C2 connected in series between the output terminal of the light-emitting element and the voltage reference pin 31L. In other embodiments, the voltage reference circuit U2 may also be in other forms.

[0069] Please refer to Figure 4 , Figure 5 and Figure 7 , in one embodiment, the protocol circuit 35 further has a current reference terminal 35J, and the secondary integrated chip 3 further includes a current reference circuit U3. Specifically, the current reference circuit U3 includes a first resistor R1 and a first capacitor C1 connected in series between the optocoupler pin 31K and the current reference terminal 35J of the protocol circuit 35 to provide a reference current for the protocol circuit 35, so as to stabilize the current in the secondary circuit 22. In the embodiment of the present application, integrating the current reference circuit U3 into the secondary integrated chip 3 can further reduce the number of electronic components in the secondary circuit 22, make the overall secondary circuit 22 relatively simple, thereby reducing the space occupied by the power supply circuit 2 on the circuit board 12, so that the circuit board 12 is smaller, the space occupied by the circuit board 12 in the housing 11 is smaller, and further the charging device 1 is smaller, realizing miniaturization of the charging device 1, so as to facilitate the use and carrying of the charging device 1.

[0070] In other embodiments, the current reference circuit U3 may also be disposed outside the secondary integrated chip 3 and connected to the current reference pin IFB (not shown in the figure) of the secondary integrated chip 3 to reduce the number of internal integrated components of the secondary integrated chip 3 and the complexity of integration of the secondary integrated chip 3, thereby reducing the design and manufacturing cost of the secondary integrated chip 3, and further reducing the cost of the charging device 1.

[0071] Please refer to Figures 3 - 5 and Figure 7 , in one embodiment, the substrate 31 further has a temperature detection pin 31M, the secondary circuit 22 further includes a temperature detection circuit U4, the temperature detection pin 31M is connected to the temperature detection circuit U4, and the temperature detection circuit U4 is used to detect the temperature inside the charging device 1.

[0072] When the secondary integrated chip 3 detects through the temperature detection circuit U4 that the temperature inside the charging device 1 is greater than or equal to the first preset temperature, the secondary integrated chip 3 can reduce the output power of the output port 11A to prevent the temperature inside the charging device 1 from continuing to rise, protect the components inside the charging device 1, reduce the probability of damage to the components inside the charging device 1, and enable the charging device 1 to have a longer service life. It can be understood that, in order to better protect the components inside the charging device 1, the temperature detection circuit U4 can be arranged in the area with a higher temperature inside the charging device 1.

[0073] It can be understood that the temperature detection circuit U4 can be connected to the protocol circuit 35 through the temperature detection pin 31M. When the protocol circuit 35 detects through the temperature detection circuit U4 that the temperature inside the charging device 1 is greater than or equal to the first preset temperature, the protocol circuit 35 can control the primary coil L1 to reduce the output power through the optocoupler circuit U1, so that the output power of the output port 11A is reduced, thereby preventing the temperature inside the charging device 1 from continuing to rise, protecting the components inside the charging device 1, and reducing the probability of damage to the components inside the charging device 1.

[0074] Please refer to Figure 7 , specifically, the temperature detection circuit U4 includes a temperature-sensitive resistor R4. One end of the temperature-sensitive resistor R4 is connected to the temperature detection pin 31M, and the other end is grounded. The temperature detection pin 31M is connected to the temperature detection circuit U4. When the temperature inside the charging device 1 is greater than or equal to the first preset temperature, the resistance value of the temperature-sensitive resistor R4 is less than or equal to the preset resistance value, so that the voltage value obtained by the temperature detection pin 31M is less than or equal to the preset voltage value. Accordingly, the secondary integrated chip 3 determines that the temperature inside the charging device 1 is greater than or equal to the first preset temperature. At this time, the secondary integrated chip 3 can reduce the output power of the output port 11A to reduce the temperature in the high-temperature area of the charging device 1. On the contrary, when the temperature inside the charging device 1 is less than the first preset temperature, the resistance value of the temperature-sensitive resistor R4 is greater than the preset resistance value, so that the voltage value obtained by the temperature detection pin 31M is greater than the preset voltage value. Accordingly, the secondary integrated chip 3 determines that the temperature inside the charging device 1 is less than the first preset temperature. At this time, the secondary integrated chip 3 can make the output port 11A output the preset power, thereby improving the charging efficiency of the charging device 1. It can be understood that the selection of the first preset temperature can be determined according to the temperature tolerance value of the components inside the charging device 1. In the embodiments of the present application, the first preset temperature is not specifically limited.

[0075] It can be understood that the temperature detection circuit U4 can also include a positive temperature coefficient (PTC) temperature-sensitive resistor R4. At this time, the resistance value of the temperature-sensitive resistor R4 is positively correlated with the temperature, and no more details will be elaborated here.

[0076] Please refer toFigure 4 It can be understood that a temperature circuit can also be integrated inside the secondary integrated chip 3. When the temperature circuit detects that the internal temperature of the secondary integrated chip 3 is greater than or equal to the second preset temperature, the secondary integrated chip 3 stops working to prevent the temperature of the secondary integrated chip 3 from continuing to rise, so as to protect the secondary integrated chip 3, reduce the probability of damage to the secondary integrated chip 3, enable the secondary circuit 22 to have a longer service life, and further enable the power supply circuit 2 to have a longer service life, so that the charging device 1 can have a longer service life. When the temperature circuit detects that the internal temperature of the secondary integrated chip 3 is less than the second preset temperature, the secondary integrated chip 3 can restart working. Exemplarily, the second preset temperature can be 130°C, 140°C, 150°C, 160°C, 170°C, 180°C.

[0077] Please refer to Figures 3 - 5 and Figure 7 , the substrate 31 further has a drive delay pin 31N, and the synchronous rectification control circuit 33 further has a drive delay terminal 33E. The drive delay terminal 33E is connected to the drive delay pin 31N to control the delay turn-on time of the synchronous rectification circuit 32, or the drive delay pin 31N is left floating.

[0078] Please refer to Figures 3 - 5 and Figure 7 , in one embodiment, the substrate 31 further has a power supply pin 31O, and the power supply pin 31O can be used to access a power supply. In other embodiments, the power supply pin 31O can also be left floating.

[0079] In the embodiment of the present application, when an external device is connected to the output port 11A, the secondary integrated chip 3 performs signal interaction with the external device through the first communication pin 31G, the second communication pin 31H, the first data pin 31I, and the second data pin 31J to obtain the charging information of the external device, and sends the charging information to the primary coil L1 through the optocoupler pin 31K and the optocoupler circuit U1, so that the output power of the secondary coil L2 conforms to the charging power of the external device.

[0080] The alternating current output from the positive terminal of the secondary coil L2 enters the secondary integrated chip 3 through the power input pin 31A. The secondary integrated chip 3 converts the alternating current into high-frequency pulsed direct current and outputs it from the power output pin 31D to supply power to the output port 11A, and enters the secondary integrated chip 3 from the ground pin 31C, and finally returns to the negative terminal of the secondary coil L2 from the coil loop pin 31B to form a complete power supply loop.

[0081] In the accompanying drawings of this embodiment, the same or similar reference numerals correspond to the same or similar components; in the description of the present application, it should be understood that if there are terms such as "upper", "lower", "left", "right", etc. indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, it is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, the terms describing the positional relationship in the accompanying drawings are only for illustrative purposes and cannot be construed as a limitation of this patent. For those of ordinary skill in the art, the specific meanings of the above terms can be understood according to specific circumstances.

[0082] The above are only the preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent replacements, and improvements made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A secondary integrated chip, characterized in that, Applicable to a power supply circuit, the power supply circuit including a secondary coil for connection with an output port, the secondary integrated chip comprising: A substrate; A synchronous rectification circuit disposed on the substrate and for connection with the secondary coil; A synchronous rectification control circuit disposed on the substrate, connected to the synchronous rectification circuit, and for connection with the secondary coil, the synchronous rectification control circuit being used to control the synchronous rectification circuit to perform synchronous rectification; An output control circuit disposed on the substrate, for connection with the secondary coil and the output port; and A protocol circuit disposed on the substrate, connected to the output control circuit, and also for connection with the output port and the secondary coil; the protocol circuit sends a conduction signal to the output control circuit to control the output control circuit to conduct, so that the secondary coil supplies power to the output port through the output control circuit; the protocol circuit sends a turn-off signal to the output control circuit to control the output control circuit to turn off.

2. The secondary integrated chip according to claim 1, wherein The output control circuit is disposed on one side of the substrate, and the synchronous rectification circuit is disposed on the other side of the substrate.

3. The secondary integrated chip according to claim 1, wherein The substrate has a power input pin, a coil loop pin, and a ground pin; The power input pin is used for connection with the positive terminal of the secondary coil; The coil loop pin is used for connection with the negative terminal of the secondary coil; The ground pin is used for connection with the output port; The synchronous rectification circuit has a rectification input terminal, a rectification output terminal, and a rectification controlled terminal; the rectification input terminal is connected to the coil loop pin, and the rectification output terminal is connected to the ground pin; The synchronous rectification control circuit has a synchronous control output terminal, a synchronous voltage detection terminal, a synchronous power connection terminal, and a synchronous ground terminal; the synchronous control output terminal is connected to the rectification controlled terminal, and the synchronous control output terminal sends a conduction signal or a turn-off signal to the rectification controlled terminal to control the on / off of the synchronous rectification circuit, so as to convert the alternating current output by the secondary coil into a high-frequency pulsed direct current; the synchronous voltage detection terminal is connected to the coil loop pin, the synchronous power connection terminal is connected to the power input pin, and the synchronous ground terminal is connected to the ground pin; Or The substrate has a power input pin, a coil loop pin, and a ground pin; The power input pin is used for connection with the positive terminal of the secondary coil; The coil loop pin is used for connection with the negative terminal of the secondary coil; The ground pin is used for connection with the output port; The synchronous rectification circuit has a rectification input terminal, a rectification output terminal, and a rectification controlled terminal; the rectification input terminal is connected to the power input pin, and the rectification output terminal is used for connection with the output port; The synchronous rectification control circuit has a synchronous control output terminal, a synchronous voltage detection terminal, a synchronous power connection terminal, and a synchronous ground terminal; the synchronous control output terminal is connected to the rectification controlled terminal, and the synchronous control output terminal sends a conduction signal or a turn-off signal to the rectification controlled terminal to control the on / off of the synchronous rectification circuit, so as to convert the alternating current output by the secondary coil into high-frequency pulsed direct current; the synchronous voltage detection terminal is connected to the rectification output terminal, the synchronous power connection terminal is connected to the power input pin, and the synchronous ground terminal is connected to the ground pin.

4. The secondary integrated chip according to claim 3, wherein The synchronous rectification circuit includes: A first switching element, the input terminal of the first switching element is the rectification input terminal, the output terminal of the first switching element is the rectification output terminal, and the controlled terminal of the first switching element is the rectification controlled terminal.

5. The secondary integrated chip according to claim 3, wherein, The substrate also has a power output pin, and the power output pin is used to be connected to the output port; The output control circuit has a control input terminal, a control output terminal, and a control controlled terminal; the control input terminal is connected to the power input pin, and the control output terminal is connected to the power output pin; The protocol circuit has a protocol power connection terminal, a protocol power output terminal, a protocol control output terminal, and a protocol ground terminal. The protocol power connection terminal is connected to the power input pin, the protocol power output terminal is connected to the power output pin, the protocol control output terminal is connected to the control controlled terminal, and the protocol control output terminal sends a conduction signal to the control controlled terminal to control the conduction of the output control circuit, so that the secondary coil supplies power to the output port through the output control circuit. The protocol control output terminal sends a turn-off signal to the control controlled terminal to control the turn-off of the output control circuit; the protocol ground terminal is connected to the ground pin.

6. The secondary integrated chip according to claim 5, characterized in that, The output control circuit includes: A second switching element, the input terminal of the second switching element is the control input terminal, the output terminal of the second switching element is the control output terminal, and the controlled terminal of the second switching element is the control controlled terminal.

7. The secondary integrated chip according to claim 5, characterized in that, The substrate also has a first power supply pin and a second power supply pin, and both the first power supply pin and the second power supply pin are connected to the power input pin and are respectively used to supply power to different components; The protocol power connection terminal of the protocol circuit and the synchronous power connection terminal of the synchronous rectification control circuit are both connected to the power input pin; and / or, The substrate also has a first communication pin, a second communication pin, a first data pin, and a second data pin, and the first communication pin, the second communication pin, the first data pin, and the second data pin are all used to be connected to the output port; The protocol circuit further has a first communication terminal, a second communication terminal, a first data terminal, and a second data terminal. The first communication terminal is connected to the first communication pin, the second communication terminal is connected to the second communication pin, the first data terminal is connected to the first data pin, and the second data terminal is connected to the second data pin, so that the protocol circuit communicates with an external device through the first communication terminal, the second communication terminal, the first data terminal, and the second data terminal.

8. The secondary integrated chip according to any one of claims 1 to 7, wherein the substrate further has an optocoupler pin and a voltage reference pin; the optocoupler pin is used to connect to an optocoupler circuit to communicate with the primary coil through the optocoupler circuit, and the voltage reference pin is used to connect to a voltage reference circuit to obtain a reference voltage through the voltage reference circuit; the protocol circuit further has an optocoupler terminal, a voltage reference terminal, and a current reference terminal. The optocoupler terminal is connected to the optocoupler pin; the voltage reference terminal is connected to the voltage reference pin; the secondary integrated chip further includes: a current reference circuit, the current reference circuit includes a first resistor and a first capacitor, and the first resistor and the first capacitor are connected in series between the optocoupler pin and the current reference terminal of the protocol circuit; and / or, the substrate further has a temperature detection pin, and the temperature detection pin is used to connect to a temperature detection circuit; and / or, the substrate further has a drive delay pin, the synchronous rectification control circuit further has a drive delay terminal, and the drive delay terminal is connected to the drive delay pin to control the delay turn-on time of the synchronous rectification circuit, or the drive delay pin is left floating; and / or, the substrate further has a power supply pin, and the power supply pin is used to connect to a power supply, or the power supply pin is left floating.

9. An integrated circuit package, comprising: a package body; the secondary integrated chip according to any one of claims 1 to 8, the synchronous rectification circuit, the synchronous rectification control circuit, the output control circuit, and the protocol circuit are arranged in the package body.

10. A charging device, characterized in that, Comprising: a housing having a mains interface and an output port; a circuit board disposed in the housing; a power supply circuit, including: a primary circuit, including a rectification circuit and a primary coil; the rectification circuit is connected to the primary coil, and the rectification circuit is connected to the mains interface for converting alternating current into direct current; a secondary circuit, including a secondary coil and the secondary integrated chip according to any one of claims 1 to 8, the secondary coil is coupled to the primary coil, the secondary coil is connected to the secondary integrated chip, and is connected to the output port.

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