BMS hardware self-checking circuit

Abstract

The utility model relates to a BMS hardware self-checking circuit, which comprises a to-be-detected MOS tube Q2, the source and drain electrodes of the to-be-detected MOS tube Q2 are connected in series between power supplies, the BMS hardware self-checking circuit is further connected in series with an external voltage detection circuit and a current detection module, the to-be-detected MOS tube Q2 is further connected in parallel with a pre-charging module, the external voltage detection circuit is connected in parallel with a self-checking switch, and the pre-charging module is connected in parallel with the self-checking switch. A load of the self-checking circuit is connected in parallel with the external voltage detection circuit and the self-checking switch. By applying the scheme, the MOS transistor in the system can be actively detected, and the safety of the BMS is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit protection, and relates to a self-checking circuit, specifically a BMS hardware self-checking circuit. Background Art

[0002] In a BMS battery system, an MOS transistor is required to control the connection between an external load and an internal battery. As the usage time and number of times increase, the MOS transistors in the system may age, or when there is an unstable external voltage, a spike pulse may break down the MOS transistor, which will cause the MOS transistor to lose its switching characteristics. During the later use of the BMS battery system, it may affect the work plan and even damage other devices in the system. Currently, there is no active detection of MOS. Generally, the MOS transistor is inspected only when the circuit is damaged, which belongs to passive detection. Only when current is found in the system when discharging is not allowed, will the damage be discovered.

[0003] Similarly, some other key devices and circuits (such as current detection, pre-charge circuit, etc.) may fail during use. The failure of key devices or circuits may cause the BMS to fail, thus triggering serious accidents. Summary of the Invention

[0004] The present invention proposes a BMS hardware self-checking circuit, which has the effect of improving the safety of the BMS.

[0005] The technical solution of the present invention is as follows:

[0006] A BMS hardware self-checking circuit, characterized in that it includes a MOS transistor Q2 to be tested, the source and drain of the MOS transistor Q2 to be tested are connected in series between power supplies, and the BMS hardware self-checking circuit is also connected in series with an external voltage detection circuit and a current detection module. The MOS transistor Q2 to be tested is also connected in parallel with a pre-charge module. The external voltage detection circuit is connected in parallel with a self-checking switch, and the load of this self-checking circuit is connected in parallel with the external voltage detection circuit and the self-checking switch.

[0007] As a further optimization of this solution, the pre-charge module includes a first resistor group and a switch S1 connected in parallel, and the gate of the MOS transistor Q2 to be tested is controlled by a controller.

[0008] As a further optimization of this solution, the external voltage detection circuit includes a resistor R1 and a resistor R5 connected in series.

[0009] As a further optimization of this solution, the self-checking switch includes a relay JK1 and a resistor R2. The resistor R2 is connected in series with the switch side of the relay JK1, and the coil side of the relay JK1 is controlled by a controller.

[0010] As a further optimization of this solution, the current detection module includes a second resistor group, and the resistance value of the second resistor group is 2-4 orders of magnitude lower than that in the self-checking circuit.

[0011] As a further optimization of this solution, the resistance value of the external voltage detection circuit is much higher than that of the self-checking switch and the pre-charging module. When the self-checking switch is open, the self-checking circuit can be regarded as open.

[0012] As a further optimization of this solution, the source-drain electrodes of MOS transistor Q1 are also connected in series in the self-checking circuit. The gate of the MOS transistor Q1 is controlled by the controller, and the MOS transistor Q1 is used to control the on-off of the self-checking circuit.

[0013] The working principle and beneficial effects of the present invention are as follows:

[0014] The utility model determines a small load with an equivalent resistance built in the BMS discharge interface. When the battery is on standby, the battery discharges to measure the dynamic relevant data of each circuit to judge whether the hardware is abnormal. The items that can be inspected include: whether the discharge MOS is damaged, the current sampling accuracy, the external voltage collector, the pre-charging module, etc., and there are others.

[0015] 1. Actively and dynamically self-check through the built-in load, rather than only knowing when there is a problem as in the traditional way, which greatly improves the safety of the BMS.

[0016] 2. The structure is simple and very safe, and this circuit is highly integrated with the BMS topology and can detect multiple key safety devices, which is very suitable for products like BMS that are very sensitive to safety requirements. Description of the Drawings

[0017] The present invention will be further described in detail below in conjunction with the drawings and specific embodiments.

[0018] Figure 1 It is the circuit schematic diagram of this application. Specific Embodiments

[0019] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of the present invention.

[0020] As shown in the specification appendix Figure 1As shown in the figure, a BMS hardware self-checking circuit includes a MOS tube Q2 to be tested. The source and drain electrodes of the MOS tube Q2 to be tested are connected in series between power supplies. The BMS hardware self-checking circuit is also connected in series with an external voltage detection circuit and a current detection module. A pre-charging module is also connected in parallel to the MOS tube Q2 to be tested. The external voltage detection circuit is connected in parallel with a self-checking switch, and the load of this self-checking circuit is connected in parallel with the external voltage detection circuit and the self-checking switch. The pre-charging module includes a first resistor group and a switch S1 connected in parallel. The gate of the MOS tube Q2 to be tested is controlled by a controller. The external voltage detection circuit includes a resistor R1 and a resistor R5 connected in series. The self-checking switch includes a relay JK1 and a resistor R2. The resistor R2 is connected in series with the switch side of the relay JK1, and the coil side of the relay JK1 is controlled by a controller. The current detection module includes a second resistor group, and the resistance value of the second resistor group is 2 to 4 orders of magnitude lower than the resistance value in this self-checking circuit. The resistance value of the external voltage detection circuit is much higher than the resistance values of the self-checking switch and the pre-charging module. When the self-checking switch is open, this self-checking circuit can be regarded as an open circuit. The source and drain electrodes of a MOS tube Q1 are also connected in series in this self-checking circuit. The gate of the MOS tube Q1 is controlled by a controller, and the MOS tube Q1 is used to control the on and off of the self-checking circuit.

[0021] The following problems exist in the prior art:

[0022] 1. For MOS fault detection, the prior art is passive detection. Passive detection often fails to monitor in a timely manner and can only be detected under specific circumstances. Analyzed theoretically, there are risks. The present invention can actively detect the BMS hardware after installation. If there is a fault, it can actively perform logical processing, which greatly improves safety.

[0023] 2. For current sampling accuracy and external voltage collectors, the first existing solution is factory quality inspection. However, as the devices age, inaccuracies may occur during installation. The second solution is to design two sets of current sampling circuits in parallel as backups and mutually detect each other. The disadvantage is that the cost is relatively higher than that of the present invention, and there is a possibility that both sets of devices may fail simultaneously.

[0024] The present application has the following advantages:

[0025] 1. By actively and dynamically self-checking through an internal load, rather than only knowing when a problem occurs traditionally, it greatly improves the safety of the BMS.

[0026] 2. The structure is simple and safe, and this circuit is highly integrated with the BMS topology and can detect multiple key safety devices.

[0027] 3. Apply the present application to short-circuit the internal output interface, turn on the pre-charging module, and detect whether the pre-charging module is effective.

[0028] 4. Close the MOS to be tested through the internal short - circuit output interface, and detect whether the discharge MOS is damaged;

[0029] 5. Open the MOS to be tested through the internal short - circuit output interface, and detect the current sampling accuracy;

[0030] 6. Open the pre - charge module through the internal short - circuit output interface, and detect the accuracy of the external voltage collector;

[0031] 7. The circuit structure of the built - in load.

[0032] As shown in the attached Figure 1 in the specification, when the MOS tube to be tested is closed and the pre - charge circuit is opened, at this time, the current flows from P - through the pre - charge circuit to B -. In this embodiment, it is determined that there are four 10R resistors connected in parallel in the pre - charge module, and the resistance on the circuit is the pre - charge equivalent resistance 10R+the detection resistance 10R = 20R. At this time, the theoretical loop current in this self - test circuit is If the detected current deviates greatly from the theoretical current, it is considered that the pre - charge circuit is damaged or the current sampling circuit is damaged.

[0033] When measuring the state of the MOS tube to be tested, disconnect the MOS tube to be tested and the pre - charge module. If there is current at this time, it means that the MOS tube to be tested is damaged. Generally, the current at this time is

[0034] When detecting the external voltage collector, open the MOS to be tested, close the pre - charge module, and turn on the self - test switch. If the current is At this time, the voltage obtained by the external voltage collector = battery voltage.

[0035] When the discharge MOS is closed and the pre - charge circuit is opened, the voltage obtained by the external voltage collector at this time is: V = V bat / 2

[0036] If the voltage actually obtained by the external voltage collector deviates greatly from the above - mentioned theoretical value, it is considered that the external voltage collector is abnormal.

[0037] In this application, the detection circuit relay switch can be replaced with a semiconductor switch. However, the semiconductor has poor safety and there is a risk of breakdown. The advantage is that it is cheap.

[0038] Replace the resistive load in the detection circuit with an electronic load. The electronic load can flexibly adjust the current during detection. This scheme has better advantages for the detection and calibration of the current sampling circuit, but the disadvantage is that it is expensive.

[0039] This technical solution can provide detection for whether the BMS discharge MOS is damaged, the current sampling accuracy, the external voltage collector, and the relevant circuits of the pre-charge circuit when installed, which can improve the safety of the BMS. When the circuit is abnormal, it can be detected in time, meeting the current social safety requirements for the BMS. At the same time, this solution has a simple structure and a secure topology, with high application value.

[0040] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A BMS hardware self-checking circuit, characterized in that, It includes the MOS transistor Q2 to be measured, the source and drain of the MOS transistor Q2 to be measured are connected in series between the power supplies, and the BMS hardware self-checking circuit is also connected in series with an external voltage detection circuit and a current detection module. The MOS transistor Q2 to be measured is also connected in parallel with a pre-charge module. The external voltage detection circuit is connected in parallel with a self-checking switch, and the load of this self-checking circuit is connected in parallel with the external voltage detection circuit and the self-checking switch.

2. The BMS hardware self-checking circuit according to claim 1, characterized in that, The pre-charge module includes a first resistor group and a switch S1 connected in parallel, and the gate of the MOS transistor Q2 to be measured is controlled by a controller.

3. The BMS hardware self-checking circuit according to claim 1, characterized in that, The external voltage detection circuit includes a resistor R1 and a resistor R5 connected in series.

4. The BMS hardware self-checking circuit according to claim 1, wherein, The self-checking switch includes a relay JK1 and a resistor R2. The resistor R2 is connected in series with the switch side of the relay JK1, and the coil side of the relay JK1 is controlled by a controller.

5. The BMS hardware self-checking circuit according to claim 1, wherein The current detection module includes a second resistor group, and the resistance value of the second resistor group is 2-4 orders of magnitude lower than that in this self-checking circuit.

6. The BMS hardware self-checking circuit according to claim 3, wherein The source and drain of a MOS transistor Q1 are also connected in series in this self-checking circuit. The gate of the MOS transistor Q1 is controlled by a controller, and the MOS transistor Q1 is used to control the on-off of the self-checking circuit.

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