Driving circuit and vehicle

Abstract

The utility model discloses a drive circuit and a vehicle, the drive circuit is used for driving a hybrid power device, the hybrid power device comprises a first power switch tube and a second power switch tube which are connected in parallel, the drive circuit comprises a micro-control chip, the micro-control chip is provided with a first output end used for outputting a switch signal; the driving chip is used for performing current amplification on the switching signal to obtain a driving signal; the first driving branch is respectively connected with the output end of the driving chip and the first power switch tube and is used for driving the first power switch tube to be switched on and off in a delayed manner based on the driving signal; and the second driving branch is respectively connected with the output end of the driving chip and the second power switch tube and is used for directly driving the second power switch tube to be switched on and off based on the driving signal. The driving circuit can achieve the purpose of separately driving the two parallel switching tubes in the hybrid power device, and can reduce the cost at the same time.

Description

Technical Field

[0001] The utility model relates to the technical field of vehicles, in particular to a drive circuit and a vehicle. Background Art

[0002] In the related art, most of the driving of hybrid power devices uses two switching signals and two identical driving chips to drive two parallel switching transistors in the hybrid power device respectively. However, the cost of using two identical driving chips for driving is relatively high, and the two switching signals have relatively high requirements for the performance of the microcontroller chip. Summary of the Utility Model

[0003] The utility model aims to solve at least one of the technical problems in the related art to some extent. To this end, the first object of the utility model is to propose a drive circuit, which can replace two identical driving chips with a switching signal, a driving chip and two driving branch circuits composed of discrete devices to drive the hybrid power device, and can reduce the cost while achieving the purpose of separately driving two parallel switching transistors in the hybrid power device.

[0004] The second object of the utility model is to propose a vehicle.

[0005] To achieve the above object, an embodiment of the first aspect of the utility model proposes a drive circuit for driving a hybrid power device, where the hybrid power device includes a first power switch transistor and a second power switch transistor connected in parallel. The drive circuit includes: a microcontroller chip, which has a first output terminal for outputting a switching signal; a driving chip, whose input terminal is connected to the first output terminal of the microcontroller chip for amplifying the current of the switching signal to obtain a driving signal; a first driving branch, which is respectively connected to the output terminal of the driving chip and the first power switch transistor for delaying the driving of the first power switch transistor to switch based on the driving signal; a second driving branch, which is respectively connected to the output terminal of the driving chip and the second power switch transistor for directly driving the second power switch transistor to switch based on the driving signal.

[0006] According to the drive circuit of the embodiment of the utility model, the microcontroller chip outputs a switching signal, the driving chip amplifies the current of the switching signal to obtain a driving signal, the first driving branch delays the driving of the first power switch transistor to switch based on the driving signal, and the second driving branch directly drives the second power switch transistor to switch based on the driving signal. Thus, the circuit can replace two identical driving chips with a switching signal, a driving chip and two driving branch circuits composed of discrete devices to drive the hybrid power device, and can reduce the cost while achieving the purpose of separately driving two parallel switching transistors in the hybrid power device.

[0007] In addition, the drive circuit according to the above embodiments of the present utility model may further have the following additional technical features:

[0008] Specifically, the first drive branch includes a delay circuit and a first push-pull circuit. The delay circuit is respectively connected to the output end of the drive chip and the input end of the first push-pull circuit, and is used to delay the output of the drive signal to the first push-pull circuit; the output end of the first push-pull circuit is connected to the first power switch tube, and is used to amplify the voltage of the drive signal and output it to the first power switch tube to drive the first power switch tube to switch.

[0009] Specifically, the delay circuit includes: a first diode and a first resistor. The anode of the first diode is connected to the output end of the drive chip, the cathode of the first diode is connected to one end of the first resistor, and the other end of the first resistor is connected to the input end of the first push-pull circuit; a second diode and a second resistor. The anode of the second diode is connected to the input end of the first push-pull circuit, the cathode of the second diode is connected to one end of the second resistor, and the other end of the second resistor is connected to the output end of the drive chip; a first capacitor. One end of the first capacitor is respectively connected to the other end of the first resistor, the anode of the second diode, and the input end of the first push-pull circuit, and the other end of the first capacitor is grounded.

[0010] Specifically, the first push-pull circuit includes: a first switch tube. The first end of the first switch tube is connected to the delay circuit, the second end of the first switch tube is connected to the positive power supply, and the third end of the first switch tube is connected to the first power switch tube; a second switch tube. The first end of the second switch tube is respectively connected to the first end of the first switch tube and the delay circuit, the second end of the second switch tube is connected to the negative power supply, and the third end of the second switch tube is respectively connected to the third end of the first switch tube and the first power switch tube.

[0011] Specifically, the second drive branch includes a current limiting circuit and a second push-pull circuit. The current limiting circuit is respectively connected to the output end of the drive chip and the input end of the second push-pull circuit, and is used to limit the current of the drive signal; the output end of the second push-pull circuit is connected to the second power switch tube, and is used to amplify the voltage of the drive signal and output it to the second power switch tube to drive the second power switch tube to switch.

[0012] Specifically, the current limiting circuit includes: a third resistor connected in series between the output end of the driving chip and the input end of the second push-pull circuit; or, a fourth resistor and a third diode, the anode of the third diode is connected to the input end of the second push-pull circuit, the cathode of the third diode is connected to the output end of the driving chip, and the fourth resistor is connected in parallel with the third diode.

[0013] Specifically, the second push-pull circuit includes: a third switching tube, the first end of the third switching tube is connected to the current limiting circuit, the second end of the third switching tube is connected to the positive power supply, and the third end of the third switching tube is connected to the second power switching tube; a fourth switching tube, the first end of the fourth switching tube is respectively connected to the first end of the third switching tube and the current limiting circuit, the second end of the fourth switching tube is connected to the negative power supply, and the third end of the fourth switching tube is respectively connected to the third end of the third switching tube and the second power switching tube.

[0014] Specifically, the driving circuit further includes a first control circuit and a second control circuit, and the micro control chip further includes a second output end and a third output end for outputting a first control signal through the second output end and a second control signal through the third output end; wherein, the first control circuit is respectively connected to the second output end of the micro control chip, the output end of the driving chip and the first driving branch, and is used for outputting a first driving signal based on the first control signal and the driving signal, so that the first driving branch drives the first power switching tube to switch with a time delay based on the first driving signal; the second control circuit is respectively connected to the third output end of the micro control chip, the output end of the driving chip and the second driving branch, and is used for outputting a second driving signal based on the second control signal and the driving signal, so that the second driving branch drives the second power switching tube to switch with a time delay based on the second driving signal.

[0015] Specifically, the circuit structures of the first control circuit and the second control circuit are the same. Among them, the first control circuit includes: an AND gate, the first input end of the AND gate is connected to the second output end of the micro control chip, the second input end of the AND gate is connected to the output end of the driving chip, and the output end of the AND gate is connected to the first driving branch.

[0016] To achieve the above object, a second aspect embodiment of the present invention proposes a vehicle including the above driving circuit.

[0017] According to the vehicle of the embodiment of the present invention, through the above driving circuit, the purpose of separately driving two switching tubes connected in parallel in the hybrid power device can be achieved, and at the same time, the cost can be reduced.

[0018] Additional aspects and advantages of the present utility model will be given in part in the following description, become apparent in part from the following description, or be understood through the practice of the present utility model. Brief Description of the Drawings

[0019] Figure 1 It is a schematic block diagram of a drive circuit according to an embodiment of the present utility model;

[0020] Figure 2 It is a hardware topology diagram of a drive circuit according to an embodiment of the present utility model;

[0021] Figure 3 It is a hardware topology diagram of a drive circuit according to another embodiment of the present utility model;

[0022] Figure 4 It is a hardware topology diagram of a drive circuit according to an embodiment of the present utility model;

[0023] Figure 5 It is a schematic block diagram of a controller according to an embodiment of the present utility model;

[0024] Figure 6 It is a schematic block diagram of a vehicle according to an embodiment of the present utility model;

[0025] Figure 7 It is a schematic block diagram of a vehicle according to another embodiment of the present utility model. Detailed Description of the Embodiments

[0026] Embodiments of the present utility model will be described in detail below. Examples of the embodiments are shown in the drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary and are intended to explain the present utility model and should not be construed as limiting the present utility model.

[0027] The drive circuit, controller, and vehicle proposed according to embodiments of the present utility model will be described below with reference to the drawings.

[0028] Figure 1 It is a schematic block diagram of a drive circuit according to an embodiment of the present utility model.

[0029] As Figure 1As shown, the drive circuit 100 of the embodiment of the present utility model is used to drive a hybrid power device. The hybrid power device includes a first power switch tube G1 and a second power switch tube G2 connected in parallel. The drive circuit 100 includes: a microcontroller chip 110, the microcontroller chip 110 has a first output terminal for outputting a switching signal; a drive chip 120, the input terminal of the drive chip 120 is connected to the first output terminal of the microcontroller chip 110 for amplifying the switching signal to obtain a drive signal; a first drive branch 130, the first drive branch 130 is respectively connected to the output terminal of the drive chip 120 and the first power switch tube G1 for delaying the driving of the first power switch tube G1 to switch based on the drive signal; a second drive branch 140, the second drive branch 140 is respectively connected to the output terminal of the drive chip 120 and the second power switch tube G2 for directly driving the second power switch tube G2 to switch based on the drive signal. Among them, in one embodiment, the model of the drive chip 120 can be EG3023.

[0030] Specifically, the microcontroller chip 110 outputs a switching signal to the drive chip 120 through the first output terminal. The drive chip 120 can amplify the switching signal to obtain a drive signal and send the drive signal to the first drive branch 130 and the second drive branch 140 respectively. When the drive signal is a conduction signal, after receiving the drive signal, the first drive branch 130 delays for a certain time to drive the first power switch tube G1 to conduct; after receiving the drive signal, the second drive branch 140 directly drives the second power switch tube G2 to conduct, so that the conduction time of the first power switch tube G1 is later than that of the second switch tube Q2, thereby achieving the purpose of separately controlling the conduction of the first power switch tube G1 and the second power switch tube G2. When the drive signal is a turn-off signal, after receiving the drive signal, the first drive branch 130 delays for a certain time to drive the first power switch tube G1 to turn off; after receiving the drive signal, the second drive branch 140 directly drives the second power switch tube G2 to turn off, so that the turn-off time of the first power switch tube G1 is later than that of the second switch tube Q2, thereby achieving the purpose of separately controlling the turn-off of the first power switch tube G1 and the second power switch tube G2.

[0031] According to an embodiment of the present utility model, the first power switch tube G1 is a Si switch tube, and the second power switch tube G2 is a SiC switch tube. Exemplarily, as Figure 2 shown, the first power switch tube G1 can be an IGBT, the second power switch tube G2 can be a MOSFET, and the first power switch tube G1 and the second power switch tube G2 are connected in parallel.

[0032] According to an embodiment of the present utility model, as Figure 2As shown in the figure, the first driving branch 130 includes a delay circuit 131 and a first push-pull circuit 132. The delay circuit 131 is respectively connected to the output terminal of the driving chip 120 and the input terminal of the first push-pull circuit 132, and is used to delay the output of the driving signal to the first push-pull circuit 132. The output terminal of the first push-pull circuit 132 is connected to the first power switch tube G1, and is used to amplify the voltage of the driving signal and output it to the first power switch tube G1 to drive the first power switch tube G1 to switch.

[0033] That is to say, when the driving signal is transmitted to the first driving branch 130, the delay circuit 131 can delay the output of the driving signal to the first push-pull circuit 132. The first push-pull circuit 132 can amplify the voltage of the driving signal and transmit the amplified driving signal to the control terminal of the first power switch tube G1, so as to drive the first power switch tube G1 to conduct or turn off.

[0034] According to an embodiment of the present invention, as Figure 2 shown, the delay circuit 131 includes: a first diode D1 and a first resistor R1. The anode of the first diode D1 is connected to the output terminal of the driving chip 120, the cathode of the first diode D1 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is connected to the input terminal of the first push-pull circuit 132. A second diode D2 and a second resistor R2. The anode of the second diode D2 is connected to the input terminal of the first push-pull circuit 132, the cathode of the second diode D2 is connected to one end of the second resistor R2, and the other end of the second resistor R2 is connected to the output terminal of the driving chip 120. A first capacitor C1. One end of the first capacitor C1 is respectively connected to the other end of the first resistor R1, the anode of the second diode D2, and the input terminal of the first push-pull circuit 132, and the other end of the first capacitor C1 is grounded.

[0035] Furthermore, according to an embodiment of the present invention, as Figure 2 shown, the first push-pull circuit 132 includes: a first switch tube Q1. The first end of the first switch tube Q1 is connected to the delay circuit 131, the second end of the first switch tube Q1 is connected to the positive power supply V+, and the third end of the first switch tube Q1 is connected to the first power switch tube G1. A second switch tube Q2. The first end of the second switch tube Q2 is respectively connected to the first end of the first switch tube Q1 and the delay circuit 131, the second end of the second switch tube Q2 is connected to the negative power supply V-, and the third end of the second switch tube Q2 is respectively connected to the third end of the first switch tube Q1 and the first power switch tube G1. Among them, the first switch tube Q1 can be an NPN-type triode or an N-type MOS tube, and the second switch tube Q2 can be a PNP-type triode or a P-type MOS tube. Figure 2 Here, the triode is taken as an example, which should not be construed as a limitation to the present application.

[0036] Specifically, during the conduction process of the drive hybrid power device, the microcontroller chip 110 outputs a high-level conduction signal to the drive chip 120 through the first output terminal. The drive chip 120 can amplify the high-level conduction signal to obtain a high-level drive signal, and send the high-level drive signal to the first drive branch 130 and the second drive branch 140 respectively. The high-level drive signal charges the first capacitor C1 through the first diode D1 and the first resistor R1, so that the voltage on the first end of the first switch Q1 rises slowly. After a period of time, when the voltage on the first end of the first switch Q1 reaches the conduction voltage of the first switch Q1, the first switch Q1 conducts. After conduction, the positive power supply V+ is applied to the control terminal of the first power switch G1, driving the first power switch G1 to conduct, thus realizing the delayed conduction of the first power switch G1.

[0037] During the turn-off process of the drive hybrid power device, the microcontroller chip 110 outputs a low-level turn-off signal to the drive chip 120 through the first output terminal. The drive chip 120 can amplify the low-level turn-off signal to obtain a low-level drive signal, and send the low-level drive signal to the first drive branch 130 and the second drive branch 140 respectively. The low-level drive signal discharges the first capacitor C1 through the second diode D2 and the second resistor R2, so that the voltage on the first end of the second switch Q2 drops slowly. After a period of time, when the voltage on the first end of the second switch Q2 is at a low level, the second switch Q2 conducts. After conduction, the negative power supply V- is applied to the control terminal of the first power switch G1, driving the first power switch G1 to turn off, thus realizing the delayed turn-off of the first power switch G1.

[0038] According to an embodiment of the present invention, as Figure 2 shown, the second drive branch 140 includes a current limiting circuit 141 and a second push-pull circuit 142. The current limiting circuit 141 is respectively connected to the output terminal of the drive chip 120 and the input terminal of the second push-pull circuit 142 for limiting the current of the drive signal; the output terminal of the second push-pull circuit 142 is connected to the second power switch G2 for voltage-amplifying the drive signal and outputting it to the second power switch G2 to drive the second power switch G2 to switch.

[0039] That is to say, when the drive signal is sent to the second drive branch 140, the current limiting circuit 141 can limit the current of the drive signal and then output it to the second push-pull circuit 142. The second push-pull circuit 142 can voltage-amplify the drive signal and send the amplified drive signal to the control terminal of the second power switch G2, so as to drive the second power switch G2 to conduct or turn off.

[0040] According to an embodiment of the present invention, as Figure 2As shown, the current limiting circuit 141 includes: a third resistor R3, which is connected in series between the output terminal of the driving chip 120 and the input terminal of the second push-pull circuit 142; or, as Figure 3 shown, a fourth resistor R4 and a third diode D3, the anode of the third diode D3 is connected to the input terminal of the second push-pull circuit 142, the cathode of the third diode D3 is connected to the output terminal of the driving chip 120, and the fourth resistor R4 is connected in parallel with the third diode D3.

[0041] According to an embodiment of the present invention, as Figure 2 or Figure 3 shown, the second push-pull circuit 142 includes: a third switching transistor Q3, the first end of the third switching transistor Q3 is connected to the current limiting circuit 141, the second end of the third switching transistor Q3 is connected to the positive power supply V+, and the third end of the third switching transistor Q3 is connected to the second power switching transistor G2; a fourth switching transistor Q4, the first end of the fourth switching transistor Q4 is respectively connected to the first end of the third switching transistor Q3 and the current limiting circuit 141, the second end of the fourth switching transistor Q4 is connected to the negative power supply V-, and the third end of the fourth switching transistor Q4 is respectively connected to the third end of the third switching transistor Q3 and the second power switching transistor G2.

[0042] Specifically, please refer to Figure 3 , during the conduction process of the driving hybrid power device, the microcontroller chip 110 outputs a high-level conduction signal to the driving chip 120 through the first output terminal. The driving chip 120 can amplify the high-level conduction signal to obtain a high-level driving signal, and transmit the high-level driving signal to the first driving branch 130 and the second driving branch 140 respectively. The high-level driving signal is sent to the first end of the third switching transistor Q3 after being limited by the fourth resistor R4, so that the third switching transistor Q3 is turned on. After the third switching transistor Q3 is turned on, the positive power supply V+ is applied to the control terminal of the second power switching transistor G2, driving the second power switching transistor G2 to conduct.

[0043] During the turn-off process of the driving hybrid power device, the microcontroller chip 110 outputs a low-level turn-off signal to the driving chip 120 through the first output terminal. The driving chip 120 can amplify the low-level turn-off signal to obtain a low-level driving signal, and transmit the low-level driving signal to the first driving branch 130 and the second driving branch 140 respectively. The low-level driving signal is sent to the first end of the fourth switching transistor Q4 through the third diode D3, so that the fourth switching transistor Q4 is turned on. After the fourth switching transistor Q4 is turned on, the negative power supply V- is applied to the control terminal of the second power switching transistor G2, driving the second power switching transistor G2 to turn off.

[0044] According to an embodiment of the present invention, as Figure 4As shown, the drive circuit 100 further includes a first control circuit 150 and a second control circuit 160. The microcontroller chip 110 further includes a second output terminal and a third output terminal for outputting a first control signal through the second output terminal and a second control signal through the third output terminal. Among them, the first control circuit 150 is respectively connected to the second output terminal of the microcontroller chip 110, the output terminal of the drive chip 120, and the first drive branch 130, and is used to output a first drive signal based on the first control signal and the drive signal, so that the first drive branch 130 drives the first power switch tube G1 to switch with a time delay based on the first drive signal. The second control circuit 160 is respectively connected to the third output terminal of the microcontroller chip 110, the output terminal of the drive chip 120, and the second drive branch 140, and is used to output a second drive signal based on the second control signal and the drive signal, so that the second drive branch 140 drives the second power switch tube G2 to switch with a time delay based on the second drive signal.

[0045] According to an embodiment of the present invention, as Figure 4 shown, the circuit structures of the first control circuit 150 and the second control circuit 160 are the same. Among them, the first control circuit 150 includes: an AND gate, the first input terminal of the AND gate is connected to the second output terminal of the microcontroller chip 110, the second input terminal of the AND gate is connected to the output terminal of the drive chip 120, and the output terminal of the AND gate is connected to the first drive branch 130.

[0046] Specifically, as Figure 4 shown, when the first control signal is at a high level, the drive signal can be output to the first drive branch 130 through the first control circuit 150. When the first control signal is at a low level, the drive signal cannot be output to the first drive branch 130 through the first control circuit 150. Similarly, when the second control signal is at a high level, the drive signal can be output to the second drive branch 140 through the second control circuit 160. When the second control signal is at a low level, the drive signal cannot be output to the second drive branch 140 through the second control circuit 160. Therefore, whether the drive signal is connected to the first drive branch 130 and the second drive branch 140 can be controlled by the first control signal and the second control signal output by the microcontroller chip 110, thereby controlling the conduction and cutoff of the first power switch tube G1 and the second power switch tube G2, increasing the drive flexibility, enabling the motor controller to dynamically switch the on and off states of the first power switch tube G1 and the second power switch tube G2 according to the actual working conditions. Through this hybrid power device, the respective advantages of the two power devices can be fully utilized, achieving low cost while improving the system efficiency.

[0047] In summary, according to the driving circuit of the embodiment of the present utility model, the micro-control chip outputs a switching signal, the driving chip amplifies the current of the switching signal to obtain a driving signal, the first driving branch delays the driving of the first power switch based on the driving signal, and the second driving branch directly drives the second power switch based on the driving signal. Thus, this circuit can use a switching signal, a driving chip, and two driving branch circuits composed of discrete devices to replace two identical driving chips to drive a hybrid power device, achieving the purpose of separately driving two parallel switching tubes in the hybrid power device while reducing costs.

[0048] Corresponding to the above embodiment, the present utility model also proposes a controller.

[0049] Figure 5 It is a block diagram of the controller according to the embodiment of the present utility model.

[0050] As Figure 5 shown, the controller 200 of the embodiment of the present utility model includes the above-mentioned driving circuit 100.

[0051] According to the controller of the embodiment of the present utility model, through the above-mentioned driving circuit, it can use a switching signal, a driving chip, and two driving branch circuits composed of discrete devices to replace two identical driving chips to drive a hybrid power device, achieving the purpose of separately driving two parallel switching tubes in the hybrid power device while reducing costs.

[0052] Corresponding to the above embodiment, the present utility model also proposes a vehicle.

[0053] As Figure 6 shown, the vehicle 300 of the embodiment of the present utility model includes the above-mentioned driving circuit 100; or, as Figure 7 shown, the vehicle 200 of the embodiment of the present utility model includes the above-mentioned controller 200.

[0054] According to the vehicle of the embodiment of the present utility model, through the above-mentioned driving circuit or controller, it can achieve the purpose of separately driving two parallel switching tubes in the hybrid power device while reducing costs.

[0055] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present utility model. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0056] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In the description of the present utility model, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically defined.

[0057] In the present utility model, unless otherwise clearly specified and defined, terms such as "installed", "connected", "coupled", "fixed", etc. shall be construed in a broad sense. For example, it may be a fixed connection, a detachable connection, or integrated; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the communication inside two elements or the interaction relationship between two elements, unless otherwise clearly defined. For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0058] Although the embodiments of the present utility model have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present utility model. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present utility model.

Claims

1. A driving circuit, characterized in that, For driving a hybrid power device, the hybrid power device includes a first power switch and a second power switch connected in parallel, and the driving circuit includes: A microcontroller chip having a first output terminal for outputting a switching signal; A driving chip, the input terminal of which is connected to the first output terminal of the microcontroller chip for current-amplifying the switching signal to obtain a driving signal; A first driving branch respectively connected to the output terminal of the driving chip and the first power switch for delaying the driving of the first power switch to turn on and off based on the driving signal; A second driving branch respectively connected to the output terminal of the driving chip and the second power switch for directly driving the second power switch to turn on and off based on the driving signal.

2. The drive circuit according to claim 1, wherein The first driving branch includes a delay circuit and a first push-pull circuit. The delay circuit is respectively connected to the output terminal of the driving chip and the input terminal of the first push-pull circuit for delaying the output of the driving signal to the first push-pull circuit; The output terminal of the first push-pull circuit is connected to the first power switch for voltage-amplifying the driving signal and outputting it to the first power switch to drive the first power switch to turn on and off.

3. The drive circuit according to claim 2, characterized in that, The delay circuit includes: A first diode and a first resistor. The anode of the first diode is connected to the output terminal of the driving chip, the cathode of the first diode is connected to one end of the first resistor, and the other end of the first resistor is connected to the input terminal of the first push-pull circuit; A second diode and a second resistor. The anode of the second diode is connected to the input terminal of the first push-pull circuit, the cathode of the second diode is connected to one end of the second resistor, and the other end of the second resistor is connected to the output terminal of the driving chip; A first capacitor. One end of the first capacitor is respectively connected to the other end of the first resistor, the anode of the second diode, and the input terminal of the first push-pull circuit, and the other end of the first capacitor is grounded.

4. The drive circuit according to claim 2, wherein The first push-pull circuit includes: A first switch transistor. The first end of the first switch transistor is connected to the delay circuit, the second end is connected to the positive power supply, and the third end is connected to the first power switch; A second switch transistor. The first end of the second switch transistor is respectively connected to the first end of the first switch transistor and the delay circuit, the second end is connected to the negative power supply, and the third end is respectively connected to the third end of the first switch transistor and the first power switch.

5. The drive circuit according to claim 1, wherein The second driving branch includes a current-limiting circuit and a second push-pull circuit. The current-limiting circuit is respectively connected to the output terminal of the driving chip and the input terminal of the second push-pull circuit for limiting the current of the driving signal; The output terminal of the second push-pull circuit is connected to the second power switch for voltage-amplifying the driving signal and outputting it to the second power switch to drive the second power switch to turn on and off.

6. The drive circuit according to claim 5, characterized in that The current-limiting circuit includes: A third resistor, the third resistor being connected in series between the output end of the driving chip and the input end of the second push-pull circuit; or, A fourth resistor and a third diode, the anode of the third diode being connected to the input end of the second push-pull circuit, the cathode of the third diode being connected to the output end of the driving chip, and the fourth resistor being connected in parallel with the third diode.

7. The drive circuit according to claim 5, characterized in that The second push-pull circuit includes: A third switching transistor, a first end of the third switching transistor being connected to the current limiting circuit, a second end of the third switching transistor being connected to a positive power supply, and a third end of the third switching transistor being connected to the second power switching transistor; A fourth switching transistor, a first end of the fourth switching transistor being respectively connected to the first end of the third switching transistor and the current limiting circuit, a second end of the fourth switching transistor being connected to a negative power supply, and a third end of the fourth switching transistor being respectively connected to the third end of the third switching transistor and the second power switching transistor.

8. The drive circuit according to any one of claims 1-7, characterized in that, The driving circuit further includes a first control circuit and a second control circuit, and the micro control chip further includes a second output end and a third output end for outputting a first control signal through the second output end and outputting a second control signal through the third output end; wherein, The first control circuit is respectively connected to the second output end of the micro control chip, the output end of the driving chip, and the first driving branch, and is configured to output a first driving signal based on the first control signal and the driving signal, so that the first driving branch drives the first power switching transistor to switch with a time delay based on the first driving signal; The second control circuit is respectively connected to the third output end of the micro control chip, the output end of the driving chip, and the second driving branch, and is configured to output a second driving signal based on the second control signal and the driving signal, so that the second driving branch drives the second power switching transistor to switch with a time delay based on the second driving signal.

9. The drive circuit according to claim 8, characterized in that The circuit structures of the first control circuit and the second control circuit are the same, wherein the first control circuit includes: An AND gate, a first input end of the AND gate being connected to the second output end of the micro control chip, a second input end of the AND gate being connected to the output end of the driving chip, and an output end of the AND gate being connected to the first driving branch.

10. A vehicle, characterized in that, A driving circuit according to any one of claims 1-9 is included.

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