Circuit layout of active power factor corrector

By dispersing and optimizing signal paths in the active power factor corrector, the problems of heat dissipation and control interference are solved, and the power density and signal integrity are improved.

CN223156973UActive Publication Date: 2025-07-25SHENZHEN PINGCHUANG SEMICON CO LTD +1
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Patent Information

Application Number
CN202521176657.3
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-06-10
Publication Date
2025-07-25
Estimated Expiration
2035-06-10

AI Technical Summary

Technical Problem

Existing active power factor correctors have technical bottlenecks in improving power density, low heat dissipation efficiency and control loops are susceptible to interference, affecting signal integrity.

Method used

The circuit design with a dispersed layout is adopted. The AC EMI filter circuit, DC bus capacitor and Vienna topology circuit are deployed on the AC and DC sides of the PCB board respectively, and the control module is independently set up to efficiently dissipate heat by using a heat dissipation fan to optimize the signal trace path to reduce interference.

Benefits of technology

The power density of the active power factor corrector is improved, the heat dissipation efficiency and signal integrity are improved, and the problems of heat dissipation and control interference are solved.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model belongs to the technical field of direct current charging piles, and discloses a circuit layout of an active power factor corrector. Comprising a main loop module and a control module, the main loop module comprises a first PCB, a jack arranged on the first PCB, an AC EMI filter circuit, a three-phase filter inductor, a Vienna topology loop, a DC bus capacitor and a DC bus additional capacitor connected in parallel with the DC bus capacitor, wherein the AC EMI filter circuit, the three-phase filter inductor, the Vienna topology loop and the DC bus capacitor are electrically connected in sequence. Wherein the direct-current bus capacitor comprises a first electrolytic capacitor and a thin-film capacitor, and the direct-current bus additional capacitor comprises a second electrolytic capacitor; the control module comprises a second PCB and a control circuit, the control circuit is arranged on the second PCB, and the second PCB is connected to the plug-in port in an inserted mode. According to the utility model, the power density can be effectively improved.
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Description

Technical Field

[0001] The utility model relates to the technical field of DC charging piles, and particularly relates to a circuit layout of an active power factor corrector. Background Art

[0002] The charging module is the core component of the DC charging pile, and is used to convert the alternating current in the power grid into direct current to charge the rechargeable battery of the electric vehicle.

[0003] Generally, the charging module is successively composed of an active power factor corrector (i.e., Power Factor Corrector, PFC) and an isolated DC converter. In specific applications, the active power factor corrector converts the three-phase AC power supply into a DC power supply, and at the same time ensures the transmission efficiency on the AC side during the transmission of power; then the DC power supply signal is input into the isolated DC converter for battery use. Thus, it can be seen that the active power factor corrector is the core component of the charging module. In the prior art, the active power factor corrector in the charging module mainly consists of four main circuits of an AC EMI filter circuit, a three-phase filter inductor, a Vienna switching network, and a DC bus capacitor and a control circuit. Among them, the control circuit is used to collect the electrical signals of each main circuit to perform drive control on it.

[0004] In order to improve the power density to meet the actual application requirements, it is necessary to closely arrange the above four main circuits on the corresponding PCB board to reduce the area of the electrical circuit. However, when the four main circuits are closely arranged, on the one hand, it will seriously affect the heat dissipation efficiency of some main circuits with high heat dissipation requirements. On the other hand, the sampling and drive signals of the control circuit are easily interfered by the actions of the main circuits, resulting in control errors and even incorrect switching actions. Thus, it can be seen that limited by the heat dissipation requirements and the anti-interference requirements of the control circuit, there are obvious technical bottlenecks in improving the power density of the existing active power factor corrector. Summary of the Utility Model

[0005] The purpose of the utility model is to provide a circuit layout of an active power factor corrector to solve the technical problem that it is difficult to effectively improve the power density of the existing active power factor corrector.

[0006] To achieve the above object, the utility model proposes the following technical solutions:

[0007] A circuit layout of an active power factor corrector, comprising a main circuit module and a control module that cooperate with each other;

[0008] The main circuit module includes a first PCB board, a socket disposed on the first PCB board, an AC EMI filter circuit, a three-phase filter inductor, a Vienna topology circuit, a DC bus capacitor, and a DC bus additional capacitor connected in parallel with the DC bus capacitor; wherein the DC bus capacitor includes a first electrolytic capacitor and a film capacitor, and the DC bus additional capacitor includes a second electrolytic capacitor;

[0009] The control module includes a second PCB board and a control circuit. The control circuit is disposed on the second PCB board, and the second PCB board is plugged into the socket.

[0010] Further, the connector is located in the middle and lower part of the first PCB board, and includes, from the AC side to the DC side, a voltage collection pin area, a current collection pin area, and a drive output pin area;

[0011] The AC EMI filter circuit and the DC bus additional capacitor are arranged in a longitudinal row on the AC side and are electrically connected to the voltage collection pin area;

[0012] The three-phase filter inductor is placed in the middle and is electrically connected to the current collection pin area;

[0013] The DC bus capacitor and the Vienna topology loop are arranged in a longitudinal row on the DC side, and the Vienna topology loop is electrically connected to the drive output pin area.

[0014] Furthermore, the main circuit module includes a driving circuit, and the input end and the output end of the driving circuit are electrically connected to the driving output pin area and the Vienna topology circuit respectively;

[0015] The film capacitor is deployed at the lower side of the Vienna topology loop;

[0016] The metal wiring connecting the driving circuit and the driving output pin area is arranged between the Vienna topology loop and the film capacitor.

[0017] Furthermore, the voltage collection pin area includes an AC voltage collection area; the main loop module includes a first differential attenuation circuit, the input end of the first differential attenuation circuit is electrically connected to the AC EMI filter circuit, and the output end is electrically connected to the AC voltage collection area.

[0018] Furthermore, the voltage collection pin area includes a DC voltage collection area; the main loop module includes a second differential attenuation circuit, the input end of the second differential attenuation circuit is electrically connected to the DC bus additional capacitor, and the output end is electrically connected to the DC voltage collection area.

[0019] Furthermore, it includes a heat dissipation fan; the heat dissipation fan is deployed close to the DC side of the first PCB board.

[0020] Furthermore, the main loop module includes an auxiliary power supply circuit; the auxiliary power supply circuit is deployed at the lower side of the DC bus additional capacitor, the input end is electrically connected to the DC bus additional capacitor, and the output end is electrically connected to the control circuit.

[0021] Furthermore, the first PCB board includes a clearance area; the clearance area is located between the three-phase filter inductor and the DC bus additional capacitor; wherein the clearance area is used to deploy an isolated DC converter.

[0022] Furthermore, the main circuit module includes a drive isolation power supply circuit, which is deployed between the Vienna topology circuit and the three-phase filter inductor, with an input end electrically connected to a power supply end and an output end electrically connected to the Vienna topology circuit.

[0023] Furthermore, the main circuit module includes a Hall sensor, an input end of the Hall sensor is electrically connected to the three-phase filter inductor, and an output end is electrically connected to the current collection pin area.

[0024] Beneficial effects:

[0025] The present technical solution designs a circuit layout of an active power factor corrector to solve the current problem that it is difficult to effectively improve the power density of the active power factor corrector.

[0026] This technical solution deploys the AC EMI filter circuit next to the AC side of the entire first PCB board to maximize the EMI suppression effect. The DC bus additional capacitor and the DC bus capacitor are respectively set on the AC side and the DC side of the Vienna topology loop. Among them, the DC bus capacitor includes a first electrolytic capacitor and a film capacitor, and the DC bus additional capacitor includes a second electrolytic capacitor. At this time, the DC bus capacitor can effectively absorb high-frequency pulse current, and the DC bus additional capacitor and the DC bus capacitor can cooperate to effectively absorb low-frequency fluctuating power. At the same time, the DC bus capacitor and the DC bus additional capacitor are dispersed around the Vienna topology loop, which can also leave enough space for the radiator of the Vienna topology loop to avoid heat dissipation problems. The control module is also deployed independently and plugged into the first PCB board through a pin header. While leaving sufficient space for the main loop components, it also realizes the shortest possible sampling and drive signal routing, which helps to improve signal integrity and power density.

[0027] It should be appreciated that all combinations of the foregoing concepts, as well as additional concepts described in greater detail below, may be considered part of the inventive subject matter of the present disclosure, provided such concepts are not mutually inconsistent.

[0028] The foregoing and other aspects, embodiments, and features of the teachings of the present utility model can be more comprehensively understood from the following description in conjunction with the accompanying drawings. Other additional aspects of the present utility model, such as the features and / or beneficial effects of exemplary embodiments, will be apparent from the following description or will be learned through the practice of specific embodiments in accordance with the teachings of the present utility model. Brief Description of the Drawings

[0029] The drawings are not intended to be drawn to scale. In the drawings, each identical or nearly identical component shown in each figure may be denoted by the same reference numeral. For the sake of clarity, not every component is labeled in each figure. Now, embodiments of various aspects of the present utility model will be described by way of example and with reference to the drawings, wherein:

[0030] Figure 1 is a topological structure diagram of the circuit layout of the active power factor corrector described in this embodiment;

[0031] Figure 2 is a schematic circuit diagram of the main circuit module in the circuit layout of the active power factor corrector described in this embodiment;

[0032] Figure 3 is a schematic diagram of the structure of the main circuit module in the circuit layout of the active power factor corrector described in this embodiment.

[0033] In the figures, the reference numerals are as follows: 1 is the first PCB board, 2 is the socket, 3 is the AC EMI filter circuit, 4 is the three-phase filter inductor, 5 is the Vienna topology circuit, 6 is the DC bus capacitor, 7 is the additional DC bus capacitor, 8 is the auxiliary power supply circuit, 9 is the clearance area, 10 is the drive isolation power supply circuit, 11 is the AC terminal, 12 is the pre-charge circuit; 3.1 is the varistor, 3.2 is the X capacitor, 3.3 is the relay, 3.4 is the Y capacitor, 3.5 is the common mode inductor, 6.1 is the first electrolytic capacitor, 6.2 is the thin film capacitor, 7.1 is the second electrolytic capacitor. Detailed Embodiments

[0034] To make the objectives, technical solutions, and advantages of the embodiments of the present utility model clearer, the technical solutions of the embodiments of the present utility model will be clearly and completely described below in conjunction with the drawings of the embodiments of the present utility model. Obviously, the described embodiments are some, but not all, of the embodiments of the present utility model. All other embodiments obtained by those of ordinary skill in the art based on the described embodiments of the present utility model without creative efforts shall fall within the scope of protection of the present utility model. Unless otherwise defined, the technical terms or scientific terms used herein shall have the ordinary meaning as understood by those of ordinary skill in the art to which the present utility model pertains.

[0035] In the description of the utility model patent application and the claims, the terms "first", "second" and similar terms do not denote any order, quantity or importance, but are only used to distinguish different components. Similarly, unless the context clearly indicates otherwise, singular terms such as "a", "an" or "the" do not denote a limitation of quantity, but mean that there is at least one. Terms such as "comprising" or "including" mean that the elements or objects appearing before "comprising" or "including" cover the features, wholes, steps, operations, elements and / or components listed after "comprising" or "including", and do not exclude the existence or addition of one or more other features, wholes, steps, operations, elements, components and / or their combinations. Terms such as "upper", "lower", "left" and "right" are only used to represent relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0036] In a DC charging pile, the charging module consists of a pre-stage rectifier PFC circuit and an isolated DC converter. Among them, the function of the pre-stage rectifier PFC circuit is: through the high-frequency switch of the Vienna topology rectifier bridge, convert the three-phase AC power supply into a DC power supply, and at the same time ensure the transmission efficiency on the AC side during the power transmission process. During the operation of the high-frequency switch, the digital signal processor (Digital Signal Processor, DSP, that is, the control circuit described in this embodiment) obtains the circuit operating state in real time through the voltage and current sampling circuit, performs high-speed operations to generate a duty cycle signal, and controls the active switch tube in the Vienna topology circuit through the drive circuit.

[0037] In order to meet the high-power demand, it is necessary to reduce the electrical loop area. However, the power electronic devices that make up the Vienna topology rectifier bridge and the filter components (inductors, capacitors) on both the AC and DC sides have a heating power of hundreds of watts. Therefore, reducing the electrical loop area will lead to heat dissipation problems and an increase in electromagnetic interference. That is, heat dissipation optimization, reduction of the electrical loop area, and anti-interference design of the control loop usually conflict with each other, which requires sacrificing part of the power density in the PFC design to meet other parameter settings. Based on this, this embodiment aims to provide a circuit layout of an active power factor corrector to solve the above technical problems.

[0038] The following further specifically introduces the circuit layout of the active power factor corrector disclosed in the present utility model in conjunction with the embodiments shown in the accompanying drawings.

[0039] Combined Figures 1 to 3 As shown, it includes a main circuit module, a control module and a cooling fan that cooperate with each other. Among them, the main circuit module is used to deploy each main circuit; the control module is used to deploy the control circuit, that is, the digital signal processor; the cooling fan is used to provide cooling air.

[0040] The main circuit module includes a first PCB board 1, and a jack 2, an AC EMI filter circuit 3, a three-phase filter inductor 4, a Vienna topology circuit 5, a DC bus capacitor 6, and a DC bus additional capacitor 7 deployed on the first PCB board 1. Specifically, the DC bus capacitor 6 includes a first electrolytic capacitor 6.1 and a thin-film capacitor 6.2, and the DC bus additional capacitor 7 includes a second electrolytic capacitor 7.1.

[0041] For the convenience of description, in this embodiment, the left side of the first PCB board 1 is defined as the AC side, and the right side is defined as the DC side.

[0042] Specifically, the jack 2 is used to install the control circuit, and there is signal interaction between the control circuit and each main circuit. Therefore, the jack 2 is arranged in the middle and lower part of the first PCB board 1. Specifically, it is a pin-type structure. Correspondingly, the pin-type jack includes, from left to right: a voltage acquisition pin area, a current acquisition pin area, and a drive output pin area. The control module includes a second PCB board and a control circuit, the control circuit is deployed on the second PCB board, and the second PCB board is plugged into the jack 2. Specifically, in order to meet the requirements of high anti-interference signal transmission and provide sufficient mechanical fixing strength for the second PCB board, the jack 2 is set to use a pin header with a pitch of 2.54 mm. At the same time, it also leaves enough board area for the layout of power components on the first PCB board 1 to ensure the copper pouring width and small return path.

[0043] The AC EMI filter circuit 3, the three-phase filter inductor 4, the Vienna topology circuit 5, and the DC bus capacitor 6 are electrically connected in sequence through metal wiring; the DC bus capacitor 6 and the DC bus additional capacitor 7 are arranged in parallel. The metal wiring described in this embodiment is specifically copper foil. Corresponding to each pin area, the AC EMI filter circuit 3 and the DC bus additional capacitor 7 are arranged longitudinally on the AC side and are electrically connected to the voltage acquisition pin area through metal wiring. In this embodiment, the voltage acquisition pin area includes an AC voltage acquisition area and a DC voltage acquisition area. In specific implementation, the main circuit module includes a first differential attenuation circuit and a second differential attenuation circuit. The input end of the first differential attenuation circuit is electrically connected to the AC EMI filter circuit 3 through metal wiring, and the output end is electrically connected to the AC voltage acquisition area through metal wiring. The input end of the second differential attenuation circuit is electrically connected to the DC bus additional capacitor 7 through metal wiring, and the output end is electrically connected to the DC voltage acquisition area through metal wiring. Thus, the control circuit can collect AC voltage signals and DC voltage signals.

[0044] More specifically, for the AC EMI filter circuit 3, it includes a fuse, a varistor 3.1, an X capacitor 3.2, a relay 3.3, a Y capacitor 3.4, and a common-mode inductor 3.5 that are electrically connected in sequence through metal wiring. In specific implementation, the AC EMI filter circuit 3 is specifically located beside the AC terminal 11. Thus, while the PFC circuit can meet the current EMI standard, it can further provide sufficient EMI attenuation and maximize the EMI suppression effect.

[0045] For the DC bus additional capacitor 7, it can not only fully absorb a small amount of fluctuating power caused by the harmonic components of the AC voltage through the large-capacity second electrolytic capacitor 7.1, but also exist as a power source to assist in powering the control module. Based on this, the main circuit module is provided with an auxiliary power supply circuit 8. The auxiliary power supply circuit 8 is deployed on the lower side of the DC bus additional capacitor 7. Its input terminal is electrically connected to the DC bus additional capacitor 7 through metal wiring, and its output terminal is electrically connected to the control circuit through metal wiring. At this time, the auxiliary power supply circuit 8 directly draws power from the DC bus additional capacitor 7 nearby, ensuring power integrity.

[0046] At the same time, a pre-charge circuit 12 is also arranged to reduce the impact during PFC startup.

[0047] The three-phase filter inductor 4 is placed in the middle and is electrically connected to the current acquisition pin area through metal wiring. Specifically, the main circuit module includes a Hall sensor. The input terminal of the Hall sensor is electrically connected to the three-phase filter inductor 4 through metal wiring, and the output terminal is electrically connected to the current acquisition pin area through metal wiring; to realize the acquisition of current signals.

[0048] The DC bus capacitor 6 and the Vienna topology circuit 5 are arranged longitudinally on the DC side. The Vienna topology circuit 5 is electrically connected to the drive output pin area through metal wiring. Specifically, the main circuit module is provided with a drive circuit. The input terminal of the drive circuit is electrically connected to the drive output pin area through metal wiring, and the output terminal is electrically connected to the Vienna topology circuit 5 through metal wiring. In specific implementation, the first electrolytic capacitor 6.1 and the thin-film capacitor 6.2 can fully absorb high-frequency current components. Considering the DC bus additional capacitor 7 at the same time, since the electrolytic capacitor is divided into the first electrolytic capacitor 6.1 and the second electrolytic capacitor 7.1 and placed on the AC side and the DC side respectively, and the remaining area between the AC EMI filter circuit 3 and the auxiliary power supply circuit 8 is utilized for layout, while improving the layout compactness to reduce the loop area, it also leaves sufficient space for the radiator of the Vienna topology circuit 5, ensuring its heat dissipation capacity. In this embodiment, the radiator of the Vienna topology circuit 5 is specifically a heat dissipation aluminum block deployed between the corresponding electronic components and the first PCB board 1.

[0049] Furthermore, from the perspective of heat dissipation, the Vienna topology circuit 5 and the three-phase filter inductor 4 are arranged along the direction of the cooling fan, and the cooling fan is arranged close to the DC side of the first PCB board 1. At this time, the external air first blows through the radiator of the Vienna topology circuit 5 with higher heat dissipation requirements, then through the three-phase filter inductor 4 with lower heat dissipation requirements, and even the common-mode inductor 3.5, so as to achieve efficient thermal management. In specific implementation, the electronic components in the Vienna topology circuit 5 are all in TO-247 package, and the connected radiator is in a vertical layout for easy installation. As a preferred implementation mode, in order to achieve a lower ripple output with a very small inductance, the three-phase filter inductor 4 and the Vienna topology circuit 5 are set in an interleaved parallel configuration.

[0050] For the Vienna topology circuit 5, in combination with the above-mentioned auxiliary power supply circuit 8, the main circuit module is set to include a drive isolation power supply circuit 10. Specifically, the drive isolation power supply circuit 10 is composed of a full-bridge self-excited chip, a high-frequency small transformer, and a rectifier diode, and is deployed between the Vienna topology circuit 5 and the three-phase filter inductor 4. Its input end is electrically connected to the power supply end (specifically the auxiliary power supply circuit 8), and the output end is electrically connected to the Vienna topology circuit 5. At this time, the drive isolation power supply circuit 10 can provide isolated power supply with high power integrity for the drive circuit. At the same time, in combination with the drive circuit, the thin film capacitor 6.2 is deployed on the lower side of the Vienna topology circuit 5, and the metal wiring connecting the drive circuit and the drive output pin area is located between the Vienna topology circuit 5 and the thin film capacitor 6.2, and bypasses from the right edge of the first PCB board 1 and then connects to the drive circuit. Thus, the interference of the high-frequency operation of the Vienna topology circuit 5 on the drive signal line can be minimized.

[0051] Furthermore, in order to facilitate the subsequent deployment of the isolated DC converter, the first PCB board 1 is set to include a relief area 9. The relief area 9 is located between the three-phase filter inductor 4 and the DC bus additional capacitor 7. Among them, the relief area 9 is used to deploy the isolated DC converter. Specifically, the isolated DC converter is installed by snap-on.

[0052] It can be seen that in specific implementation, this embodiment deploys the AC EMI filter circuit 3 beside the AC side of the first PCB board to maximize the EMI suppression effect. DC bus additional capacitors 7 and DC bus capacitors 6 are respectively arranged on the AC side and the DC side of the Vienna topology loop 5. At this time, the DC bus capacitor 6 can effectively absorb high-frequency pulsed current, and the DC bus additional capacitor 7 and the DC bus capacitor 6 can cooperate to effectively absorb low-frequency fluctuating power. At the same time, dispersedly deploying the DC bus capacitor 6 and the DC bus additional capacitor 7 around the Vienna topology loop 5 can also leave enough space for the radiator of the Vienna topology loop 5. Furthermore, they are sequentially arranged on the first PCB board 1 according to the connection sequence of each main loop to improve the layout compactness. Secondly, the control module is independently deployed to leave sufficient space for each main loop component; and the pin areas of the docking socket 2 are sequentially arranged through the deployment positions of each main loop to achieve the shortest possible sampling and drive signal traces. Then, considering that the Vienna topology loop 5 and the three-phase filter inductor 4 in the main loop are both the main heat-generating parts, and the heat dissipation requirement of the Vienna topology loop 5 is relatively higher than that of the three-phase filter inductor 4, the cooling fan is deployed close to the DC side of the first PCB board 1. At this time, the axial wind will sequentially blow through the Vienna topology loop 5 and the three-phase filter inductor 4 to effectively dissipate heat from both of them.

[0053] In summary, this embodiment reduces the loop area to improve the functional efficiency, splits the DC bus capacitor 6 and arranges it around the Vienna topology loop 5 to reasonably utilize the fragmented areas within the first PCB board 1, and coordinates the four parts of the circuit, namely AC filtering, DC bus capacitor, power electronic device, and control system, according to the circuit conduction sequence to achieve a compact deployment; a second PCB board is also set up to externally place the control module to reduce the overall size of the main loop module. In order to avoid the heat dissipation problem caused in this case, the main heat-generating Vienna topology loop 5 and the three-phase filter inductor 4 are arranged close to the cooling fan, and the separated DC bus capacitor also leaves enough space for the radiator of the Vienna topology loop 5. The independently set control module and the shortest possible sampling and drive signal traces also help to improve the signal integrity.

[0054] Although the present utility model has been disclosed above with the preferred embodiments, it is not intended to limit the present utility model. Those with ordinary knowledge in the technical field to which the present utility model pertains can make various modifications and refinements without departing from the spirit and scope of the present utility model. Therefore, the protection scope of the present utility model shall be subject to what is defined by the claims.

Claims

1. Circuit layout of an active power factor corrector, characterized in that It includes a main circuit module and a control module that cooperate with each other; The main circuit module includes a first PCB board, a jack deployed on the first PCB board, an AC EMI filter circuit, a three-phase filter inductor, a Vienna topology circuit, a DC bus capacitor, and a DC bus additional capacitor connected in parallel with the DC bus capacitor that are electrically connected in sequence; among them, the DC bus capacitor includes a first electrolytic capacitor and a thin film capacitor, and the DC bus additional capacitor includes a second electrolytic capacitor; The control module includes a second PCB board and a control circuit, the control circuit is deployed on the second PCB board, and the second PCB board is plugged into the jack.

2. The circuit layout of the active power factor corrector according to claim 1, wherein The jack is located in the middle and lower part of the first PCB board, and includes, in sequence from the AC side to the DC side: a voltage acquisition pin area, a current acquisition pin area, and a drive output pin area; The AC EMI filter circuit and the DC bus additional capacitor are arranged longitudinally on the AC side and are electrically connected to the voltage acquisition pin area; The three-phase filter inductor is placed in the middle and is electrically connected to the current acquisition pin area; The DC bus capacitor and the Vienna topology circuit are arranged longitudinally on the DC side, and the Vienna topology circuit is electrically connected to the drive output pin area.

3. The circuit layout of the active power factor corrector according to claim 2, characterized in that, The main circuit module includes a drive circuit, and the input end and the output end of the drive circuit are electrically connected to the drive output pin area and the Vienna topology circuit respectively; The thin film capacitor is deployed below the Vienna topology circuit; The metal wiring connecting the drive circuit and the drive output pin area is disposed between the Vienna topology circuit and the thin film capacitor.

4. The circuit layout of the active power factor corrector according to claim 2, characterized in that, The voltage acquisition pin area includes an AC voltage acquisition area; the main circuit module includes a first differential attenuation circuit, the input end of the first differential attenuation circuit is electrically connected to the AC EMI filter circuit, and the output end is electrically connected to the AC voltage acquisition area.

5. The circuit layout of the active power factor corrector according to claim 2, characterized in that, The voltage acquisition pin area includes a DC voltage acquisition area; the main circuit module includes a second differential attenuation circuit, the input end of the second differential attenuation circuit is electrically connected to the DC bus additional capacitor, and the output end is electrically connected to the DC voltage acquisition area.

6. The circuit layout of the active power factor corrector according to claim 1, characterized in that, It includes a cooling fan; the cooling fan is deployed near the DC side of the first PCB board.

7. The circuit layout of the active power factor corrector according to claim 1, characterized in that, The main circuit module includes an auxiliary power supply circuit; the auxiliary power supply circuit is deployed below the DC bus additional capacitor, the input end is electrically connected to the DC bus additional capacitor, and the output end is electrically connected to the control circuit.

8. The circuit layout of the active power factor corrector according to claim 1, characterized in that, The first PCB board includes a relief area; the relief area is located between the three-phase filter inductor and the DC bus additional capacitor; among them, the relief area is used to deploy an isolated DC converter.

9. The circuit layout of the active power factor corrector according to claim 1, characterized in that, The main circuit module includes a drive isolation power supply circuit, the drive isolation power supply circuit is deployed between the Vienna topology circuit and the three-phase filter inductor, the input end is electrically connected to the power supply end, and the output end is electrically connected to the Vienna topology circuit.

10. The circuit layout of the active power factor corrector according to claim 1, characterized in that, The main circuit module includes a Hall sensor, the input end of the Hall sensor is electrically connected to the three-phase filter inductor, and the output end is electrically connected to the current acquisition pin area.