Test circuit, circuit board and electronic equipment

Abstract

The utility model discloses a test circuit, a circuit board and electronic equipment, when the test circuit runs, an output interface is connected with a tested chip, and then an upper computer controls a main control chip through a boundary scanning chip, so that the main control chip controls a digital-to-analog conversion module and adjusts analog voltage output by the digital-to-analog conversion module; then the conduction module enables the output interface and the driving output module to be conducted, so that the output interface can output current to the tested chip, in the process, the driving output module is used for enhancing the current of the output interface, and the tested chip returns data to the main control chip through the output interface; and the analog voltage is transmitted to the boundary scanning chip and the upper computer in sequence, so that the boundary scanning test can be completed, and the analog voltage output by the digital-to-analog conversion module is adjusted through the main control chip, so that the voltage of the output interface is changed, and the application scene is expanded.

Description

Technical Field

[0001] This application relates to the field of boundary scan testing technology, and particularly relates to a test circuit, a circuit board, and an electronic device. Background Art

[0002] With the continuous development and complexity of integrated circuit technology, testing and diagnosis have become key links to ensure the quality and reliability of chips. Traditional testing methods are difficult to effectively meet the testing requirements of complex chips, and a more intelligent and flexible testing technology is needed. Traditional integrated circuit testing methods usually rely on external testing instruments to test the pins of chips, but it is relatively difficult to test and debug internal signal lines. With the increase in chip scale and the number of pins, it becomes more and more difficult to use traditional methods for testing and diagnosis. The development of boundary scan technology is to solve the limitations of traditional testing methods, enabling the testing and diagnosis of internal signal lines to be achieved by adding dedicated test logic inside the chip. Boundary scan technology is widely used in the fields of integrated circuit testing, debugging, and diagnosis. It can be used for testing during the chip manufacturing process, helping to detect and solve manufacturing defects; it can be used for verification and debugging during the chip design stage; and it can be used for troubleshooting during equipment maintenance.

[0003] In the related art, in the current circuit for boundary scan testing, the voltage at its interface is fixed and non-adjustable, and the applicable scenarios are limited. Summary of the Utility Model

[0004] This application aims to solve at least one of the technical problems existing in the prior art. For this purpose, this application provides a test circuit, a circuit board, and an electronic device, which can adjust the analog voltage output by the digital-to-analog conversion module through the main control chip, thereby changing the voltage of the output interface to expand the applicable scenarios.

[0005] The test circuit according to the first aspect embodiment of this application is provided with:

[0006] A boundary scan chip, which is used to connect to a host computer;

[0007] A main control chip, which is connected to the boundary scan chip;

[0008] A digital-to-analog conversion module, which is connected to the main control chip;

[0009] A drive output module, the input end of which is connected to the output end of the digital-to-analog conversion module, and the digital-to-analog conversion module is used to output an analog voltage to the drive output module;

[0010] A conduction module;

[0011] Multiple output interfaces, and multiple said output interfaces are respectively connected to the output end of the driving output module through the conduction module. The output interfaces are also connected to the main control chip. The driving output module is used to enhance the current of the output interfaces, and the output interfaces are used to connect the chips to be tested;

[0012] The conduction module is used to make the output interfaces conduct or cut off with the driving output module.

[0013] According to the test circuit of the embodiment of the present application, it has at least the following beneficial effects: When the test circuit of the embodiment of the present application runs, the output interfaces are connected to the chips to be tested, and then the host computer controls the main control chip through the boundary scan chip, so that the main control chip controls the digital-to-analog conversion module and adjusts the analog voltage output by the digital-to-analog conversion module. Then the conduction module makes the output interfaces conduct with the driving output module, so that the output interfaces can output current to the chips to be tested. During this process, the driving output module is used to enhance the current of the output interfaces, and the chips to be tested return data to the main control chip through the output interfaces and are sequentially transmitted to the boundary scan chip and the host computer. In this way, the boundary scan test can be completed, and the analog voltage output by the digital-to-analog conversion module is adjusted by the main control chip, so as to change the voltage of the output interfaces and expand the applicable scenarios.

[0014] According to some embodiments of the present application, the conduction module includes multiple relays and a relay control unit. The relays are connected to the driving output module; the relay control unit is respectively connected to multiple said relays, and the relay control unit is connected to the main control chip. The relay control unit is used to make the relays conduct or cut off, so that the output interfaces corresponding to the relays conduct or cut off with the driving output module.

[0015] According to some embodiments of the present application, the driving output module includes a driving chip and an operational amplifier. The positive input end of the operational amplifier is connected to the output end of the digital-to-analog conversion module. The negative input end of the operational amplifier is connected to the output end of the operational amplifier through a first resistor. The output end of the operational amplifier is connected to the voltage input end of the driving chip. The voltage output end of the driving chip is connected to the conduction module.

[0016] According to some embodiments of the present application, the driving chip adopts an EL7155 chip.

[0017] According to some embodiments of the present application, the relay control unit adopts a logic chip. Multiple pins of the logic chip are respectively connected to the control ends of the relays. The logic chip is used to send signals to the control ends of the corresponding relays through the pins to make the relays conduct or cut off.

[0018] According to some embodiments of the present application, the logic chip is an SN74HC273PW chip.

[0019] According to some embodiments of the present application, it further includes a horn socket, and a plurality of the output interfaces are arranged on the socket.

[0020] According to some embodiments of the present application, the boundary scan chip adopts an FT2232HL chip.

[0021] Some embodiments of the second aspect of the present application provide a circuit board, including the test circuit according to any one of the embodiments of the first aspect of the present application.

[0022] Some embodiments of the third aspect of the present application provide an electronic device, including the circuit board according to the embodiment of the second aspect of the present application.

[0023] The additional aspects and advantages of the present application will be partially given in the following description, partially become obvious from the following description, or be understood through the practice of the present application. Description of the Drawings

[0024] The following further describes the present application in conjunction with the drawings and embodiments, where:

[0025] Figure 1 is a block diagram of the test circuit according to the embodiment of the present application;

[0026] Figure 2 is a circuit schematic diagram of the relay according to the embodiment of the present application

[0027] Figure 3 is a circuit schematic diagram of the drive output module according to the embodiment of the present application.

[0028] Reference Signs:

[0029] Host computer 110; Boundary scan chip 120; Main control chip 130; Digital-to-analog conversion module 140; Drive output module 150; Conducting module 160; Output interface 170; Operational amplifier U2A; Relay K1; Logic chip U3; First resistor R2. Detailed Embodiments

[0030] The following details the embodiments of the present application. The examples of the embodiments are shown in the drawings, where the same or similar reference numerals represent the same or similar elements or elements with the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary and are only used to explain the present application and should not be construed as a limitation to the present application.

[0031] In the description of the present application, it should be understood that for the orientation description, such as the orientation or positional relationship indicated by up, down, front, back, left, right, etc., is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to the present application.

[0032] In the description of the present application, the meaning of "several" is more than one, the meaning of "multiple" is more than two. Understandings such as "greater than", "less than", "exceeding", etc. do not include the recited number, and understandings such as "above", "below", "within", etc. include the recited number. If the first and second are described only for the purpose of distinguishing technical features, they should not be construed as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features or the sequence relationship of the indicated technical features.

[0033] In the description of the present application, unless otherwise clearly defined, terms such as "set", "installed", "connected", etc. should be understood in a broad sense. Those skilled in the art can reasonably determine the specific meanings of the above terms in the present application in combination with the specific content of the technical solution.

[0034] In the description of the present application, the description with reference to terms such as "one embodiment", "some embodiments", "schematic embodiments", "examples", "specific examples", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0035] Refer to Figure 1 , Figure 1It is a block diagram of the test circuit according to the embodiment of the present application. The test circuit according to the embodiment of the present application is provided with a boundary scan chip 120, a main control chip 130, a digital-to-analog conversion module 140, a drive output module 150, a conduction module 160, and a plurality of output interfaces 170. The boundary scan chip 120 is used to connect to the host computer 110, the main control chip 130 is connected to the boundary scan chip 120, and the digital-to-analog conversion module 140 is connected to the main control chip 130; the input end of the drive output module 150 is connected to the output end of the digital-to-analog conversion module 140, and the digital-to-analog conversion module 140 is used to output an analog voltage to the drive output module 150; the plurality of output interfaces 170 are respectively connected to the output end of the drive output module 150 through the conduction module 160, and the output interface 170 is also connected to the main control chip 130. The drive output module 150 is used to enhance the current of the output interface 170, and the output interface 170 is used to connect to the chip under test; the conduction module 160 is used to make the output interface 170 conduct or cut off with the drive output module 150.

[0036] It should be noted that when the test circuit according to the embodiment of the present application is running, the output interface 170 is connected to the chip under test, and then the host computer 110 controls the main control chip 130 through the boundary scan chip 120, so that the main control chip 130 controls the digital-to-analog conversion module 140 to adjust the analog voltage output by the digital-to-analog conversion module 140. Then the conduction module 160 makes the output interface 170 conduct with the drive output module 150, so that the output interface 170 can output current to the chip under test. During this process, the drive output module 150 is used to enhance the current of the output interface 170, and the chip under test returns data to the main control chip 130 through the output interface 170 and is sequentially transmitted to the boundary scan chip 120 and the host computer 110. In this way, the boundary scan test can be completed, and the analog voltage output by the digital-to-analog conversion module 140 is adjusted by the main control chip 130, so as to change the voltage of the output interface 170 to expand the applicable scenarios.

[0037] Specifically, the main control chip 130 configures the input signal to send the required digital code according to the interface requirements (such as SPI, I2C, etc.) of the digital-to-analog conversion module 140. By adjusting the input digital code, the output voltage of the digital-to-analog conversion module 140 can be controlled. The digital-to-analog conversion module 140 uses an AD5304ARMZ chip.

[0038] It should be noted that when there is no need to test, the conduction module 160 makes the output interface 170 cut off with the drive output module 150.

[0039] It can be understood that the host computer 110 can be a computer or other devices, and the present application does not make specific limitations thereto. The boundary scan chip 120 uses an FT2232HL chip. It can serve as a communication interface and communicate with the computer host through a USB interface. Through code configuration on the computer, a stable and reliable boundary scan function can be achieved. The FT2232HL chip has a built-in boundary scan IP core function and also opens an SDK. Developers can control it through code programs to implement the sequence tests required for boundary scanning. Using the FT2232HL chip can reduce the development cycle for developers and has good stability.

[0040] It should be noted that the main control chip 130 uses an FPGA / CPLD chip to achieve fast data reception and transmission, has the ability of parallel processing, improves the communication and response speed, reduces delay, reduces the test time, and increases efficiency. The main control chip 130 is used to control the conduction module 160 and the digital-to-analog conversion module 140 to meet the requirements of different scenarios.

[0041] It can be understood that the boundary scan chip 120 is communicatively connected to the host computer 110 through a USB interface, which is convenient to plug in and has a stable connection. Moreover, the boundary scan chip 120 only needs a USB data cable to connect to the computer to achieve the hardware connection. The power supply of the computer is supplied to the boundary scan chip 120 through the USB, realizing low power consumption, low cost, and low failure rate of the subsequent hardware connection, which is convenient for maintenance.

[0042] It can be understood that the conduction module 160 includes multiple relays K1 and a relay control unit. The relay K1 is connected to the drive output module 150; the relay control unit is respectively connected to multiple relays K1, and the relay control unit is connected to the main control chip 130. The relay control unit is used to turn on or off the relay K1, so that the output interface 170 corresponding to the relay K1 and the drive output module 150 are turned on or off.

[0043] Specifically, referring to Figure 2 , Figure 2 is the circuit schematic diagram of the relay K1. One end of pin 3 of the relay K1 is grounded, and pin 2 is connected to the relay control unit; pin 1 of the relay K1 is connected to the output end of the drive output module 150, and pin 4 of the relay K1 is connected to the output interface 170. When the relay control unit outputs a positive voltage to pin 2, pin 1 and pin 3 of the relay K1 are turned on, so that the output end of the drive output module 150 and the output interface 170 are turned on. When there is no voltage at pin 2 of the relay K1, pin 1 and pin 3 of the relay K1 are turned off, so that the output end of the drive output module 150 and the output interface 170 are turned off. In Figure 2Among them, TCK_ctrl_out represents the signal output by the relay control unit, and TCK_A_O represents the signal output by the output terminal of the drive output module 150. This application uses the relay K1 for electrical isolation, effectively blocking electrical damage during automated testing and protecting the normal function of this circuit.

[0044] It should be noted that the relay control unit uses the logic chip U3. Multiple pins of the logic chip U3 are respectively connected to the control terminals of the relay K1. The logic chip U3 is used to send signals to the corresponding control terminals of the relay K1 through the pins to turn the relay K1 on or off. The logic chip U3 uses the SN74HC273PW chip. There are multiple pins on the logic chip U3, and the pin of the logic chip U3 is connected to pin 2 of the relay K1.

[0045] It can be understood that referring to Figure 3 , Figure 3 is the circuit schematic diagram of the drive output module 150. The drive output module 150 includes a drive chip and an operational amplifier U2A. The positive input terminal of the operational amplifier U2A is connected to the output terminal of the digital-to-analog conversion module 140. The negative input terminal of the operational amplifier U2A is connected to the output terminal of the operational amplifier U2A through the first resistor R2. The output terminal of the operational amplifier U2A is connected to the voltage input terminal of the drive chip. The voltage output terminal of the drive chip is connected to the conduction module 160. The analog voltage output by the output terminal of the digital-to-analog conversion module 140 is input to the drive output module 150 after passing through the operational amplifier U2A.

[0046] It should be noted that the drive chip uses the EL7155 chip, and the model of the operational amplifier U2A is OPA2188AID. Figure 3 The peripheral circuit of the EL7155 chip is also shown. This application does not make specific limitations on the peripheral circuit, and those skilled in the art can set the peripheral circuit of the EL7155 chip according to actual needs. In Figure 3 , VoA represents the analog voltage output by the output terminal of the digital-to-analog conversion module 140.

[0047] It can be understood that the test circuit further includes a corner socket, and multiple output interfaces 170 are arranged on the socket.

[0048] The second aspect of the embodiments of this application provides a circuit board, including the test circuit of the first aspect of the embodiments.

[0049] Since the circuit board includes the test circuit of the first aspect, the corresponding content of the test circuit in the first aspect of the embodiments can be applied to the circuit board of the third aspect, and has the same implementation principle and technical effects. To avoid redundant description, it will not be described in detail here.

[0050] An embodiment of the third aspect of the present application provides an electronic device, including the circuit board of the embodiment of the second aspect.

[0051] Since the electronic device includes the circuit board of the second aspect, the corresponding content of the test circuit in the embodiment of the first aspect can be applied to the electronic device of the third aspect, and has the same implementation principle and technical effect. To avoid redundant description, it will not be described in detail here.

[0052] The embodiments of the present application have been described in detail above in conjunction with the accompanying drawings. However, the present application is not limited to the above embodiments, and various changes can be made without departing from the spirit of the present application within the scope of knowledge possessed by those of ordinary skill in the art. In addition, the embodiments of the present application and the features in the embodiments can be combined with each other without conflict.

Claims

1. A test circuit, characterized in that, There is provided: a boundary scan chip for connecting to a host computer; a main control chip connected to the boundary scan chip; a digital-to-analog conversion module connected to the main control chip; a drive output module, the input end of which is connected to the output end of the digital-to-analog conversion module, and the digital-to-analog conversion module is used to output an analog voltage to the drive output module; a conduction module; a plurality of output interfaces, each of the plurality of output interfaces is connected to the output end of the drive output module through the conduction module, and the output interface is also connected to the main control chip. The drive output module is used to enhance the current of the output interface, and the output interface is used to connect to a chip under test; The conduction module is used to make the output interface conduct or cut off with the drive output module.

2. The test circuit according to claim 1, wherein The conduction module includes a plurality of relays and a relay control unit. The relay is connected to the drive output module; the relay control unit is respectively connected to the plurality of relays, and the relay control unit is connected to the main control chip. The relay control unit is used to make the relay conduct or cut off, so that the output interface corresponding to the relay conducts or cuts off with the drive output module.

3. The test circuit according to claim 1, characterized in that The drive output module includes a drive chip and an operational amplifier. The positive input end of the operational amplifier is connected to the output end of the digital-to-analog conversion module. The negative input end of the operational amplifier is connected to the output end of the operational amplifier through a first resistor. The output end of the operational amplifier is connected to the voltage input end of the drive chip, and the voltage output end of the drive chip is connected to the conduction module.

4. The test circuit according to claim 3, wherein The drive chip uses an EL7155 chip.

5. The test circuit according to claim 2, characterized in that, The relay control unit uses a logic chip. A plurality of pins of the logic chip are respectively connected to the control ends of the relays. The logic chip is used to send signals to the control ends of the corresponding relays through the pins to make the relays conduct or cut off.

6. The test circuit according to claim 5, wherein The logic chip is an SN74HC273PW chip.

7. The test circuit according to claim 1, characterized in that, It further includes a horn socket, and a plurality of the output interfaces are arranged on the socket.

8. The test circuit according to claim 1, characterized in that The boundary scan chip uses an FT2232HL chip.

9. A circuit board, characterized in that, It includes the test circuit according to any one of claims 1 to 8.

10. An electronic device, characterized in that, It includes the circuit board according to claim 9.

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