Multilayer ceramic capacitor

Abstract

The utility model relates to a multilayer ceramic capacitor, and belongs to the technical field of electronic components. The multilayer ceramic capacitor comprises a ceramic chip, a first side edge piece, a second side edge piece, a first outer electrode and a second outer electrode, the ceramic chip comprises a laminated body, a first cover plate and a second cover plate, and the first cover plate, the laminated body and the second cover plate are sequentially arranged in the thickness direction of the ceramic chip. The laminated body includes dielectric material layers, first internal electrodes, and second internal electrodes alternately laminated in a thickness direction of the ceramic chip. According to the utility model, the protruding structure and the recessed structure are designed, so that the combination between the side edge member and the ceramic chip is firmer, and the side edge member and the ceramic chip can be effectively prevented from being separated from each other, thereby ensuring that the multilayer ceramic capacitor has good electrical performance and moisture-proof performance; according to the invention, constraining force can be applied to each layer of the ceramic chip in the thickness direction, and interlayer cracking and stripping phenomena of each layer of the laminated body can be effectively prevented.

Description

Technical Field

[0001] The utility model relates to the technical field of electronic components, in particular to a multilayer ceramic capacitor. Background Art

[0002] A multilayer ceramic capacitor (MLCC) usually consists of two or more external electrodes, multiple internal electrodes, and multiple dielectric materials. Inside it, the metal internal electrode layers and the dielectric material layers are stacked alternately. Due to its characteristics such as compact structure, high capacitance, and easy installation, the multilayer ceramic capacitor is widely used in electronic products such as imaging devices (such as liquid crystal displays, plasma panels, etc.), computers, personal digital assistants (abbreviated as PDA), mobile phones, etc.

[0003] In recent years, in order to achieve the small size and high capacitance of the multilayer ceramic capacitor, maximize the effective area of the electrodes, and improve the lamination accuracy, when manufacturing the multilayer ceramic capacitor, a design without edges is adopted to maximize the area of the internal electrodes in the width direction, and the side edge parts are separately attached to both sides of the ceramic chip. However, in this structural design, the adhesion between the side edge parts and the ceramic chip is weak, making the side edge parts prone to separation and cracking, which in turn leads to deterioration of the product performance of the multilayer ceramic capacitor and a decrease in moisture resistance reliability.

[0004] Therefore, it is very necessary to design a multilayer ceramic capacitor with a more reasonable structural design and less prone to interlayer cracking and peeling of the laminate. Summary of the Utility Model

[0005] The purpose of the utility model is to provide a multilayer ceramic capacitor with a more reasonable structural design and less prone to interlayer cracking and peeling of the laminate, by overcoming the deficiencies of the prior art.

[0006] To achieve the above purpose, the technical solution adopted by the utility model is as follows:

[0007] A multilayer ceramic capacitor includes a ceramic chip, a first side edge part, a second side edge part, a first external electrode, and a second external electrode. The ceramic chip includes a laminate, a first cover sheet, and a second cover sheet. The first cover sheet, the laminate, and the second cover sheet are sequentially arranged in the thickness direction of the ceramic chip. The laminate includes dielectric material layers, a first internal electrode, and a second internal electrode that are alternately laminated in the thickness direction of the ceramic chip;

[0008] The ceramic chip has a first main surface, a second main surface, a first side surface, a second side surface, a first end surface, and a second end surface. The first main surface and the second main surface are opposite in the thickness direction of the ceramic chip. The first side surface and the second side surface are opposite in the width direction of the ceramic chip. The first end surface and the second end surface are opposite in the length direction of the ceramic chip;

[0009] The first major surface has a first region and a second region, the second major surface has a third region and a fourth region, the first region and the third region are respectively adjacent to the first side surface, the second region and the fourth region are respectively adjacent to the second side surface, the first side edge member covers the first region, the first side surface and the third region, and the second side edge member covers the second region, the second side surface and the fourth region;

[0010] The first cover sheet and / or the second cover sheet are provided with a recessed structure, and the first side edge member and / or the second side edge member are provided with a protruding structure corresponding to the recessed structure, and the protruding structure is embedded in the corresponding recessed structure;

[0011] The first external electrode is disposed on the first end surface of the ceramic chip, and the first external electrode is connected to the first internal electrode; the second external electrode is disposed on the second end surface of the ceramic chip, and the second external electrode is connected to the second internal electrode.

[0012] As a preferred embodiment of the multi-layer ceramic capacitor of the present invention, the recessed structure is disposed in at least one of the first region, the second region, the third region, and the fourth region.

[0013] As a preferred embodiment of the multi-layer ceramic capacitor of the present invention, the recessed structure includes a first recessed portion, a second recessed portion, a third recessed portion, and a fourth recessed portion. The first recessed portion has an opening located in the first region, the second recessed portion has an opening located in the second region, the third recessed portion has an opening located in the third region, and the fourth recessed portion has an opening located in the fourth region.

[0014] Furthermore, the first recessed portion further has an opening located on the first side surface, the second recessed portion further has an opening located on the second side surface, the third recessed portion further has an opening located on the first side surface, and the fourth recessed portion further has an opening located on the second side surface.

[0015] Furthermore, the dimension of the first recessed portion in the length direction of the ceramic chip gradually increases from one end close to the first side surface to the end far from the first side surface; the dimension of the second recessed portion in the length direction of the ceramic chip gradually increases from one end close to the second side surface to the end far from the second side surface; the dimension of the third recessed portion in the length direction of the ceramic chip gradually increases from one end close to the first side surface to the end far from the first side surface; the dimension of the fourth recessed portion in the length direction of the ceramic chip gradually increases from one end close to the second side surface to the end far from the second side surface.

[0016] Further, the first recess is inclined relative to the width direction of the ceramic chip, the second recess is inclined relative to the width direction of the ceramic chip, the third recess is inclined relative to the width direction of the ceramic chip, and the fourth recess is inclined relative to the width direction of the ceramic chip.

[0017] Further, the ratio of the sum of the opening areas of the first recess in the first region and the second recess in the second region to the total area of the first main surface is (0.02 - 0.2):1; the ratio of the sum of the opening areas of the third recess in the third region and the fourth recess in the fourth region to the total area of the second main surface is (0.02 - 0.2):1.

[0018] Further, the protruding structure includes a first protruding portion, a second protruding portion, a third protruding portion, and a fourth protruding portion. The first protruding portion is disposed on the first side edge member and is embedded in the first recess. The second protruding portion is disposed on the first side edge member and is located in the third recess. The third protruding portion is disposed on the second side edge member and is embedded in the second recess. The fourth protruding portion is disposed on the second side edge member and is embedded in the fourth recess.

[0019] As a preferred embodiment of the multi-layer ceramic capacitor of the present invention, the size of the first cover sheet in the thickness direction of the ceramic chip is 100 - 300 μm, and the size of the second cover sheet in the thickness direction of the ceramic chip is 100 - 300 μm.

[0020] As a preferred embodiment of the multi-layer ceramic capacitor of the present invention, the thickness of the first side edge member is 50 - 400 μm, and the thickness of the second side edge member is 50 - 400 μm.

[0021] As a preferred embodiment of the multi-layer ceramic capacitor of the present invention, the ratio of the sum of the areas of the first region and the second region to the total area of the first main surface is (0.1 - 0.4):1; the ratio of the sum of the areas of the third region and the fourth region to the total area of the second main surface is (0.1 - 0.4):1.

[0022] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0023] By designing the matching structure of the protruding structure and the recessed structure, the present invention makes the combination between the side edge member and the ceramic chip more firm, can effectively prevent the separation between the side edge member and the ceramic chip, and further ensures that the multi-layer ceramic capacitor has good electrical performance and moisture resistance, can have a binding force on each layer of the ceramic chip in the thickness direction, and can effectively prevent the occurrence of interlayer cracking and peeling phenomena of each layer of the laminate. Description of the Drawings

[0024] Figure 1 A perspective view of the multi-layer ceramic capacitor provided by the present utility model;

[0025] Figure 2 A schematic exploded view of the multi-layer ceramic capacitor provided by the present utility model;

[0026] Figure 3 A schematic exploded view of a ceramic chip, a first side edge member and a second side edge member provided by an embodiment of the present utility model;

[0027] Figure 4 A perspective view of a ceramic chip provided by an embodiment of the present utility model;

[0028] Figure 5 A schematic exploded view of a ceramic chip, a first side edge member and a second side edge member provided by an embodiment of the present utility model from another perspective;

[0029] Figure 6 A perspective view of a ceramic chip provided by an embodiment of the present utility model from another perspective;

[0030] Figure 7 A schematic exploded view of a ceramic chip, a first side edge member and a second side edge member provided by another embodiment of the present utility model;

[0031] Figure 8 A schematic exploded view of a ceramic chip, a first side edge member and a second side edge member provided by yet another embodiment of the present utility model;

[0032] Figure 9 A schematic exploded view of a ceramic chip, a first side edge member and a second side edge member provided by still another embodiment of the present utility model.

[0033] In the figures, 1 - ceramic chip, 11 - laminate, 111 - dielectric material layer, 112 - first internal electrode, 113 - second internal electrode, 12 - first cover sheet, 121 - first recess, 122 - second recess, 13 - second cover sheet, 131 - third recess, 132 - fourth recess, 14 - first main surface, 141 - first region, 142 - second region, 15 - second main surface, 151 - third region, 152 - fourth region, 16 - first side surface, 17 - second side surface, 18 - first end surface, 19 - second end surface, 2 - first side edge member, 21 - first protrusion, 22 - second protrusion, 3 - second side edge member, 31 - third protrusion, 32 - fourth protrusion, 4 - first external electrode, 5 - second external electrode. Detailed Description of the Invention

[0034] To better illustrate the purpose, technical solution, and advantages of the present utility model, the present utility model will be further described below in conjunction with specific embodiments.

[0035] Please refer to Figures 1 to 3 , the present utility model provides a multi-layer ceramic capacitor, including a ceramic chip 1, a first side edge member 2, a second side edge member 3, a first outer electrode 4, and a second outer electrode 5. The ceramic chip 1 includes a stacked body 11, a first cover sheet 12, and a second cover sheet 13. The first cover sheet 12, the stacked body 11, and the second cover sheet 13 are sequentially arranged in the thickness direction of the ceramic chip 1. The stacked body 11 includes a dielectric material layer 111, a first inner electrode 112, and a second inner electrode 113 that are alternately stacked in the thickness direction of the ceramic chip 1;

[0036] Please refer to Figure 4 , Figure 6 , the ceramic chip 1 has a first main surface 14, a second main surface 15, a first side surface 16, a second side surface 17, a first end surface 18, and a second end surface 19. The first main surface 14 and the second main surface 15 are opposite in the thickness direction of the ceramic chip 1. The first side surface 16 and the second side surface 17 are opposite in the width direction of the ceramic chip 1. The first end surface 18 and the second end surface 19 are opposite in the length direction of the ceramic chip 1;

[0037] Please refer to Figures 3 to 6 , the first main surface 14 has a first region 141 and a second region 142. The second main surface 15 has a third region 151 and a fourth region 152. The first region 141 and the third region 151 are respectively adjacent to the first side surface 16. The second region 142 and the fourth region 152 are respectively adjacent to the second side surface 17. The first side edge member 2 covers the first region 141, the first side surface 16, and the third region 151. The second side edge member 3 covers the second region 142, the second side surface 17, and the fourth region 152;

[0038] The first cover sheet 12 and / or the second cover sheet 13 are provided with a concave structure. The first side edge member 2 and / or the second side edge member 3 are provided with a convex structure corresponding to the concave structure. The convex structure is embedded in the corresponding concave structure;

[0039] Please refer to Figure 2 , the first outer electrode 4 is disposed on the first end surface 18 of the ceramic chip 1. The first outer electrode 4 is connected to the first inner electrode 112. The second outer electrode 5 is disposed on the second end surface 19 of the ceramic chip 1. The second outer electrode 5 is connected to the second inner electrode 113.

[0040] The utility model designs a convex structure and a concave structure, which makes the combination between each side edge member and the ceramic chip 1 more firm, can effectively prevent the separation between each side edge member and the ceramic chip 1, and further ensures that the multilayer ceramic capacitor has good electrical performance and moisture resistance. It can have a binding force on each layer of the ceramic chip 1 in the thickness direction and can effectively prevent the occurrence of interlayer cracking and peeling phenomena in each layer of the laminate 11.

[0041] In an embodiment, please refer to Figure 3 、 Figure 5 , the concave structure is arranged in at least one of the first region 141, the second region 142, the third region 151, and the fourth region 152.

[0042] In an embodiment, the concave structure includes a first concave portion 121, a second concave portion 122, a third concave portion 131, and a fourth concave portion 132. The first concave portion 121 has an opening located in the first region 141, the second concave portion 122 has an opening located in the second region 142, the third concave portion 131 has an opening located in the third region 151, and the fourth concave portion 132 has an opening located in the fourth region 152.

[0043] Specifically, please refer to Figure 3 、 Figure 5 , the first concave portion 121 further has an opening located on the first side surface 16, the second concave portion 122 further has an opening located on the second side surface 17, the third concave portion 131 further has an opening located on the first side surface 16, and the fourth concave portion 132 further has an opening located on the second side surface 17.

[0044] Specifically, please refer to Figure 8 , the size of the first concave portion 121 in the length direction of the ceramic chip 1 gradually increases from one end close to the first side surface 16 of the first concave portion 121 to the end far from the first side surface 16; the size of the second concave portion 122 in the length direction of the ceramic chip 1 gradually increases from one end close to the second side surface 17 of the second concave portion 122 to the end far from the second side surface 17; the size of the third concave portion 131 in the length direction of the ceramic chip 1 gradually increases from one end close to the first side surface 16 of the third concave portion 131 to the end far from the first side surface 16; the size of the fourth concave portion 132 in the length direction of the ceramic chip 1 gradually increases from one end close to the second side surface 17 of the fourth concave portion 132 to the end far from the second side surface 17.

[0045] Specifically, please refer to Figure 9, the first recess 121 is inclined relative to the width direction of the ceramic chip 1, the second recess 122 is inclined relative to the width direction of the ceramic chip 1, the third recess 131 is inclined relative to the width direction of the ceramic chip 1, and the fourth recess 132 is inclined relative to the width direction of the ceramic chip 1.

[0046] Specifically, the ratio between the sum of the opening areas of the first recess 121 in the first area 141 and the second recess 122 in the second area 142 and the total area of the first main surface 14 is (0.02 - 0.2):1; the ratio between the sum of the opening areas of the third recess 131 in the third area 151 and the fourth recess 132 in the fourth area 152 and the total area of the second main surface 15 is (0.02 - 0.2):1. When the multilayer ceramic capacitor meets the above area conditions, the bonding between each side edge member and the ceramic chip 1 is more stable.

[0047] Specifically, the protruding structure includes a first protrusion 21, a second protrusion 22, a third protrusion 31, and a fourth protrusion 32. The first protrusion 21 is disposed on the first side edge member 2 and is embedded in the first recess 121, the second protrusion 22 is disposed on the first side edge member 2 and is embedded in the third recess 131, the third protrusion 31 is disposed on the second side edge member 3 and is embedded in the second recess 122, and the fourth protrusion 32 is disposed on the second side edge member 3 and is embedded in the fourth recess 132.

[0048] The first protrusion 21 is adapted to the first recess 121 in terms of quantity, shape, and size, the second protrusion 22 is adapted to the third recess 131 in terms of quantity, shape, and size, the third protrusion 31 is adapted to the second recess 122 in terms of quantity, shape, and size, and the fourth protrusion 32 is adapted to the fourth recess 132 in terms of quantity, shape, and size.

[0049] In one embodiment, the size of the first cover sheet 12 in the thickness direction of the ceramic chip 1 is 100 - 300 μm, and the size of the second cover sheet 13 in the thickness direction of the ceramic chip 1 is 100 - 300 μm.

[0050] In one embodiment, the thickness of the first side edge member 2 is 50 - 400 μm, and the thickness of the second side edge member 3 is 50 - 400 μm.

[0051] In one embodiment, the ratio between the sum of the areas of the first area 141 and the second area 142 and the total area of the first main surface 14 is (0.1 - 0.4):1; the ratio between the sum of the areas of the third area 151 and the fourth area 152 and the total area of the second main surface 15 is (0.1 - 0.4):1. When the multilayer ceramic capacitor meets the above area conditions, the bonding between each side edge member and the ceramic chip 1 is more stable.

[0052] It is understandable that the present utility model does not particularly limit the shapes and sizes of the protruding parts and the recessed parts, and those skilled in the art can design the shapes and sizes of the protruding parts and the recessed parts according to actual needs. The first protruding part 21, the second protruding part 22, the third protruding part 31 and the fourth protruding part 32 can be of the same or different shapes. For example, the shape can be any one of a prismatic shape, a frustum shape, a cylindrical shape, and a hemispherical shape.

[0053] It is understandable that in the present utility model, the length direction refers to the L direction in the drawings, the width direction refers to the W direction in the drawings, and the thickness direction refers to the H direction in the drawings.

[0054] The present utility model provides the following to facilitate the understanding of the present utility model. These embodiments are provided by the present utility model not to limit the scope of the claims.

[0055] Embodiment 1

[0056] The present utility model provides a multi-layer ceramic capacitor, the structure of which is as Figures 1 to 6 shown. The ceramic capacitor includes a ceramic chip 1, a first side edge member 2, a second side edge member 3, a first external electrode 4 and a second external electrode 5. The ceramic chip 1 includes a laminate 11, a first cover sheet 12 and a second cover sheet 13. The first cover sheet 12, the laminate 11 and the second cover sheet 13 are sequentially arranged in the thickness direction of the ceramic chip 1. The laminate 11 includes a dielectric material layer 111, a first internal electrode 112 and a second internal electrode 113 that are alternately laminated in the thickness direction of the ceramic chip 1;

[0057] The ceramic chip 1 has a first main surface 14, a second main surface 15, a first side surface 16, a second side surface 17, a first end surface 18 and a second end surface 19. The first main surface 14 and the second main surface 15 are opposite to each other in the thickness direction of the ceramic chip 1. The first side surface 16 and the second side surface 17 are opposite to each other in the width direction of the ceramic chip 1. The first end surface 18 and the second end surface 19 are opposite to each other in the length direction of the ceramic chip 1;

[0058] The first main surface 14 has a first region 141 and a second region 142. The second main surface 15 has a third region 151 and a fourth region 152. The first region 141 and the third region 151 are respectively adjacent to the first side surface 16. The second region 142 and the fourth region 152 are respectively adjacent to the second side surface 17;

[0059] The first side edge member 2 covers the first region 141, the first side surface 16 and the third region 151. The second side edge member 3 covers the second region 142, the second side surface 17 and the fourth region 152;

[0060] The first cover sheet 12 and the second cover sheet 13 are respectively provided with recessed structures, and the first side edge member 2 and the second side edge member 3 are respectively provided with protruding structures corresponding to the recessed structures, and the protruding structures are embedded in the corresponding recessed structures;

[0061] The first external electrode 4 is disposed on the first end surface 18 of the ceramic chip 1, and the first external electrode 4 is connected to the first internal electrode 112; the second external electrode 5 is disposed on the second end surface 19 of the ceramic chip 1, and the second external electrode 5 is connected to the second internal electrode 113.

[0062] The recessed structures include a first recessed portion 121, a second recessed portion 122, a third recessed portion 131, and a fourth recessed portion 132. The first recessed portion 121 has an opening located in the first region 141, the second recessed portion 122 has an opening located in the second region 142, the third recessed portion 131 has an opening located in the third region 151, and the fourth recessed portion 132 has an opening located in the fourth region 152; the first recessed portion 121 further has an opening located on the first side surface 16, the second recessed portion 122 further has an opening located on the second side surface 17, the third recessed portion 131 further has an opening located on the first side surface 16, and the fourth recessed portion 132 further has an opening located on the second side surface 17.

[0063] The protruding structures include a first protruding portion 21, a second protruding portion 22, a third protruding portion 31, and a fourth protruding portion 32. The first protruding portion 21 is disposed on the first side edge member 2 and is embedded in the first recessed portion 121, the second protruding portion 22 is disposed on the first side edge member 2 and is located in the third recessed portion 131, the third protruding portion 31 is disposed on the second side edge member 3 and is embedded in the second recessed portion 122, and the fourth protruding portion 32 is disposed on the second side edge member 3 and is embedded in the fourth recessed portion 132.

[0064] The first recessed portion 121, the second recessed portion 122, the third recessed portion 131, and the fourth recessed portion 132 are rectangular parallelepiped structures with the same size; the first protruding portion 21 is adapted to the first recessed portion 121 in terms of quantity, shape, and size, the second protruding portion 22 is adapted to the third recessed portion 131 in terms of quantity, shape, and size, the third protruding portion 31 is adapted to the second recessed portion 122 in terms of quantity, shape, and size, and the fourth protruding portion 32 is adapted to the fourth recessed portion 132 in terms of quantity, shape, and size.

[0065] The size of the first cover sheet 12 in the thickness direction of the ceramic chip 1 is 200 μm, and the size of the second cover sheet 13 in the thickness direction of the ceramic chip 1 is 200 μm.

[0066] The thickness of the first side edge member 2 is 200 μm, and the thickness of the second side edge member 3 is 200 μm.

[0067] The ratio of the sum of the areas of the first region 141 and the second region 142 to the total area of the first major surface 14 is 0.3:1; the ratio of the sum of the areas of the third region and the fourth region to the total area of the second major surface 15 is 0.3:1.

[0068] The preparation method of the multilayer ceramic capacitor is as follows:

[0069] S1. Form a ceramic green sheet by the tape casting method with the ceramic slurry, and print a conductive pattern on the ceramic green sheet;

[0070] S2. Stack and press the ceramic green sheets with conductive patterns to form a laminated ceramic green sheet; form a cover sheet green sheet by the tape casting method with the ceramic slurry, and form a recess by punching; stack and press a cover sheet green sheet on each of the upper and lower surfaces of the laminated ceramic green sheet to obtain a green body; during the stacking and pressing process, the pore structure of the adsorption plate used is staggered from the recess to avoid air leakage;

[0071] S3. Divide the green body into several green body units; immerse one side of the green body unit into the ceramic slurry, take it out and dry it, then immerse the other side of the green body unit into the ceramic slurry, take it out and dry it, and then sinter it to obtain a ceramic chip 1;

[0072] S4. Form a first external electrode 4 on the first end surface 18 of the ceramic chip 1, and form a second external electrode 5 on the second end surface 19 of the ceramic chip 1 to obtain a multilayer ceramic capacitor;

[0073] The ceramic slurry in the above steps S1, S2, and S3 is all composed of barium titanate powder, polyvinyl butyral (PVB), and isopropyl alcohol mixed in a mass ratio of barium titanate:PVB:isopropyl alcohol = 3:5:1.5.

[0074] Example 2

[0075] The difference between this example and Example 1 is that, referring to Figure 7 , in this example, the first recess 121 has an opening located in the first region 141 and does not have an opening located in the first side surface 16, the second recess 122 has an opening located in the second region 142 and does not have an opening located in the second side surface 17, the third recess has an opening located in the third region and does not have an opening located in the first side surface 16, and the fourth recess 132 has an opening located in the fourth region and does not have an opening located in the second side surface 17.

[0076] Example 3

[0077] The difference between this example and Example 1 is that, referring to Figure 8, in this embodiment, the first recess 121, the second recess 122, the third recess 131, and the fourth recess 132 are isosceles trapezoid structures with the same size. The size of the first recess 121 in the length direction of the ceramic chip 1 gradually increases from one end close to the first side surface 16 to the end far from the first side surface 16; the size of the second recess 122 in the length direction of the ceramic chip 1 gradually increases from one end close to the second side surface 17 to the end far from the second side surface 17; the size of the third recess 131 in the length direction of the ceramic chip 1 gradually increases from one end close to the first side surface 16 to the end far from the first side surface 16; the size of the fourth recess 132 in the length direction of the ceramic chip 1 gradually increases from one end close to the second side surface 17 to the end far from the second side surface 17; the first protrusion 21 is adapted to the first recess 121 in terms of quantity, shape, and size, the second protrusion 22 is adapted to the third recess 131 in terms of quantity, shape, and size, the third protrusion 31 is adapted to the second recess 122 in terms of quantity, shape, and size, and the fourth protrusion 32 is adapted to the fourth recess 132 in terms of quantity, shape, and size.

[0078] Embodiment 4

[0079] The difference between this embodiment and Embodiment 1 is that, please refer to Figure 9 , in this embodiment, the first recess 121, the second recess 122, the third recess 131, and the fourth recess 132 are parallelepiped structures with the same size. The quantity of the first recess 121, the quantity of the second recess 122, the quantity of the third recess 131, and the quantity of the fourth recess 132 are all two. The two first recesses 121 are symmetrical, the two second recesses 122 are symmetrical, the two third recesses 131 are symmetrical, and the two fourth recesses 132 are symmetrical. The first recess 121 is inclined relative to the width direction of the ceramic chip, the second recess 122 is inclined relative to the width direction of the ceramic chip, the third recess 131 is inclined relative to the width direction of the ceramic chip, and the fourth recess 132 is inclined relative to the width direction of the ceramic chip; the first protrusion 21 is adapted to the first recess 121 in terms of quantity, shape, and size, the second protrusion 22 is adapted to the third recess 131 in terms of quantity, shape, and size, the third protrusion 31 is adapted to the second recess 122 in terms of quantity, shape, and size, and the fourth protrusion 32 is adapted to the fourth recess 132 in terms of quantity, shape, and size.

[0080] Comparative Example 1

[0081] The difference between this comparative example and Example 1 is that this comparative example does not provide the first protrusion, the second protrusion, the third protrusion, the fourth protrusion, the first recess, the second recess, the third recess, and the fourth recess, and no drilling operation is performed during the process of manufacturing the multilayer ceramic capacitor.

[0082] One batch of 1000 multilayer ceramic capacitor samples was fabricated for each example and comparative example, and then the following tests were conducted:

[0083] (1) Use an optical microscope to observe whether there are any defects (such as peeling, cracking, etc.) on the cover glass of the product. If there are defects, the sample is determined to have a defective cover glass appearance. Count the number of defective samples, and calculate the defective rate of the cover glass appearance according to the following formula: Defective rate of cover glass appearance (%) = Number of defective samples / 1000 * 100%;

[0084] (2) Test the electrical properties of the samples after 24 hours at a temperature of 85°C, a relative humidity of 85%, and a voltage of 12.6V. Count the number of failed samples, and calculate the moisture resistance failure rate according to the following formula: Moisture resistance failure rate (%) = Number of failed samples / 1000 * 100%;

[0085] (3) Grind the side surface of the sample to expose its internal cross-section. Observe the cross-section of the sample through a microscope, count the number of samples with interlayer peeling, and calculate the interlayer cracking failure rate according to the following formula: Interlayer cracking failure rate (%) = Number of samples with interlayer peeling / 1000 * 100%;

[0086] The results are shown in Table 1 below.

[0087] Test items Defect rate of cover glass appearance / % Defect rate of moisture resistance / % Defect rate of interlayer cracking / % Example 1 0.3 0.5 0.2 Example 2 0.5 0.6 0.1 Example 3 0.2 0.2 0.2 Example 4 0.2 0.4 0.3 Comparative example 1 1.7 2.2 1.0

[0088] As can be seen from Table 1, compared with Comparative Example 1, the structural design of the multilayer ceramic capacitor provided by the present invention is reasonable. By designing the cooperative structure of the protrusions and recesses, the bonding between each side edge member and the ceramic chip 1 is made more firm, which can effectively prevent the separation between each side edge member and the ceramic chip 1, and further ensure that the multilayer ceramic capacitor has good electrical properties and moisture resistance. It can exert a binding force on each layer of the ceramic chip 1 in the thickness direction, and can effectively prevent the occurrence of interlayer cracking and peeling phenomena in each layer of the laminate 11.

[0089] In the description of the present utility model, it should be noted that the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of such features. All directional indicators (such as up and down) in the present utility model are only used to explain the relative positional relationship and movement conditions between components in a specific posture (as shown in the drawings). If the specific posture changes, then the directional indicator also changes accordingly.

[0090] In the description of the present utility model, it should also be noted that the terms "comprise" and "have" and any variations thereof are intended to cover non-exclusive inclusion.

[0091] For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0092] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present utility model and not to limit the protection scope of the present utility model. Although the present utility model has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present utility model can be modified or equivalently replaced without departing from the essence and scope of the technical solutions of the present utility model.

Claims

1. A multilayer ceramic capacitor, characterized in that, It includes a ceramic chip, a first side edge member, a second side edge member, a first external electrode and a second external electrode. The ceramic chip includes a laminate, a first cover sheet and a second cover sheet. The first cover sheet, the laminate and the second cover sheet are sequentially arranged in the thickness direction of the ceramic chip. The laminate includes a dielectric material layer, a first internal electrode and a second internal electrode which are alternately laminated in the thickness direction of the ceramic chip; The ceramic chip has a first main surface, a second main surface, a first side surface, a second side surface, a first end surface and a second end surface. The first main surface and the second main surface are opposite to each other in the thickness direction of the ceramic chip. The first side surface and the second side surface are opposite to each other in the width direction of the ceramic chip. The first end surface and the second end surface are opposite to each other in the length direction of the ceramic chip; The first main surface has a first region and a second region. The second main surface has a third region and a fourth region. The first region and the third region are respectively adjacent to the first side surface. The second region and the fourth region are respectively adjacent to the second side surface. The first side edge member covers the first region, the first side surface and the third region. The second side edge member covers the second region, the second side surface and the fourth region; The first cover sheet and / or the second cover sheet is provided with a concave structure. The first side edge member and / or the second side edge member is provided with a convex structure corresponding to the concave structure. The convex structure is embedded in the corresponding concave structure; The first external electrode is disposed on the first end surface of the ceramic chip, and the first external electrode is connected to the first internal electrode. The second external electrode is disposed on the second end surface of the ceramic chip, and the second external electrode is connected to the second internal electrode.

2. The multilayer ceramic capacitor according to claim 1, wherein, The concave structure is disposed in at least one of the first region, the second region, the third region and the fourth region.

3. The multilayer ceramic capacitor according to claim 1, wherein The concave structure includes a first concave portion, a second concave portion, a third concave portion and a fourth concave portion. The first concave portion has an opening located in the first region. The second concave portion has an opening located in the second region. The third concave portion has an opening located in the third region. The fourth concave portion has an opening located in the fourth region.

4. The multilayer ceramic capacitor according to claim 3, characterized in that, The first concave portion further has an opening located on the first side surface. The second concave portion further has an opening located on the second side surface. The third concave portion further has an opening located on the first side surface. The fourth concave portion further has an opening located on the second side surface.

5. The multilayer ceramic capacitor according to claim 3, characterized in that, The dimension of the first recessed portion in the length direction of the ceramic chip gradually increases from one end close to the first side surface to the other end away from the first side surface; the dimension of the second recessed portion in the length direction of the ceramic chip gradually increases from one end close to the second side surface to the other end away from the second side surface; the dimension of the third recessed portion in the length direction of the ceramic chip gradually increases from one end close to the first side surface to the other end away from the first side surface; the dimension of the fourth recessed portion in the length direction of the ceramic chip gradually increases from one end close to the second side surface to the other end away from the second side surface.

6. The multilayer ceramic capacitor according to claim 3, wherein, The first recessed portion is inclined relative to the width direction of the ceramic chip, the second recessed portion is inclined relative to the width direction of the ceramic chip, the third recessed portion is inclined relative to the width direction of the ceramic chip, and the fourth recessed portion is inclined relative to the width direction of the ceramic chip.

7. The multilayer ceramic capacitor according to claim 3, wherein, The ratio between the sum of the opening areas of the first recessed portion in the first region and the second recessed portion in the second region and the total area of the first main surface is (0.02 - 0.2):1; the ratio between the sum of the opening areas of the third recessed portion in the third region and the fourth recessed portion in the fourth region and the total area of the second main surface is (0.02 - 0.2):

1.

8. The multilayer ceramic capacitor according to claim 3, wherein, The protruding structure includes a first protruding portion, a second protruding portion, a third protruding portion, and a fourth protruding portion. The first protruding portion is disposed on the first side edge member and is embedded in the first recessed portion. The second protruding portion is disposed on the first side edge member and is located in the third recessed portion. The third protruding portion is disposed on the second side edge member and is embedded in the second recessed portion. The fourth protruding portion is disposed on the second side edge member and is embedded in the fourth recessed portion.

9. The multilayer ceramic capacitor according to claim 1, characterized in that, The dimension of the first cover sheet in the thickness direction of the ceramic chip is 100 - 300 μm, and the dimension of the second cover sheet in the thickness direction of the ceramic chip is 100 - 300 μm.

10. The multilayer ceramic capacitor according to claim 1, characterized in that, The ratio between the sum of the areas of the first region and the second region and the total area of the first main surface is (0.1 - 0.4):1; the ratio between the sum of the areas of the third region and the fourth region and the total area of the second main surface is (0.1 - 0.4):1.

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