Packaging structure of silicon carbide power device
Through the three-layer structure DBC substrate design and half-bridge circuit structure, the problem of stray inductance in silicon carbide power device packaging is solved, the high-frequency performance and reliability of the device are improved, and the manufacturing process is simplified.
Patent Information
- Application Number
- CN202422323893.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-24
- Publication Date
- 2025-08-01
- Estimated Expiration
- 2034-09-24
AI Technical Summary
In the existing silicon carbide power device packaging structure, the substrate, chip and pin interconnection may introduce larger stray inductors, affecting the high-frequency performance of the device.
The DBC substrate design adopts a three-layer structure, with the upper and lower layers being high-conducting materials, and the intermediate layers being insulating heat transfer materials. The converter circuit path of the silicon carbide power device is significantly shortened. By optimizing the layout and material selection, the loop parasitic inductance is reduced, and the half-bridge circuit structure and Kelvin connection method are adopted to reduce the parasitic inductance.
It significantly improves the performance and reliability of silicon carbide power devices, simplifies the manufacturing process, reduces energy loss and overvoltage oscillation problems, and improves switching speed.
Smart Images
Figure CN223181136U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of device packaging, and particularly relates to a packaging structure of a silicon carbide power device. Background Art
[0002] As a wide bandgap semiconductor material, silicon carbide (SiC) has significant advantages in the field of electronic devices. It not only has a high breakdown electric field strength and excellent thermal stability, but also has a high carrier saturation drift velocity and thermal conductivity. These characteristics make silicon carbide an ideal material for manufacturing high-temperature, high-frequency, and high-efficiency high-power devices, especially suitable for extreme environments that are difficult to handle by traditional silicon devices.
[0003] Theoretically, the switching frequency of silicon carbide devices can reach up to several megahertz, demonstrating its potential in high-frequency applications. However, existing commercial devices are limited by the packaging structure in high-frequency applications. During the packaging process, the substrate, chip, and pin interconnection may introduce a large amount of stray inductance, which affects the high-frequency performance of the device. Summary of the Utility Model
[0004] (1) Technical Problems to be Solved
[0005] Aiming at the deficiencies of the prior art, the purpose of the utility model is to provide a packaging structure of a silicon carbide power device. The packaging structure and method of the silicon carbide power device aim to solve the technical problem that during the packaging process in the prior art, the substrate, chip, and pin interconnection may introduce a large amount of stray inductance, which affects the high-frequency performance of the device.
[0006] (2) Technical Solutions
[0007] To solve the above technical problems, the utility model provides a packaging structure of a silicon carbide power device. The packaging structure and method of the silicon carbide power device include a PCB board main body and a housing fixed on the top end of the PCB board main body. A DBC substrate is arranged at the bottom end of the PCB board main body, and a first bottom-layer solder pad of the PCB board is embedded and fixed at the central position of the PCB board main body. One end of the first bottom-layer solder pad of the PCB board is symmetrically provided with PCB board vias, and the other end of the first bottom-layer solder pad of the PCB board is respectively provided with a first window and a second window of the PCB board. A top-layer copper foil of the PCB board is arranged above the first bottom-layer solder pad of the PCB board.
[0008] When using the packaging structure and method of the silicon carbide power device of this technical solution, the DBC substrate adopts a three-layer structure design, with the upper and lower layers being high-conductivity materials and the middle layer being an insulating heat-transfer material to achieve electrical isolation and thermal management. The upper surface of the upper layer is further divided into a first welding surface and a second welding surface that are insulated from each other. The distance between the two not only meets the requirements of electrical insulation but also is greater than the electrical insulation distance corresponding to the maximum operating voltage of the silicon carbide power device, thus ensuring the safety of the device under high-voltage operating conditions. Through this design, the commutation loop path of the silicon carbide power device is significantly shortened, effectively reducing the parasitic inductance of the loop, which is of great significance for improving the switching speed of the power device and reducing energy loss. Overall, the packaging structure and method significantly improve the performance and reliability of the silicon carbide power device while simplifying the manufacturing process through optimized layout and material selection.
[0009] In the packaging structure design, two types of silicon carbide MOSFETs and silicon carbide SBD chips are involved. The first silicon carbide MOSFET and the corresponding SBD chip are respectively installed on different welding surfaces. The drain of the first silicon carbide MOSFET and the cathode of the SBD chip are welded to the first pad on the bottom layer of the PCB board, while the source of the MOSFET is connected to the pad on the top layer of the PCB board through a bonding wire. The anode of the SBD chip is also connected to another pad on the top layer through a bonding wire, and the pad on the top layer is connected to the pad on the bottom layer through a via hole. This packaging structure design enables two silicon carbide MOSFETs to be connected in series, and each is anti-parallelly connected with a silicon carbide SBD chip, forming a half-bridge circuit structure. The first pad on the bottom layer of the PCB board serves as the positive electrode of the packaging structure, while the copper foil on the top layer serves as the negative electrode. This layout makes the conductors on the commutation path in a parallel structure, which helps to reduce the parasitic inductance by using mutual inductance cancellation during commutation, thus effectively reducing the overvoltage and oscillation problems that may occur during the switching process of the power device.
[0010] Preferably, the DBC substrate includes a DBC substrate ceramic layer and a DBC substrate bottom heat dissipation surface. On both sides of the top surface of the DBC substrate ceramic layer, a DBC substrate upper layer first welding surface and a DBC substrate upper layer second welding surface are respectively provided.
[0011] Furthermore, a first silicon carbide SBD chip is embedded in the first window of the PCB board, a first silicon carbide MOSFET is embedded in the second window of the PCB board, and a PCB board top layer first pad and a PCB board top layer second pad are respectively embedded in the two PCB board via holes.
[0012] Even further, the top of the DBC substrate upper layer first welding surface is respectively connected to the first silicon carbide MOSFET, the first silicon carbide SBD chip, the PCB board top layer first pad, and the PCB board top layer second pad.
[0013] Further, a second bonding wire connected to the first silicon carbide SBD chip is provided at the top end of the second pad on the top layer of the PCB board, and first bonding wires respectively connected to both ends of the first silicon carbide MOS transistor are mounted on both sides of the top surface of the first pad on the top layer of the PCB board.
[0014] Further, a third pad on the top layer of the PCB board and a fourth pad on the top layer of the PCB board are respectively provided at the top end of the PCB board main body. Third bonding wire and a fourth bonding wire are respectively fixed to both ends of the first silicon carbide MOS transistor, and the third bonding wire and the fourth bonding wire are respectively fixed to the third pad on the top layer of the PCB board and the fourth pad on the top layer of the PCB board.
[0015] Further, a round hole is formed at the top end of the outer shell, and a silicone gel for encapsulating components is embedded in the outer shell.
[0016] (3) Beneficial effects
[0017] Compared with the prior art, the beneficial effects of the present utility model are as follows:
[0018] In the present utility model, the DBC substrate adopts a three-layer structure design, with the upper layer and the lower layer being high-conductivity materials and the middle layer being an insulating and heat-conducting material to achieve electrical isolation and thermal management. The upper surface is further divided into a first welding surface and a second welding surface that are insulated from each other. The distance between the two not only meets the requirements of electrical insulation but also is greater than the electrical insulation distance corresponding to the maximum operating voltage of the silicon carbide power device, thereby ensuring the safety of the device under high-voltage operating conditions. Through this design, the commutation loop path of the silicon carbide power device is significantly shortened, effectively reducing the parasitic inductance of the loop, which is of great significance for improving the switching speed of the power device and reducing energy loss. Overall, the packaging structure and method significantly improve the performance and reliability of the silicon carbide power device through optimized layout and material selection, while simplifying the manufacturing process.
[0019] In the packaging structure design, two types of silicon carbide MOSFETs and silicon carbide SBD chips are involved. The first silicon carbide MOSFET and the corresponding SBD chip are respectively mounted on different welding surfaces. The drain of the first silicon carbide MOSFET and the cathode of the SBD chip are welded to the first pad on the bottom layer of the PCB board, while the source of the MOSFET is connected to the pad on the top layer of the PCB board through a bonding wire. The anode of the SBD chip is also connected to another pad on the top layer through a bonding wire, and the pad on the top layer is connected to the pad on the bottom layer through a via hole. This packaging structure design enables two silicon carbide MOSFETs to be connected in series, and each is anti-parallel connected with a silicon carbide SBD chip, forming a half-bridge circuit structure. The first pad on the bottom layer of the PCB board serves as the positive electrode of the packaging structure, while the copper foil on the top layer serves as the negative electrode. This layout makes the conductors on the commutation path in a parallel structure, which helps to reduce the parasitic inductance by using mutual inductance cancellation during commutation, thereby effectively reducing the overvoltage and oscillation problems that may occur during the switching process of power devices. Brief Description of the Drawings
[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those skilled in the art, without creative efforts, other drawings can be obtained based on these drawings.
[0021] Figure 1 is a schematic cross-sectional view of the packaging structure of silicon carbide power devices;
[0022] Figure 2 is a schematic structural view of the DBC substrate;
[0023] Figure 3 is a schematic back structure view of the PCB board;
[0024] Figure 4 is a schematic cross-sectional view of the packaging structure after hiding the housing;
[0025] Figure 5 is a schematic plan view of the packaging structure;
[0026] Figure 6 is an example diagram of the connection method between the packaging structure and the external circuit.
[0027] The reference numerals in the drawings are as follows: 1. DBC substrate; 2. First silicon carbide MOS transistor; 3. Main body of the PCB board; 4. Outer shell; 5. Round hole; 6. Silicone gel; 7. Ceramic layer of the DBC substrate; 8. Bottom heat dissipation surface of the DBC substrate; 9. First welding surface on the upper layer of the DBC substrate; 10. Second welding surface on the upper layer of the DBC substrate; 11. First pad on the bottom layer of the PCB board; 12. Via hole of the PCB board; 13. First window of the PCB board; 14. Second window of the PCB board; 15. First silicon carbide SBD chip; 16. First bonding wire; 17. Second bonding wire; 18. First pad on the top layer of the PCB board; 19. Second pad on the top layer of the PCB board; 20. Copper foil on the top layer of the PCB board; 21. Third pad on the top layer of the PCB board; 22. Fourth pad on the top layer of the PCB board; 23. Third bonding wire; 24. Fourth bonding wire. Detailed implementation manner
[0028] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.
[0029] This detailed implementation manner is a packaging structure of a silicon carbide power device, and its structural schematic diagram is as shown in Figure 1 and Figure 2 shown. The packaging structure and packaging method of the silicon carbide power device include the main body 3 of the PCB board and the outer shell 4 fixed at the top end of the main body 3 of the PCB board. The bottom end of the main body 3 of the PCB board is provided with the DBC substrate 1, and the first pad 11 on the bottom layer of the PCB board is embedded and fixed at the central position of the main body 3 of the PCB board. One end of the first pad 11 on the bottom layer of the PCB board is symmetrically provided with a via hole of the PCB board, and the other ends of the first pad 11 on the bottom layer of the PCB board are respectively provided with the first window 13 and the second window 14 of the PCB board. Among them, a copper foil 20 on the top layer of the PCB board is arranged above the first pad 11 on the bottom layer of the PCB board. The DBC substrate 1 includes a ceramic layer 7 of the DBC substrate and a bottom heat dissipation surface 8 of the DBC substrate. The first welding surface 9 on the upper layer and the second welding surface 10 on the upper layer of the DBC substrate are respectively arranged on both sides of the top surface of the ceramic layer 7 of the DBC substrate. The outer shell 4 is fixed on the main body 3 of the PCB board, and its height is designed to be higher than the lead to cover and protect the circuit structures of the DBC substrate 1, the main body 3 of the PCB board and the silicon carbide power device. At the same time, an insulating protective glue is poured into the gap between the outer shell 4 and these components, enhancing the insulation and structural stability of the package.
[0030] The innovation of the packaging structure lies in the three-layer structure design of its DBC substrate 1. The upper and lower layers are made of high-conductivity materials, and the middle layer is an insulating heat-transfer material to achieve electrical isolation and thermal management. The upper surface is further divided into a first welding surface and a second welding surface that are insulated from each other. The distance between them not only meets the requirements of electrical insulation but also is greater than the electrical insulation distance corresponding to the maximum operating voltage of the silicon carbide power device, thus ensuring the safety of the device under high-voltage operating conditions.
[0031] Through this design, the commutation loop path of the silicon carbide power device is significantly shortened, effectively reducing the parasitic inductance of the loop, which is of great significance for improving the switching speed of the power device and reducing energy loss. Overall, the packaging structure and method significantly improve the performance and reliability of the silicon carbide power device through optimized layout and material selection, while simplifying the manufacturing process.
[0032] As Figure 3 and Figure 4 shown, a first silicon carbide SBD chip 15 is embedded in the first window 13 of the PCB board, a first silicon carbide MOS transistor 2 is embedded in the second window 14 of the PCB board, a first top-layer pad 18 of the PCB board and a second top-layer pad 19 of the PCB board are respectively embedded in two PCB board vias 12, and the top ends of the first welding surface on the upper layer of the DBC substrate 1 are respectively connected to the first silicon carbide MOS transistor 2, the first silicon carbide SBD chip C15, the first top-layer pad 18 of the PCB board and the second top-layer pad 19 of the PCB board.
[0033] In the packaging structure design, two types of silicon carbide MOS transistors and silicon carbide SBD chips are involved. The first are respectively installed on different welding surfaces with the corresponding SBD chips. The drain of the first silicon carbide MOS transistor 2 and the cathode of the SBD chip are welded to the first pads on the bottom layer of the PCB board body 3, while the source of the MOS transistor is connected to the pad on the top layer of the PCB board body C3 through a bonding wire. The anode of the SBD chip is also connected to another pad on the top layer through a bonding wire, and the pad on the top layer is connected to the pad on the bottom layer through a via.
[0034] This packaging structure design enables two silicon carbide MOS transistors to be connected in series and each to be anti-parallel connected with a silicon carbide SBD chip, forming a half-bridge circuit structure. The first pad on the bottom layer of the PCB board body 3 serves as the positive electrode of the packaging structure, while the copper foil on the top layer serves as the negative electrode. This layout makes the conductors on the commutation path in a parallel structure, which helps to reduce the parasitic inductance by using mutual inductance cancellation during commutation, thus effectively reducing the overvoltage and oscillation problems that may occur during the switching process of the power device.
[0035] The above-mentioned packaging structure of the silicon carbide power device has multiple optimized features to improve device performance and simplify external connections.
[0036] As Figure 5 and Figure 6 shown, at the top of the second pad 19 on the top layer of the PCB board, a second bonding wire 17 connected to the first silicon carbide SBD chip 15 is provided. On both sides of the top surface of the first pad 18 on the top layer of the PCB board, first bonding wires 16 respectively connected to both ends of the first silicon carbide MOS transistor 2 are installed. On the top of the PCB board main body 3, a third pad 21 and a fourth pad 22 on the top layer of the PCB board are respectively provided. At both ends of the first silicon carbide MOS transistor 2, a third bonding wire 23 and a fourth bonding wire 24 are respectively fixed. The third bonding wire 23 and the fourth bonding wire 24 are respectively fixed to the third pad 21 on the top layer of the PCB board and the fourth pad 22 on the top layer of the PCB board. A round hole 5 is opened at the top of the housing 4, and a silicone gel 6 for encapsulating components is embedded in the housing 4. The top copper foil and the bottom pads of the PCB board main body 3 are designed as power terminals of the encapsulation structure, and the specific pads on the top layer are used as drive signal terminals. Such a design allows the power terminals and the drive signal terminals to be directly connected to the external main circuit or drive circuit without additional power terminals, thereby reducing the contact resistance and parasitic inductance, and at the same time reducing the cost.
[0037] Furthermore, in the encapsulation structure, the bonding wires connecting the drive signal terminals and the silicon carbide MOS transistor electrodes adopt the Kelvin connection method. At the same time, the drive signal lines and the power lines are perpendicular to each other to reduce the coupling between the drive loop and the power loop, reduce the interference of the power loop on the drive loop, and enhance the drive stability.
[0038] The encapsulation structure further includes a window on the PCB board main body 3 that matches the size of the silicon carbide power device, allowing the device to be placed on the DBC substrate 1 through the window. The DBC substrate 1 is a ceramic substrate with double-sided copper cladding. The upper layer and the lower layer use high-conductivity oxygen-free copper, and the middle layer uses one of the materials such as aluminum nitride, aluminum oxide, silicon cyanide, or chain oxide to transfer heat and achieve electrical insulation between the components and the heat sink.
[0039] On the upper surface of the housing 4 of the encapsulation structure, holes are provided for injecting insulating gel, and the hole diameter is 2 mm - 4 mm. The upper copper foil of the DBC substrate 1 is etched into two rectangular welding surfaces, and the insulation distance between these two welding surfaces is 1 mm to further optimize the performance of the encapsulation structure. Through these optimization measures, the encapsulation structure of the silicon carbide power device not only improves the electrical performance but also simplifies the manufacturing and assembly process.
[0040] During the encapsulation process, high-temperature solder is applied to the welding surface of the DBC substrate 1 by screen printing. Then, the PCB board body 3 is installed according to the position of the welding surface, and the silicon carbide power device is placed on the DBC substrate 1 through the window on the PCB board body 3. Finally, the welding is completed by using the method of vacuum reflow soldering. The high-temperature solder used is a mixed material of tin, silver, and copper, with a melting temperature exceeding 200 degrees Celsius, which not only improves the operating temperature and stability of the encapsulation structure but also facilitates the selection of solder during application.
[0041] The area of the power loop is effectively reduced through the half-bridge circuit configuration, thereby reducing the parasitic inductance. The conductors on the commutation path are arranged in parallel, and the parasitic inductance of the commutation loop of the switching tube is reduced by using the mutual inductance cancellation, effectively reducing the overvoltage and oscillation during the switching process of the power device. In addition, the Kelvin connection method and the design of the driving signal line and power line with a vertical structure reduce the coupling between the driving loop and the power loop, reduce interference, and enhance the driving stability. Generally speaking, the silicon carbide power device encapsulation structure and method have significant advantages in improving performance, reducing costs, and simplifying the manufacturing process.
[0042] All the technical features in this embodiment can be freely combined according to actual needs.
[0043] Finally, it should be noted that the above are only the preferred embodiments of the present invention and are not used to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or perform equivalent replacements for some of the technical features. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.
Claims
1. A packaging structure of a silicon carbide power device, the packaging structure and packaging method of the silicon carbide power device include a PCB board main body (3) and a housing (4) fixed to the top of the PCB board main body (3), characterized in that, A DBC substrate (1) is provided at the bottom end of the PCB board body (3), and a first solder pad on the bottom layer of the PCB board (11) is embedded and fixed at the central position of the PCB board body (3). One end of the first solder pad on the bottom layer of the PCB board (11) is symmetrically provided with PCB board vias (12), and the other end of the first solder pad on the bottom layer of the PCB board (11) is respectively provided with a first window of the PCB board (13) and a second window of the PCB board (14). A copper foil on the top layer of the PCB board (20) is provided above the first solder pad on the bottom layer of the PCB board (11).
2. The packaging structure of a silicon carbide power device according to claim 1, characterized in that, The DBC substrate (1) includes a DBC substrate ceramic layer (7) and a bottom heat dissipation surface of the DBC substrate (8). On both sides of the top end surface of the DBC substrate ceramic layer (7), a first welding surface on the upper layer of the DBC substrate (9) and a second welding surface on the upper layer of the DBC substrate (10) are respectively provided.
3. The packaging structure of a silicon carbide power device according to claim 2, characterized in that, A first silicon carbide SBD chip (15) is embedded in the first window of the PCB board (13), a first silicon carbide MOS transistor (2) is embedded in the second window of the PCB board (14), and a first solder pad on the top layer of the PCB board (18) and a second solder pad on the top layer of the PCB board (19) are respectively embedded in the two PCB board vias (12).
4. The packaging structure of a silicon carbide power device according to claim 3, characterized in that, The top ends of the first welding surface on the upper layer of the DBC substrate (1) are respectively connected to the first silicon carbide MOS transistor (2), the first silicon carbide SBD chip (15), the first solder pad on the top layer of the PCB board (18), and the second solder pad on the top layer of the PCB board (19).
5. The packaging structure of a silicon carbide power device according to claim 4, characterized in that A second bonding wire (17) connected to the first silicon carbide SBD chip (15) is provided at the top end of the second solder pad on the top layer of the PCB board (19), and first bonding wires (16) respectively connected to both ends of the first silicon carbide MOS transistor (2) are installed on both sides of the top end surface of the first solder pad on the top layer of the PCB board (18).
6. The packaging structure of a silicon carbide power device according to claim 5, characterized in that, A third solder pad on the top layer of the PCB board (21) and a fourth solder pad on the top layer of the PCB board (22) are respectively provided at the top end of the PCB board body (3). A third bonding wire (23) and a fourth bonding wire (24) are respectively fixed at both ends of the first silicon carbide MOS transistor (2), and the third bonding wire (23) and the fourth bonding wire (24) are respectively fixed to the third solder pad on the top layer of the PCB board (21) and the fourth solder pad on the top layer of the PCB board (22).
7. The packaging structure of a silicon carbide power device according to claim 1, characterized in that A round hole (5) is provided at the top end of the housing (4), and a silicone gel (6) for encapsulating components is embedded in the housing (4).