Internal and external matching circuit of GaN power amplifier

Abstract

The utility model discloses an internal and external matching circuit of a GaN power amplification device, which comprises a packaging flange, a GaN tube core, an input pin and an output pin, the GaN tube core on the packaging flange is connected with a first matching capacitor through a first bonding wire, the first matching capacitor is connected with a second matching capacitor through a second bonding wire, and the input pin is connected with the output pin. The second matching capacitor is connected with the input pin through a third bonding wire to form a second-order low-pass matching network, the GaN tube core is connected with the output pin through a fourth bonding wire, the output pin is connected with the first matching section, the first matching section is connected with the blocking capacitor, the other end of the blocking capacitor is connected with the second matching section, and the second matching section is connected with the third matching section to form an external matching circuit. And the first matching section and the second matching section are used for increasing the output impedance to 50 ohms through impedance change. A second-order low-pass inner matching network and an output outer matching network are connected with two sections of # imgabs0 # open-circuit microstrip lines, so that secondary harmonic impedance short circuit can be realized, the power and efficiency of the amplifier are effectively improved, and the output matching section combination is used for broadening the bandwidth of the power amplifier.

Description

Technical Field

[0001] The utility model belongs to the technical field of power amplifiers, and in particular relates to an internal and external matching circuit of a GaN power amplifier device. Background Art

[0002] Currently, RF energy, RF power supplies, jammers, and counter-drone systems are all hot topics. These products not only have very high output power (from hundreds of watts to thousands of watts for continuous wave), but especially in 2.4-2.5G RF Energy applications where the output power exceeds 750W, such high output power requires very high efficiency to reduce heat dissipation. However, due to the high power and low output impedance, and the inability to internally match the output end of the device, high heat dissipation can easily burn the internal bonding wires. The internal output of the device can only be unmatched, which easily leads to power efficiency divergence within a certain bandwidth. In other words, it is difficult to achieve high power and high efficiency simultaneously within a certain bandwidth. Based on this technical problem, major power amplifier tube manufacturers have successively launched their own broadband power amplifier tubes. For example, power amplifier tubes integrated with GaN materials have the advantages of broadband, high voltage, high power, and high efficiency. However, improper second harmonic processing can seriously affect the efficiency and power of the power amplifier.

[0003] The present utility model comes therefore. Utility Model Content

[0004] In response to the above-mentioned technical problems, the purpose of the present utility model is to provide an internal and external matching circuit for a GaN power amplifier device, which can eliminate the influence of the second harmonic impedance on the performance of GaN and ensure that the GaN device can achieve high power and high efficiency within the 2.4G-2.5G broadband.

[0005] In order to solve these problems in the prior art, the technical solution provided by the present invention is:

[0006] An internal and external matching circuit for a GaN power amplifier device includes a packaging flange, a GaN die disposed on the packaging flange, an input pin and an output pin disposed at both ends of the packaging flange, a first matching capacitor and a second matching capacitor disposed between the GaN die and the input pin on the packaging flange, the GaN die connected to the first matching capacitor via a first bonding wire, the first matching capacitor connected to the second matching capacitor via a second bonding wire, the second matching capacitor connected to the input pin via a third bonding wire, the first bonding wire, the second bonding wire, the third bonding wire, the first matching capacitor, and the second matching capacitor forming a second-order low-pass internal matching network, the GaN die connected to the output pin via a fourth bonding wire, the output pin connected to a first matching section, the first matching section connected to a DC blocking capacitor, the other end of the DC blocking capacitor connected to a second matching section, the second matching section connected to a third matching section, the connection point between the second and third matching sections serving as a radio frequency output terminal, the first matching section, the DC blocking capacitor, the second matching section, and the third matching section forming an external matching circuit, the first matching section and the second matching section being used to increase the output impedance to 50Ω through impedance variation.

[0007] In a preferred technical solution, the first matching section and the second matching section are microstrip lines or microstrip lines and capacitors.

[0008] In a preferred technical solution, the third matching section is a λ / 4 short-circuited microstrip line or an inductor-capacitor parallel resonant circuit, where λ is the wavelength.

[0009] In a preferred technical solution, the root of the external matching circuit is connected to two sections of λ / 8 open microstrip lines (L1 and L2), so that the second harmonic impedance is zero at the output end of the device.

[0010] Compared with the solutions in the prior art, the advantages of the present invention are:

[0011] A two-order low-pass internal matching circuit is implemented at the device's input to short-circuit the GaN device's second harmonic impedance and improve the fundamental impedance of the input device. Simultaneously, a λ / 8 open-circuited microstrip line is connected to the root of the device's output external matching circuit. Both of these methods can reduce the GaN device's second harmonic impedance to zero, significantly improving the amplifier's peak power and efficiency. Furthermore, a λ / 4 short-circuited microstrip line (which can also be equivalent to an inductor-capacitor parallel resonance) is connected after the device's output external matching section's DC capacitor, significantly increasing the amplifier's bandwidth and better addressing the efficiency and bandwidth of high-power amplifier outputs. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The present invention will be further described below with reference to the accompanying drawings and embodiments:

[0013] Figure 1 1. A block diagram showing the principle of an internal and external matching circuit of a GaN power amplifier device according to an embodiment of the present invention;

[0014] Figure 2 This is a principle block diagram of the internal and external matching circuits of a GaN power amplifier device according to another embodiment. DETAILED DESCRIPTION

[0015] The above scheme is further described below with reference to specific examples. It should be understood that these examples are intended to illustrate the present invention and are not intended to limit the scope of the present invention. The implementation conditions used in the examples can be further adjusted according to the conditions of the specific manufacturer. The implementation conditions not specified are generally those used in routine experiments.

[0016] Example:

[0017] like Figure 1 As shown, a GaN power amplifier device suitable for radio frequency energy includes a packaging flange F, a GaN die D1 is provided on the packaging flange F, an input pin Lin and an output pin Lout are provided at both ends of the packaging flange F, and the GaN power amplifier device includes an input internal matching circuit 10 and an output external matching circuit 20.

[0018] The input internal matching circuit 10 is located on the package flange F. A first matching capacitor C1 and a second matching capacitor C2 are provided between the GaN die D1 and the input pin Lin. The GaN die D1 is connected to the first matching capacitor C1 via a first bonding wire B1, which is then connected to the second matching capacitor C2 via a second bonding wire B2. The second matching capacitor C2 is then connected to the input pin Lin via a third bonding wire B3. The first bonding wire B1, the second bonding wire B2, the third bonding wire B3, the first matching capacitor C1, and the second matching capacitor C2 form a second-order low-pass matching network. The first bonding wire B1 and the first matching capacitor C1 are primarily used to suppress the second harmonic. Their values are adjusted to ensure that the second harmonic (2f0) impedance is zero. The selection of the resonant frequency is also very important. It is generally 200MHz higher than the operating frequency. This not only improves the input impedance of the device but also ensures the reliability of the tube. The inductance at the resonant frequency is mainly composed of the equivalent inductance of the bonding wire and the device package, while the capacitance is mainly composed of C1, C2, and the equivalent capacitance of the device package.

[0019] The second-order low-pass matching network is used to short-circuit the second harmonic impedance and make the resonance point of the input end 200MHz higher than the operating frequency, which helps to debug the input end standing wave and achieve high gain.

[0020] After many design experiences, the value of the internal matching capacitor C (pF) is generally taken as: is the operating center frequency (MHz). The inductor value can be obtained through ADS simulation. The second-order low-pass internal matching is used to achieve zero second harmonic impedance, maximizing the efficiency of the GaN power amplifier tube.

[0021] C1 and C2 can be MOSCap capacitors or ceramic capacitors, and the bonding wires B1, B2, and B3 can be gold or aluminum wires. The arc height of each set of bonding wires depends on the frequency of the input resonance point and the value of the second harmonic impedance.

[0022] Two or more dies can be placed in the GaN die D1 package and welded to the package flange using silver glue or solder.

[0023] The output external matching circuit 20 includes a GaN die D1 connected to the output pin Lout through a fourth bonding wire B4, the output pin Lout is connected to the first matching node T1, the first matching node T1 is connected to the DC blocking capacitor C3, the other end of the DC blocking capacitor C3 is connected to the second matching node T2, the second matching node T2 is connected to the third matching node T3, and the connection point between the second matching node T2 and the third matching node T3 serves as the RF output terminal RFout. The first matching node T1 and the second matching node T2 are used to increase the output impedance to 50Ω through impedance change.

[0024] The DC blocking capacitor C3 is implemented by an ATC capacitor and is used to block the DC voltage and pass the AC signal.

[0025] Matching sections T1 and T2 can be microstrip line matching sections or matching sections composed of microstrip lines and capacitors. They mainly increase the output low impedance of the die to 50Ω through impedance change to achieve maximum output power and highest efficiency.

[0026] At the same time, two sections of λ / 8 open microstrip lines (L1 and L2) are connected to the root of the output of the device external matching circuit 20. One end of L1 and L2 is connected to the output of the device, and the other end is open. According to the input impedance of the terminal open transmission line: Z0 is the characteristic impedance, λ is the wavelength, and l is the length of the microstrip line. When l = λ8, the input impedance at 2f0 is 0, that is, the second harmonic impedance is short-circuited, and the second harmonic impedance is further short-circuited at the output end of the device.

[0027] like Figure 1 As shown, the third matching section T3 uses a λ / 4 short-circuited microstrip line with the other end grounded. λ is the wavelength. According to the input impedance of the terminal short-circuited transmission line: Z0 is the characteristic impedance, l is the length of the microstrip line, and the input impedance at any point on a short-circuited transmission line is purely reactance. When the length of the short-circuited microstrip line is l = λ4, the input impedance is infinite, equivalent to an open circuit. When 0 < l < λ4, the input impedance is inductive; and when λ4 < l < λ2, the input impedance is capacitive. According to the Smith chart impedance matching principle, and because wavelength is inversely proportional to frequency, the above equation shows that low-frequency points are capacitive, and the parallel capacitor rotates clockwise on the Smith chart impedance diagram, while high-frequency points are inductive, and the parallel inductor rotates counterclockwise on the Smith chart impedance diagram. This rotation of the high- and low-frequency points in opposite directions allows the low- and high-frequency points within a given bandwidth to be twisted as close to 50Ω as possible on the Smith chart, achieving bandwidth widening. Since all matching sections are microstrip, debugging is easy, cost-effective, and consistency is excellent. Furthermore, by varying the length of the microstrip matching section, the optimal power efficiency point can be found, increasing RF bandwidth.

[0028] like Figure 2 As shown in Figure 1, the third matching section T3 is implemented using an inductor-capacitor parallel resonant circuit, which has the same effect. According to the LC parallel resonance principle, the impedance seen from the input end is w s Self-resonant angular frequency, w is the angular frequency, L S ,C S is the parallel resonant inductor and capacitor, f s is the self-resonant frequency, and f is the operating frequency. When f=f s When the impedance is infinite, f s is the resonant frequency, which is equivalent to an open circuit. When f>f s When f<f s When , the input impedance is inductive. According to the Smith chart impedance matching principle, the above formula shows that the low-frequency impedance is capacitive, and the parallel capacitor rotates clockwise on the Smith chart impedance diagram, while the high-frequency impedance is inductive, and the parallel inductor rotates counterclockwise on the Smith chart impedance diagram. In this way, the high-frequency and low-frequency points rotate in opposite directions, and the low-frequency and high-frequency points within a certain bandwidth can be twisted as close to 50Ω as possible on the Smith chart, achieving the purpose of widening the bandwidth.

[0029] It should be understood that the above-described specific embodiments of the present invention are merely illustrative of or explanation of the principles of the present invention and do not constitute limitations of the present invention. Therefore, any modifications, equivalent substitutions, improvements, etc. made without departing from the spirit and scope of the present invention shall be included within the scope of protection of the present invention. In addition, the appended claims of the present invention are intended to cover all variations and modifications that fall within the scope and metes and bounds of the appended claims, or equivalents thereof.

Claims

1. An internal and external matching circuit for a GaN power amplifier device, comprising a packaging flange, a GaN die disposed on the packaging flange, and input pins and output pins disposed at both ends of the packaging flange, characterized in that: A first matching capacitor and a second matching capacitor are arranged between the GaN die and the input pin on the packaging flange. The GaN die is connected to the first matching capacitor through a first bonding wire, the first matching capacitor is connected to the second matching capacitor through a second bonding wire, and the second matching capacitor is connected to the input pin through a third bonding wire. The first bonding wire, the second bonding wire, the third bonding wire, the first matching capacitor and the second matching capacitor constitute a second-order low-pass internal matching network. The GaN die is connected to the output pin through a fourth bonding wire, the output pin is connected to the first matching section, the first matching section is connected to the DC blocking capacitor, the other end of the DC blocking capacitor is connected to the second matching section, the second matching section is connected to the third matching section, and the connection point between the second matching section and the third matching section serves as the RF output end. The first matching section, the DC blocking capacitor, the second matching section and the third matching section constitute an external matching circuit. The first matching section and the second matching section are used to increase the output impedance to 50Ω through impedance change.

2. The internal and external matching circuit of the GaN power amplifier device according to claim 1, characterized in that: The first matching section and the second matching section are microstrip lines or microstrip lines and capacitors.

3. The internal and external matching circuit of the GaN power amplifier device according to claim 1, characterized in that: The third matching section is Short-circuited microstrip line or inductor-capacitor parallel resonant circuit, λ is the wavelength.

4. The internal and external matching circuit of the GaN power amplifier device according to claim 1, characterized in that: The root of the external matching circuit is connected to the two sections Open microstrip line.

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