Guide medium selection circuit based on embedded microprocessor

Abstract

The utility model relates to a guide medium selection circuit based on an embedded microprocessor. The guide medium selection circuit comprises a microprocessor, an analog switch, a BOOT circuit, a functional circuit and a delay control circuit, the microprocessor is electrically connected with the analog switch through a pin P1; the analog switch is electrically connected with the BOOT circuit and the functional circuit respectively; the microprocessor is electrically connected with the delay control circuit through a pin P1; the delay control circuit is electrically connected with the analog switch; the device is reasonable in design, compact in structure and convenient to use.

Description

Technical Field

[0001] The utility model is applied to the field of embedded technology, and particularly relates to a boot medium selection circuit based on an embedded microprocessor. Background Art

[0002] As electronic devices become increasingly portable and miniaturized, ARM-based embedded microprocessors are becoming increasingly common and widely used in our daily lives. Board designs for these microprocessors often include a BOOT (boot media selection) circuit, which is essential for the proper functioning of these microprocessors. To reduce the number of pins while still ensuring functionality in a smaller microprocessor package, manufacturers often reuse BOOT-related pins with some functional pins. This results in the same pin being connected to both the BOOT circuit and the functional circuit, interfering with each other and potentially impacting the proper operation of the entire microprocessor system.

[0003] Generally speaking, the BOOT (boot media selection) circuit primarily consists of an array of pull-up and pull-down resistors for the BOOT (boot media selection)-related pins. Different pull-up and pull-down combinations determine which storage medium's zero sector the microprocessor boots from. Functional circuits are more complex, such as UART circuits, audio circuits, and network port circuits. Different circuits have different pin designs for different functions. When the BOOT (boot media selection) pin is multiplexed with a functional pin, connecting the same pin to both circuits can cause the pin voltage to rise or fall abnormally, affecting both the BOOT (boot media selection) circuit and the functional circuit. Utility Model Content

[0004] The technical problem to be solved by the present invention is generally to provide a boot medium selection circuit based on an embedded microprocessor, mainly to solve the problem of multiplexing the BOOT pins and function pins of the microprocessor.

[0005] In order to solve the above problems, the technical solution adopted by the present invention is:

[0006] A boot medium selection circuit based on an embedded microprocessor, comprising a microprocessor, an analog switch, a BOOT circuit, a functional circuit and a delay control circuit;

[0007] The microprocessor is electrically connected to the analog switch via pin P1;

[0008] The analog switch is electrically connected to the BOOT circuit and the functional circuit respectively;

[0009] The microprocessor is electrically connected to the delay control circuit via pin P1;

[0010] The delay control circuit is electrically connected to the analog switch.

[0011] Furthermore, the microprocessor is electrically connected to the delay control circuit via a reset signal channel and / or a power supply signal; the delay control circuit controls the analog switch via an electrical signal.

[0012] Furthermore, the analog switch uses chip U17;

[0013] The delay control circuit uses chip U18;

[0014] Pins E21, F21, G21, and H21 of P1 are connected to pins 16, 4, 8, and 12 of chip U17 respectively;

[0015] The reset signal or power signal NVCC_AON of pin P1 is connected to pin 3 of chip U18;

[0016] Pin 2 of chip U18 is connected to the switch control pins 2 and 10 of chip U17;

[0017] When the switching control pins 2 and 10 are in a low level state, the switching control pins 2 and 10 are a path, that is, the Y0 channel of the chip U17;

[0018] When the switching control pins 2 and 10 are at a high level, the switching control pins 2 and 10 are a path, namely the Y1 channel of U17.

[0019] Furthermore, the BOOT circuit is connected to a low-level path, i.e., pins 1, 5, 9, and 13 of the Y0 channel of chip U17, which is defined as the default path;

[0020] The BOOT circuit includes chip S3;

[0021] In the reset lifted state, BOOT_MODE1, 2, 3, 4 of chip S3 are connected to pins E21, F21, G21, H21 of pin P1;

[0022] After the set time delay, the delay control circuit is in the state of raising the output signal, and the pins 3, 7, 11, and 15 of the Y1 channel of the chip U17 are connected to the E21, F21, G21, and H21 of the pins P1;

[0023] The BOOT circuit is disconnected.

[0024] Furthermore, during the read phase, the BOOT circuit is connected to pin P1;

[0025] The functional circuit includes chip U24;

[0026] In the functional stage, the functional circuit is connected to pin P1.

[0027] Furthermore, in chip U24, pin 3 is connected to 3V3; pin 2 is connected to 3V3DEBUG;

[0028] Pins 8 and 9 are connected to pins E20 and F20 of pin P1;

[0029] Pins 6 and 7 are connected to pins 3 and 15 of pin U17;

[0030] Pins 12, 13, 14, and 15 are connected to the external serial port interface.

[0031] Without affecting the original circuit design, the present invention can separate the two circuits of a microprocessor that reuses the BOOT (boot medium selection) pin and the function pin, ensuring both functions, without affecting each other. The present invention has a reasonable design, low cost, durability, safety and reliability, simple operation, time and labor saving, cost saving, compact structure and convenient use. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 This is a schematic diagram of the analog switch circuit and delay control circuit of the utility model.

[0033] Figure 2 This is a schematic diagram of the pin structure of the microprocessor of the present invention.

[0034] Figure 3 This is a schematic diagram of the BOOT circuit of the present utility model.

[0035] Figure 4 It is a functional circuit diagram of the utility model.

[0036] Figure 5 It is a flow chart of the utility model. DETAILED DESCRIPTION

[0037] like Figure 1-5 , a boot medium selection circuit based on an embedded microprocessor, characterized by comprising a microprocessor, an analog switch, a BOOT circuit, a functional circuit and a delay control circuit;

[0038] The microprocessor is electrically connected to the analog switch via a pin;

[0039] The analog switch is electrically connected to the BOOT circuit and the functional circuit respectively;

[0040] The microprocessor is electrically connected to the delay control circuit via a pin;

[0041] The delay control circuit is electrically connected to the analog switch.

[0042] The microprocessor is electrically connected to the delay control circuit through a reset signal channel and / or a power supply signal; the delay control circuit controls the analog switch through an electrical signal.

[0043] Regarding the above problems, Figure 5 The microprocessor BOOT (boot medium selection) and function-multiplexed pins are directly connected to the input of the analog switch. The reset signal of the microprocessor or the power supply of the power domain where the pin is located is connected to the delay control circuit. The delay control circuit is used to control the analog switch. There are two paths at the back end of the analog switch, which are switched by the signal control after the delay.

[0044] The present invention preferably physically separates the BOOT (boot media selection) circuit and the functional circuit at their connection points by dynamically switching an analog switch. When a pin is in BOOT mode, the BOOT circuit is connected to the microprocessor pin; conversely, when the pin is in functional mode, the functional circuit is connected to the microprocessor pin. A key characteristic of this circuit is the timing of the dynamic switching of the analog switch.

[0045] The analog switch needs to switch automatically according to the status of the microprocessor. Generally speaking, the time for the microprocessor to read BOOT (boot medium selection) is the rising edge of the microprocessor reset signal. After that, the microprocessor pin will latch the BOOT (boot medium selection) configuration into the internal register, and then boot the system program from the corresponding configured storage medium. This reading process is very fast, generally in milliseconds or less.

[0046] Therefore, the circuit must ensure that it is connected to the BOOT (boot medium selection) circuit throughout the entire process of the microprocessor reset rising. In other words, after the reset signal is raised, there is a short delay before switching to the functional circuit. Similarly, this switching signal can also use the power supply of the BOOT (boot medium selection) pin in the power domain where the microprocessor is located. The difference between other reset signals is that the power supply will be raised before the reset signal, so the switching delay is also longer.

[0047] like Figure 1 ,according to Figure 5The microprocessor's pins E21 / F21 / G21 / H21 are directly connected to pins 16 / 4 / 8 / 12 of the analog switch U17. The reset signal or power signal NVCC_AON is connected to pin 3 of the delay control circuit U18. The main function of the delay control circuit is to keep the input low for a period of time after the input signal is raised, and then raise the output to a high level after a specific delay time. Pin 2 of the delay control circuit's output U18 is connected to the switching control pins 2 / 10 of the analog switch U17. When the switching control pin of the analog switch is at a low level, it is a path, namely the Y0 channel of U17. When it is at a high level, it is a path, namely the Y1 channel of U17. The BOOT (boot medium selection) circuit is connected to a low-level path, namely the Y0 channel 1 / 5 / 9 / 13 pins of U17, which is the default path of the circuit. It ensures that the BOOT (boot medium selection) circuit BOOT_MODE1 / 2 / 3 / 4 is always connected to the microprocessor pins E21 / F21 / G21 / H21 during the reset process. The delay control circuit raises the output signal after a period of delay. The analog switch connects the functional circuit, namely the Y1 channel 3 / 7 / 11 / 15 pins of U17, to the microprocessor pins E21 / F21 / G21 / H21, disconnecting the BOOT (boot medium selection) circuit. Through such control, the BOOT (boot medium selection) circuit can be connected to the microprocessor pins during the microprocessor BOOT (boot medium selection) reading phase, and the functional circuit connector can be connected to the microprocessor pins during the functional phase, without interfering with each other.

[0048] The present invention is fully described for the purpose of clearer disclosure, and the prior art will not be listed one by one.

[0049] Finally, it should be noted that the above embodiments are intended only to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may be modified or some of the technical features thereof may be replaced with equivalents. It is obvious for those skilled in the art to combine multiple technical solutions of the present invention. However, these modifications or replacements do not deviate from the spirit and scope of the technical solutions of the embodiments of the present invention. Any technical content not fully described in this utility model is generally known technology.

Claims

1. A boot medium selection circuit based on an embedded microprocessor, characterized in that: Including microprocessor, analog switch, BOOT circuit, functional circuit and delay control circuit; The microprocessor is electrically connected to the analog switch via pin P1; The analog switch is electrically connected to the BOOT circuit and the functional circuit respectively; The microprocessor is electrically connected to the delay control circuit via pin P1; The delay control circuit is electrically connected to the analog switch.

2. The boot medium selection circuit based on an embedded microprocessor according to claim 1, characterized in that: The microprocessor is electrically connected to the delay control circuit through a reset signal channel and / or a power supply signal; the delay control circuit controls the analog switch through an electrical signal.

3. The boot medium selection circuit based on an embedded microprocessor according to claim 1, characterized in that: The analog switch uses chip U17; The delay control circuit uses chip U18; Pins E21, F21, G21, and H21 of P1 are connected to pins 16, 4, 8, and 12 of chip U17 respectively; The reset signal or power signal NVCC_AON of pin P1 is connected to pin 3 of chip U18; Pin 2 of chip U18 is connected to the switch control pins 2 and 10 of chip U17; When the switching control pins 2 and 10 are in a low level state, the switching control pins 2 and 10 are a path, that is, the Y0 channel of the chip U17; When the switching control pins 2 and 10 are at a high level, the switching control pins 2 and 10 are a path, namely the Y1 channel of U17.

4. The boot medium selection circuit based on an embedded microprocessor according to claim 3, characterized in that: The BOOT circuit is connected to the low-level path, that is, pins 1, 5, 9, and 13 of the Y0 channel of chip U17, which is defined as the default path; The BOOT circuit includes chip S3; In the reset lifted state, BOOT_MODE1, 2, 3, 4 of chip S3 are connected to pins E21, F21, G21, H21 of pin P1; After the set time delay, the delay control circuit is in the state of raising the output signal, and the pins 3, 7, 11, and 15 of the Y1 channel of the chip U17 are connected to the E21, F21, G21, and H21 of the pins P1; The BOOT circuit is disconnected.

5. The boot medium selection circuit based on an embedded microprocessor according to claim 4, characterized in that: During the read phase, the BOOT circuit is connected to pin P1; The functional circuit includes chip U24; In the functional stage, the functional circuit is connected to pin P1.

6. The boot medium selection circuit based on an embedded microprocessor according to claim 1, characterized in that: In chip U24, pin 3 is connected to 3V3; pin 2 is connected to 3V3DEBUG; Pins 8 and 9 are connected to pins E20 and F20 of pin P1; Pins 6 and 7 are connected to pins 3 and 15 of pin U17; Pins 12, 13, 14, and 15 are connected to the external serial port interface.

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