Packaging lead frame, flip-chip packaging device and electronic equipment

Abstract

The utility model provides a packaging lead frame, a flip-chip bonding packaging device and electronic equipment, and relates to the technical field of electronic device production, the packaging lead frame provided by the utility model corresponds to a chip with a plurality of welding spot windows, a thinning area is arranged on the surface of the packaging lead frame, and the surface of the packaging lead frame can be thinned. And the thinning area is opposite to the gap area between the two adjacent welding spot windows, so that the infiltration space of the plastic packaging filler is increased, the plastic packaging filler can fully infiltrate to realize filling, cavities are prevented from being formed in the plastic packaging filler, internal stress release of the packaging lead frame in the packaging heating process is facilitated, the internal stress of the packaging structure is reduced, and the reliability of the packaging structure is improved. And the packaging reliability is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of electronic device production, in particular to a packaged lead frame, a flip-chip packaged device and an electronic device. Background Art

[0002] In a flip-chip package, the chip's surface bumps are directly interconnected with the package substrate, providing the shortest signal transmission path for the product, resulting in excellent electrical performance with low capacitance, inductance, and resistance. Signal extraction from the chip surface requires the wafer fab to create solder window openings on the surface. To achieve optimal electrical characteristics, the solder window openings must be large, posing significant challenges to the fab's electroplating and surface passivation processes, impacting wafer yield and ultimately significantly increasing chip manufacturing costs. To ensure effective signal transmission and heat dissipation from the solder joints, the large solder window openings are divided into multiple smaller blocks without reducing their size. This maximizes signal transmission and heat dissipation while reducing the fab's process complexity.

[0003] See also Figure 1 When multiple small solder point windows 201 are created, gaps 202 are formed between adjacent solder point windows 201. Due to the narrow space in gaps 202, filler cannot penetrate during plastic encapsulation, resulting in cavities. The air in these cavities rapidly expands when the package is subjected to high temperatures, easily causing cracks and, in severe cases, device failure. Furthermore, the air in these cavities contains a certain amount of moisture, which reacts chemically with chlorine, leading to solder point failure and shortening the lifespan of the electronic device. Utility Model Content

[0004] The purpose of the utility model is to provide a package lead frame, a flip-chip package device and an electronic device, so as to alleviate the technical problem in the prior art that the plastic sealing filler is difficult to fully fill the gap area during flip-chip packaging.

[0005] In a first aspect, the package lead frame provided by the present invention is suitable for a chip having a plurality of solder point openings. A thinning area is provided on the surface of the package lead frame, and the thinning area is opposite to the gap area between two adjacent solder point openings.

[0006] In combination with the first aspect, the present invention provides a first possible implementation of the first aspect, wherein, in a cross section perpendicular to the extension direction of the thinning area, the bottom of the thinning area is configured as a concave arc structure.

[0007] In combination with the first aspect, the present invention provides a second possible implementation of the first aspect, wherein the thinned area is configured as a half-etched groove.

[0008] In combination with the first aspect, the present invention provides a third possible implementation manner of the first aspect, wherein the surface of the package lead frame is thinned by 0.07 mm to 0.13 mm to form the thinned area.

[0009] In combination with the first aspect, the present invention provides a fourth possible implementation of the first aspect, wherein a plurality of boss areas are formed by enclosing the thinning area, and the plurality of boss areas correspond one-to-one to the plurality of welding point openings.

[0010] In a second aspect, the present invention provides a flip-chip package device comprising: a chip having a plurality of solder joint windows and a package lead frame according to the first aspect;

[0011] The plurality of solder point windows are respectively connected to the package lead frame via adhesive;

[0012] A gap area is formed between any two adjacent welding point windows, and at least one of the gap areas is opposite to the thinning area.

[0013] In combination with the second aspect, the present invention provides a first possible implementation of the second aspect, wherein the surface of the package lead frame has a plurality of the thinned areas, and the plurality of gap areas are opposite to the plurality of the thinned areas one by one.

[0014] In combination with the second aspect, the present invention provides a second possible implementation of the second aspect, wherein a plastic encapsulation filler is filled between the opposite thinning area and the gap area.

[0015] In a third aspect, the electronic device provided by the present invention is equipped with the flip-chip packaging device described in the second aspect.

[0016] The embodiments of the present invention bring the following beneficial effects: corresponding to a chip with multiple solder point windows, a thinning area is set on the surface of the package lead frame, and the thinning area is made opposite to the gap area between two adjacent solder point windows, thereby increasing the penetration space of the plastic encapsulation filler, and the plastic encapsulation filler can fully penetrate to achieve filling, avoiding the formation of voids inside the plastic encapsulation filler, and improving the reliability of the package.

[0017] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in related technologies, the following briefly introduces the drawings required for use in the specific implementation methods or related technical descriptions. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1 A schematic diagram of a flip-chip packaging device;

[0020] Figure 2 A schematic diagram of another flip-chip packaging device provided by an embodiment of the present utility model;

[0021] Figure 3 A schematic diagram of a package lead frame provided in an embodiment of the present invention.

[0022] Icons: 100 - package lead frame; 101 - thinning area; 102 - boss area; 200 - chip; 201 - solder joint window; 202 - gap area; 300 - adhesive. DETAILED DESCRIPTION

[0023] The following is a clear and complete description of the technical solution of the present invention in conjunction with the accompanying drawings. Obviously, the embodiments described are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of the present invention.

[0024] In the description of the present invention, it should be noted that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first", "second", and "third" are only used to describe the difference in names, and cannot be understood as indicating or implying relative importance. Physical quantities in formulas, unless separately marked, should be understood as basic quantities of the basic units of the International System of Units, or derived quantities derived from basic quantities through mathematical operations such as multiplication, division, differentiation or integration.

[0025] In the description of this utility model, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; mechanical connections, electrical connections; direct connections, indirect connections through an intermediate medium, and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this utility model based on the specific circumstances.

[0026] like Figure 2 As shown, the package lead frame 100 provided in the embodiment of the present invention is suitable for a chip 200 having multiple solder point windows 201 . A thinning area 101 is provided on the surface of the package lead frame 100 , and the thinning area 101 is opposite to the gap area 202 between two adjacent solder point windows 201 .

[0027] By using the package lead frame 100 described in this embodiment, a chip 200 designed with a large solder point window 201 can be replaced with multiple small solder point windows 201, which can maximize signal transmission performance and heat dissipation performance, avoid the problem of increased process difficulty caused by setting large-sized solder point windows 201, reduce wafer processing costs, and thus reduce the production cost of flip-chip packaged devices. In addition, the thinning area 101 is opposite to the gap area 202, which increases the infiltration space of the plastic encapsulation filler. The plastic encapsulation filler can fully infiltrate and fill, avoiding the formation of voids inside the plastic encapsulation filler, and improving the reliability of the package. It is particularly suitable for improvements after the layout design of the chip 200 is finalized. It only needs to optimize the structure of the package lead frame 100, and has the advantages of low cost, high electrical characteristics, and high heat dissipation.

[0028] In this embodiment of the present invention, thinned region 101 extends along the surface of package lead frame 100. In a cross section perpendicular to the extension direction of thinned region 101, the bottom of thinned region 101 is configured as a concave arc structure. This avoids corners that would hinder filler penetration, thereby ensuring that filler can fully fill thinned region 101. During the package heating process, package lead frame 100 is heated evenly, preventing cracking or uneven heating caused by filler voids. This reduces internal stress in the package structure, thereby improving its reliability.

[0029] In an optional embodiment, the thinning area 101 is configured as a half-etched groove. The half-etched surface treatment hardly increases the manufacturing cost for the production of the package lead frame 100. The surface of the package lead frame 100 forms an unpenetrated thinning area 101, which can ensure the structural integrity of the package lead frame 100 and thus ensure that the structural strength of the package lead frame 100 is not destroyed.

[0030] like Figure 2 and Figure 3As shown, in this embodiment, the surface of the package lead frame 100 is thinned by 0.07 mm to 0.13 mm to form a thinned area 101. The thinned area 101 can be wider than the gap area 202. Even the thinned area 101 can be formed by etching in all areas except the boss area 102 opposite to the solder joint window 201. The thinned area 101 is surrounded by a plurality of boss areas 102, and the plurality of boss areas 102 correspond one-to-one to the plurality of solder joint windows 201.

[0031] It should be noted that, through the verification of the entire flip-chip packaging process, the package lead frame 100 improves the resin filling problem in narrow gaps by setting a thinning area 101. Through 3D modeling simulation, etching and thinning can improve the problem of poor plastic injection filling. At the same time, it is also beneficial to the release of internal stress of the material of the package lead frame 100 during the packaging heating process, thereby reducing the internal stress of the packaging structure and improving the overall reliability of the package.

[0032] The flip-chip package device provided by an embodiment of the present invention includes: a chip 200 having multiple solder point openings 201 and a package lead frame 100 described in the above embodiment; the multiple solder point openings 201 are respectively connected to the package lead frame 100 via an adhesive 300; a gap area 202 is formed between any two adjacent solder point windows 201, and at least one gap area 202 is opposite to the thinning area 101.

[0033] In an optional embodiment, a thinning area 101 may be provided on the opposite side of the smaller gap area 202 , thereby increasing the filler space there so that a molding filler such as resin can fully penetrate therein.

[0034] In the embodiment of the present invention, the surface of the package lead frame 100 has multiple thinning areas 101, and multiple gap areas 202 are opposite to the multiple thinning areas 101 one by one, thereby expanding the filling space of each gap area 202, thereby ensuring that adjacent solder joint windows 201 can be fully filled.

[0035] Furthermore, a plastic filler is filled between the relatively thinned area 101 and the gap area 202. The plastic filler can be filled with resin and solidified, and can also be replaced with other types of fillers as needed.

[0036] The electronic device provided by the embodiment of the present utility model is equipped with the flip-chip packaging device described in the above-mentioned embodiment. The electronic device has the technical advantages of the above-mentioned flip-chip packaging device, which is conducive to improving the reliability of the electronic device, reducing the production cost of the electronic device, and ensuring the electrical characteristics and heat dissipation performance.

[0037] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A package lead frame (100), suitable for a chip (200) having a plurality of solder point openings (201), characterized in that: A thinning area (101) is provided on the surface of the package lead frame (100), and the thinning area (101) is opposite to the gap area (202) between two adjacent solder point windows (201).

2. The package lead frame (100) according to claim 1, characterized in that On a cross section perpendicular to the extending direction of the thinning area (101), the bottom of the thinning area (101) is configured as a concave arc structure.

3. The package lead frame (100) according to claim 1, characterized in that The thinned area (101) is configured as a half-etched groove.

4. The package lead frame (100) according to claim 1, characterized in that The surface of the package lead frame (100) is thinned by 0.07 mm to 0.13 mm to form the thinned area (101).

5. The package lead frame (100) according to claim 1, characterized in that A plurality of boss areas (102) are formed by enclosing the thinning area (101), and the plurality of boss areas (102) correspond one-to-one to the plurality of welding point windows (201).

6. A flip chip packaging device, characterized in that: include: A chip (200) having a plurality of solder joint windows (201) and a package lead frame (100) according to any one of claims 1 to 5; The plurality of solder point windows (201) are respectively connected to the package lead frame (100) via adhesive (300); A gap area (202) is formed between any two adjacent welding point windows (201), and at least one of the gap areas (202) is opposite to the thinning area (101).

7. The flip chip packaging device according to claim 6, characterized in that: The surface of the package lead frame (100) has a plurality of thinning areas (101), and the plurality of gap areas (202) are opposite to the plurality of thinning areas (101) one by one.

8. The flip chip packaging device according to claim 6 or 7, characterized in that: A plastic filler is filled between the opposite thinning area (101) and the gap area (202).

9. An electronic device, characterized in that: The electronic device is equipped with the flip-chip package device according to any one of claims 6 to 8.

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