Package structure

Abstract

The utility model provides a packaging structure. The packaging structure comprises a substrate; a plurality of connecting metal blocks, wherein the connecting metal blocks are arranged on the substrate; the electronic components are electrically connected with the substrate through the connecting metal blocks, the substrate is divided into a dense area and a non-dense area, and the dense area and the non-dense area are determined according to distribution of the electronic components. The antenna unit is arranged in the non-dense area; the plurality of connecting metal blocks are arranged on the substrate, the insulating layer is arranged on the substrate and surrounds the plurality of connecting metal blocks, the insulating layer is provided with a blocking structure, the blocking structure is arranged between the electronic elements in the dense area, and the top surface height of the blocking structure is smaller than the top surface height of the plurality of connecting metal blocks. Therefore, the insulating layer surrounds and is connected with the metal block to preliminarily prevent bridge connection; furthermore, protruding blocking structures are arranged on the insulating layers and located between the electronic elements, and bridging caused by upward overflow of the connecting metal blocks in the manufacturing process is prevented.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductor packaging, in particular to a packaging structure. Background Art

[0002] For packaging structures with antenna units, in order to ensure that the antenna signal is not interfered with by surrounding electronic components, the antenna unit and other electronic components are usually partitioned and placed so that the antenna unit and other electronic components maintain a certain distance to ensure effective signal transmission. Figure 1 , Figure 1 This is a schematic diagram of the top view of the packaging structure of the prior art. Figure 1 As shown, the antenna unit 01 is arranged on the right side of the substrate 04 , and the plurality of electronic components 02 are arranged on the left side of the substrate 04 at a certain distance from the antenna unit 01 .

[0003] In this way, the distance between the electronic components 02 is relatively compressed within the limited packaging space. When the distance between the electronic components 02 becomes smaller, bridging phenomenon is likely to occur. For details, see Figure 1 Enlarged view of the bridge section 03. Bridging can cause short circuits between electronic components, affecting the reliability of the packaging structure and the performance of the electronic device. Bridging can also reduce the yield rate during the packaging process and increase production costs. Utility Model Content

[0004] The utility model provides a packaging structure.

[0005] In a first aspect, the present invention provides a packaging structure, comprising:

[0006] substrate;

[0007] a plurality of connecting metal blocks, wherein the connecting metal blocks are arranged on the substrate;

[0008] a plurality of electronic components, wherein the electronic components are electrically connected to the substrate via the connecting metal blocks, and the substrate is divided into dense areas and non-dense areas, wherein the dense areas and non-dense areas are determined according to the distribution of the plurality of electronic components;

[0009] An antenna unit, the antenna unit being arranged in the non-dense area;

[0010] The insulating layer is arranged on the substrate and surrounds the multiple connecting metal blocks. The insulating layer has a blocking structure, which is arranged between the electronic components in the dense area. The top surface height of the blocking structure is smaller than the top surface height of the multiple connecting metal blocks.

[0011] As a possible embodiment, the top surface height of the above-mentioned insulating layer in the first interval is higher than the top surface height of the second interval. The above-mentioned first interval is the part where the above-mentioned insulating layer and the projections of the above-mentioned multiple electronic components in the vertical direction overlap, and the above-mentioned second interval is the part of the above-mentioned insulating layer excluding the above-mentioned first interval.

[0012] As a possible implementation, the above packaging structure further includes:

[0013] A plurality of pads are provided on the substrate.

[0014] As a possible implementation manner, the above-mentioned pad is connected to the above-mentioned connecting metal block.

[0015] As a possible implementation, the spacing between the pads is less than 40 μm.

[0016] As a possible implementation manner, the pad is flush with the top surface of the insulating layer in the second section.

[0017] As a possible implementation manner, the length of the blocking structure is equal to the length or width of the electronic component.

[0018] As a possible implementation manner, the connecting metal block wraps part of the side surface of the electronic component.

[0019] As a possible implementation manner, the blocking structure is in direct contact with the connecting metal block.

[0020] As a possible implementation manner, there are multiple blocking structures, and the heights of the multiple blocking structures are the same.

[0021] As a possible implementation manner, the blocking structure is not in direct contact with the connecting metal block.

[0022] As a possible implementation manner, the connecting metal block is a solder ball.

[0023] As a possible embodiment, the material of the above-mentioned insulating layer is any one or more of polyamide fiber, polyimide, epoxy resin, poly(p-phenylene benzobisoxazole) fiber, FR-4 epoxy glass cloth laminate, PP, silicon, glass, ceramic, silicon oxide, silicon nitride, and tantalum oxide.

[0024] As a possible implementation manner, the material of the above-mentioned pad is gold, silver, aluminum, nickel, palladium, copper or an alloy thereof.

[0025] As a possible implementation manner, the blocking structure is arranged around the electronic component.

[0026] As a possible implementation, one or more of the above-mentioned blocking structures are provided between every two of the above-mentioned electronic components.

[0027] As a possible implementation manner, there is a gap between the electronic component and the insulating layer.

[0028] As a possible implementation, the gap is filled with packaging material.

[0029] In order to prevent bridging between electronic components in a package structure including an antenna unit, the present invention proposes a package structure comprising: a substrate; a plurality of connecting metal blocks disposed on the substrate; a plurality of electronic components electrically connected to the substrate via the connecting metal blocks, the substrate being divided into a dense area and a non-dense area, the dense area and the non-dense area being determined based on the distribution of the plurality of electronic components; an antenna unit disposed in the non-dense area; an insulating layer disposed on the substrate and surrounding the plurality of connecting metal blocks, the insulating layer having a blocking structure disposed between the electronic components in the dense area, the top surface height of the blocking structure being less than the top surface height of the plurality of connecting metal blocks. In this way, the insulating layer is designed to surround the connecting metal blocks between the electronic components and the substrate, thereby preliminarily preventing bridging of the electronic components; at the same time, a protruding blocking structure is intentionally disposed on the insulating layer between the electronic components to further prevent bridging caused by the connecting metal blocks overflowing upward during the reflow soldering process. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Other features, objects and advantages of the present invention will become more apparent from the detailed description of the non-limiting embodiments made with reference to the following drawings:

[0031] Figure 1 This is a schematic diagram of the structure of the prior art packaging structure in a top view direction;

[0032] Figure 2 1 is a schematic diagram of a top view of a packaging structure 100 according to an embodiment of the present invention and a partially enlarged schematic diagram;

[0033] Figure 3 is a partial front view cross-sectional view of a packaging structure 100 according to an embodiment of the present utility model;

[0034] Figure 4 is a partial front view cross-sectional view of a packaging structure 100 according to an embodiment of the present utility model;

[0035] Figure 5-Figure 9 1 is a schematic structural diagram of a packaging structure 200 at various manufacturing stages according to an embodiment of the present invention.

[0036] Description of reference numerals / symbols:

[0037] 01-antenna unit; 02-electronic component; 03-bridging part; 04-substrate; 101-substrate; 102-connecting metal block; 103-electronic component; 104-dense area; 105-non-dense area; 1051-antenna unit; 106-insulating layer; 1061-blocking structure; 107-soldering pad; 108-first etching plate; 109-scraper; 110-insulating material; 111-second etching plate; 112-solder paste. DETAILED DESCRIPTION

[0038] The following describes the specific embodiments of the present invention in conjunction with the accompanying drawings and examples. Those skilled in the art will readily understand the technical problems solved by the present invention and the technical effects it produces through the contents of this specification. It should be understood that the specific embodiments described herein are intended only to illustrate the invention and are not intended to limit the invention. Furthermore, for ease of description, only the portions relevant to the invention are shown in the accompanying drawings.

[0039] It should be readily understood that the meanings of “on,” “over,” and “over…” in the present invention should be interpreted in the broadest sense, such that “on” not only means “directly on something,” but also means “on something” including intermediate components or layers therebetween.

[0040] Furthermore, for ease of description, spatially relative terms such as "below," "beneath," "lower," "above," and "upper" may be used herein to describe the relationship of one element or component to another element or component illustrated in the drawings. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90° or at other orientations), and the spatially relative descriptors used herein should be interpreted accordingly.

[0041] As used herein, the term "layer" refers to a portion of a material comprising an area having a certain thickness. A layer may extend over the entire underlying or superstructure, or may have an extent that is less than the extent of the underlying or superstructure. In addition, a layer may be an area of ​​a homogeneous or inhomogeneous continuous structure, the thickness of which is less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure or between any pair of horizontal planes therebetween. A layer may extend horizontally, vertically and / or along a tapered surface. A substrate may be a layer, may include one or more layers therein, and / or may have one or more layers thereon, above and / or below. A layer may include multiple layers. For example, a semiconductor layer may include one or more doped or undoped semiconductor layers, and may have the same or different materials.

[0042] As used herein, the term "substrate" refers to the material onto which subsequent material layers are added. The substrate itself can be patterned. The material added on top of the substrate can be patterned or can remain unpatterned. In addition, the substrate can include a variety of semiconductor materials, such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc. Alternatively, the substrate can be made of a non-conductive material, such as glass, plastic, or sapphire wafer. Further alternatively, the substrate can have semiconductor devices or circuits formed therein.

[0043] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of the specification are only used to match the contents recorded in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of the present invention. Therefore, they have no substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size should still fall within the scope of the technical content disclosed in the present invention without affecting the efficacy and purpose that can be achieved by the present invention. At the same time, terms such as "on", "first", "second" and "one" quoted in this specification are only for the convenience of description and are not used to limit the scope of the implementation of the present invention. Changes or adjustments in their relative relationships should also be regarded as the scope of the implementation of the present invention without substantially changing the technical content.

[0044] It should also be noted that the longitudinal cross-section corresponding to the embodiment of the present invention may be a cross-section corresponding to the front view direction, the transverse cross-section may be a cross-section corresponding to the right view direction, and the horizontal cross-section may be a cross-section corresponding to the top view direction.

[0045] In addition, the embodiments and features of the embodiments of the present invention can be combined with each other without conflict. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0046] Combine Figure 2 、 Figure 3 、 Figure 4 As shown, Figure 2 1 shows a top view and a partially enlarged view of the package structure 100. Figure 3 express Figure 2 A cross-sectional view of the enlarged portion in the front view direction, Figure 4 A partial front view cross-sectional view of the blocking structure 1061 is shown. The package structure 100 includes:

[0047] substrate 101;

[0048] A plurality of connecting metal blocks 102 , wherein the connecting metal blocks 102 are disposed on the substrate 101 ;

[0049] A plurality of electronic components 103, wherein the electronic components 103 are electrically connected to the substrate 101 via a connecting metal block 102. Based on the distribution of the plurality of electronic components 103, the substrate 101 is divided into a dense area 104 and a non-dense area 105, wherein the area where the plurality of electronic components 103 are located is the dense area 104, and the other areas are the non-dense areas 105;

[0050] Antenna unit 1051, wherein the antenna unit 1051 is disposed in the non-dense area 105;

[0051] The insulating layer 106 is disposed on the substrate 101 and surrounds the plurality of connecting metal blocks 102 . The insulating layer 106 has a blocking structure 1061 , which is disposed between the electronic components 103 in the dense area 104 .

[0052] It should be noted that, since a thinner etching plate is first used to form the blocking structure 1061 and then a thicker etching plate is used to form the connecting metal block 102 during the manufacturing process, the top surface height of the blocking structure 1061 will be smaller than the top surface height of multiple connecting metal blocks 102.

[0053] Therefore, the insulating layer 106 surrounds the connecting metal block 102, initially preventing the generation of bridges between the electronic components 103 above the connecting metal block 102. Further, a protruding blocking structure 1061 is set on the insulating layer 106 between the electronic components 103 to further prevent the connecting metal block 102 from overflowing upward during the manufacturing process (for example, the reflow soldering process) and causing bridges between the electronic components 103.

[0054] If the portion where the insulating layer 106 and the projections of the plurality of electronic components 103 overlap in the vertical direction is set as the first interval, the portion of the insulating layer 106 other than the first interval is set as the second interval. As a possible embodiment, the top surface height of the insulating layer 106 in the first interval is higher than the top surface height of the second interval. In other words, the insulating layer 106 below the electronic component 103 is thinner than the insulating layer 106 in the remaining portion. There is a gap between the electronic component 103 and the insulating layer 106. Optionally, the gap can be filled with packaging material, for example, it can be filled with bottom filler (Underfill), so as to prevent bubbles from being generated in the gap during the molding process of the overall structure, and to improve the bonding strength between the electronic component 103 and the substrate 101.

[0055] As a possible implementation, the package structure 100 may further include:

[0056] Multiple solder pads 107 are provided on substrate 101 and connected to connecting metal block 102. Optionally, due to the provision of antenna unit 1051, the gap between electronic components 103 is reduced, which may result in the distance between solder pads 107 being less than 40 μm. Optionally, solder pads 107 may be flush with the top surface of insulating layer 106 in the second section.

[0057] As a possible implementation, the blocking structure 1061 may be disposed around the electronic component 103. Figure 2 , the blocking structure 1061 can be set as Figure 2 Between the electronic components 103 adjacent to each other in the vertical direction, a space may be provided as follows: Figure 2 Therefore, the length of the blocking structure 1061 may be equal to the length or width of the electronic component 103 , and one or more blocking structures 1061 may be provided between every two electronic components 103 .

[0058] As a possible embodiment, the metal connection block 102 may overflow upward during the manufacturing process (e.g., the reflow process), and thus the metal connection block 102 may wrap around a portion of the side surface of the electronic component 103. In addition, since the overflow of the metal connection block 102 during the manufacturing process is uncertain, the blocking structure 1061 may directly contact the metal connection block 102 (see Figure 4 ), the blocking structure 1061 may not be in direct contact with the metal connection block 102 (see Figure 9 ), there is a gap between the two.

[0059] As a possible implementation, there may be multiple blocking structures 1061. When multiple blocking structures 1061 are manufactured at one time using an etching plate of the same thickness, the heights of the multiple blocking structures 1061 are the same.

[0060] As a possible embodiment, the connecting metal block 102 may be a solder ball. The insulating layer 106 may be made of any one or more of polyamide fiber, polyimide, epoxy resin, poly(p-phenylene benzobisoxazole) fiber, FR-4 epoxy glass cloth laminate, polypropylene, silicon, glass, ceramic, silicon oxide, silicon nitride, or tantalum oxide. The solder pad 107 may be made of gold, silver, aluminum, nickel, palladium, copper, or alloys thereof.

[0061] The package structure 200 is similar to the package structure 100, except that the barrier structure 1061 of the package structure 100 is in direct contact with the metal connection block 102, while the barrier structure 1061 of the package structure 200 is not in direct contact with the metal connection block 102. Figure 5-Figure 9 The following are the steps for manufacturing a package structure 200 according to another embodiment of the present invention:

[0062] Step 1: See Figure 5 , providing a substrate 101, and an insulating layer 106 and a pad 107 are arranged above the substrate 101.

[0063] As an example, the insulating layer 106 here may be a solder mask.

[0064] Step 2: See Figure 6 , a first etching plate 108 is placed above the insulating layer 106, and a scraper 109 is used to scrape the insulating material 110 into the circuit pattern (Pattern) of the first etching plate 108 to form a blocking structure 1061 (such as Figure 7 After removing the first etched plate 108.

[0065] Step 3: See Figure 7 , a second etching plate 111 is placed above the insulating layer 106, and a scraper 109 is used to scrape the solder paste 112 into the circuit pattern (Pattern) of the second etching plate 111 to form a connecting metal block 102 (such as Figure 8 After that, the second etching plate 111 is removed.

[0066] Step 4: See Figure 8 , placing the electronic component 103 above the connecting metal block 102;

[0067] Step 5: See Figure 9 , reflow soldering is performed to achieve a stable connection between the electronic component 103 and the connecting metal block 102. At this time, part of the metal connecting block 102 will overflow upward to form a packaging structure 200.

[0068] As used herein, the terms "substantially," "substantial," "approximately," and "about" are used to indicate and explain minor variations. For example, when used in conjunction with a numerical value, the above terms may refer to a variation range of less than or equal to ±10% of the corresponding numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. As another example, a film or layer having a thickness that is "substantially uniform" may refer to a film or layer having an average thickness that has a standard deviation of less than or equal to ±10%, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. The term "substantially coplanar" may refer to two surfaces that are within 50 μm along the same plane, such as within 40 μm, 30 μm, 20 μm, 10 μm, or 1 μm along the same plane. Two components may be considered "substantially aligned" if, for example, they overlap or are within 200 μm, 150 μm, 100 μm, 50 μm, 40 μm, 30 μm, 20 μm, 10 μm, or 1 μm. Two surfaces or components may be considered "substantially perpendicular" if the angle between them is, for example, 90° ± 10°, such as ± 5°, ± 4°, ± 3°, ± 2°, ± 1°, ± 0.5°, ± 0.1°, or ± 0.05°. When used in conjunction with an event or circumstance, the terms "substantially," "substantial," "approximately," and "about" may refer to both situations where the event or circumstance occurs exactly and situations where the event or circumstance occurs very approximately.

Claims

1. A packaging structure, characterized in that: The packaging structure includes: substrate; a plurality of connecting metal blocks, wherein the connecting metal blocks are arranged on the substrate; a plurality of electronic components, wherein the electronic components are electrically connected to the substrate via the connecting metal blocks, and the substrate is divided into dense areas and non-dense areas, wherein the dense areas and non-dense areas are determined according to the distribution of the plurality of electronic components; an antenna unit, wherein the antenna unit is arranged in the non-dense area; An insulating layer is provided on the substrate and surrounds the plurality of connecting metal blocks. The insulating layer has a blocking structure, the blocking structure is provided between the electronic components in the dense area, and the top surface height of the blocking structure is less than the top surface height of the plurality of connecting metal blocks.

2. The packaging structure according to claim 1, wherein: The top surface height of the insulating layer in the first interval is higher than the top surface height of the second interval. The first interval is the portion where the insulating layer overlaps with the projections of the multiple electronic components in the vertical direction. The second interval is the portion of the insulating layer excluding the first interval.

3. The packaging structure according to claim 2, wherein: The packaging structure further includes: A plurality of solder pads are provided on the substrate and connected to the connection metal block.

4. The packaging structure according to claim 3, wherein: The spacing between the pads is less than 40 μm.

5. The packaging structure according to claim 3, wherein: The pad is flush with a top surface of the insulating layer in the second section.

6. The packaging structure according to claim 3, wherein: The length of the blocking structure is equal to the length or width of the electronic component.

7. The packaging structure according to claim 1, wherein: The connecting metal block wraps a portion of the side surface of the electronic component.

8. The packaging structure according to claim 1, wherein: The blocking structure is in direct contact with the connecting metal block.

9. The packaging structure according to claim 1, wherein: There are multiple blocking structures, and the heights of the multiple blocking structures are the same.

10. The packaging structure according to claim 1, wherein: One or more blocking structures are arranged between every two electronic components.

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