Wafer chuck and semiconductor device
By setting a temperature insulation layer in the base of the wafer chuck, the problem of insufficient etching caused by high temperature in the exposed area of the wafer edge is solved, and a more efficient etching process is achieved.
Patent Information
- Application Number
- CN202422220871.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-10
- Publication Date
- 2025-08-29
- Estimated Expiration
- 2034-09-10
AI Technical Summary
During semiconductor device preparation, the edge exposure area (WEE) temperature of the wafer is higher than that of other areas, resulting in insufficient etching.
A wafer chuck is designed, including a base, a first temperature regulating part, a second temperature regulating part and a temperature insulation layer. By providing a temperature insulation layer between the first temperature regulating part and the second temperature regulating part, the transfer of heat or cold amount is reduced and the temperature at the edge of the wafer is reduced.
It effectively reduces the temperature of the wafer edge exposure area, reduces the risk of insufficient etching, and improves the reliability of the etching process.
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Figure CN223284966U_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of semiconductor technology, and in particular to wafer chucks and semiconductor equipment. Background Art
[0002] Plasma is an ionized gas composed of free electrons, positive ions, and neutral particles, appearing electrically neutral on a macroscopic scale. Plasma is a state of matter, often referred to as the fourth state of matter to distinguish it from solid, liquid, and gas. In the semiconductor device manufacturing process, an electrostatic chuck is typically used to secure the wafer to the machine, and then plasma is used to perform processes such as etching on the wafer. Utility Model Content
[0003] Embodiments of the present application provide a wafer chuck and a semiconductor device.
[0004] In a first aspect, the present application provides a wafer chuck, which includes a base, the base including a base body, a first temperature regulating part, a second temperature regulating part and a thermal insulation layer, the base body having a side wall extending along a first direction, the first temperature regulating part being located in the base body, the second temperature regulating part being located in the base body and located along the second direction on the side of the side wall of the first temperature regulating part facing the base body, the thermal insulation layer being located in the base body and located between the first temperature regulating part and the second temperature regulating part along the second direction, and the first direction intersects with the second direction.
[0005] In some embodiments, the base body includes a first part and a second part, the second part surrounds the first part, the size of the second part along the first direction is smaller than the size of the first part along the first direction, the first temperature regulating part is located in the first part, and the second temperature regulating part is located in the second part.
[0006] In some embodiments, the thermal insulation layer is located within the second portion.
[0007] In some embodiments, the base body further has a first surface, a second surface and a third surface, the second surface surrounds the first surface, the first surface and the third surface are arranged back to back along the first direction, the second surface and the third surface are arranged back to back along the first direction, and the distance between the first surface and the third surface in the first direction is greater than the distance between the second surface and the third surface in the first direction; wherein, the first temperature regulating portion is located between the first surface and the third surface along the first direction, and the second temperature regulating portion is located between the second surface and the third surface along the first direction.
[0008] In some embodiments, the temperature insulation layer is located between the second surface and the third surface along the first direction.
[0009] In some embodiments, the base body includes an airway layer, a temperature regulating layer and a base layer, the airway layer has a gas channel, the temperature regulating layer is located on one side of the airway layer along the first direction, the temperature regulating layer is provided with a first temperature regulating part, a second temperature regulating part and a temperature insulation layer, and the base layer is located on the side of the temperature regulating layer away from the airway layer along the first direction.
[0010] In some embodiments, the first temperature regulating portion includes a first fluid channel, and the second temperature regulating portion includes a second fluid channel. The first fluid channel and / or the second fluid channel extend from a side of the temperature regulating layer away from the air channel layer along a first direction into the temperature regulating layer.
[0011] In some embodiments, a dimension of the temperature-insulating layer along the first direction is greater than or equal to a dimension of the second fluid channel along the first direction.
[0012] The second aspect of the present application provides a semiconductor device, which includes a wafer chuck and an edge ring. The wafer chuck includes a base, the base includes a base body, a first temperature regulating part, a second temperature regulating part and a thermal insulation layer, the base body has a side wall extending along a first direction, the first temperature regulating part is located in the base body, the second temperature regulating part is located in the base body and is located on the side of the side wall of the first temperature regulating part facing the base body along the second direction, the thermal insulation layer is located in the base body and is located between the first temperature regulating part and the second temperature regulating part along the second direction, the first direction intersects with the second direction, the edge ring is arranged on the base body and is located on one side of the second temperature regulating part along the first direction, and the first temperature regulating part is located on the side of the inner side wall of the edge ring facing away from the second temperature regulating part.
[0013] In some embodiments, the base body includes a first part and a second part, the second part surrounds the first part, the size of the second part along the first direction is smaller than the size of the first part along the first direction, the first temperature regulating portion is located in the first part, the second temperature regulating portion is located in the second part, and the edge ring is arranged in the second part and surrounds the first part.
[0014] In some embodiments, the thermal insulation layer is located within the second portion.
[0015] In some embodiments, the base body further has a first surface, a second surface and a third surface, the second surface surrounds the first surface, the first surface and the third surface are arranged back to back along the first direction, the second surface and the third surface are arranged back to back along the first direction, and the distance between the first surface and the third surface in the first direction is greater than the distance between the second surface and the third surface in the first direction; wherein, the first temperature regulating portion is located between the first surface and the third surface along the first direction, the second temperature regulating portion is located between the second surface and the third surface along the first direction, and the edge ring is located on the second surface.
[0016] In some embodiments, the temperature insulation layer is located between the second surface and the third surface along the first direction.
[0017] In some embodiments, the base body includes an airway layer, a temperature regulating layer and a base layer, the airway layer has a gas channel, the temperature regulating layer is located on one side of the airway layer along the first direction, the temperature regulating layer is provided with a first temperature regulating part, a second temperature regulating part and a temperature insulation layer, the base layer is located on the side of the temperature regulating layer away from the airway layer along the first direction, and the edge ring is provided on the side of the airway layer away from the temperature regulating layer.
[0018] In some embodiments, the semiconductor device further includes an edge heat conducting layer, wherein the edge heat conducting layer is located between the edge ring and the base along the first direction.
[0019] In some embodiments, the semiconductor device further includes an insulating ring and an electric field induction component, wherein the insulating ring surrounds the base, a portion of the edge ring is located on the base, and another portion is located on the insulating ring, and the electric field induction component extends into the insulating ring along the first direction and is located on one side of the edge ring along the first direction.
[0020] In some embodiments, the semiconductor device includes a plasma device.
[0021] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present application, nor is it intended to limit the scope of the present application. Other features of the present application will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] Other features, objects, and advantages of the present application will become more apparent by reading the detailed description of the non-limiting embodiments made with reference to the following drawings. The drawings are provided for a better understanding of the present invention and do not constitute a limitation of the present application. In the drawings:
[0023] Figure 1 is a schematic cross-sectional view of a base according to one embodiment of the present application;
[0024] Figure 2 is a schematic cross-sectional view of a base according to another embodiment of the present application;
[0025] Figure 3 is a schematic cross-sectional view of a wafer chuck according to one embodiment of the present application; and
[0026] Figure 4 is a schematic cross-sectional view of a semiconductor device according to one embodiment of the present application.
[0027] Reference numerals:
[0028] 100, wafer chuck; 110, base; 110-1, first part;
[0029] 110-2, second portion; 111, side wall; 112, first surface; 113, second surface;
[0030] 114. Third surface; 115. Base body; 120. First temperature adjustment portion;
[0031] 121, first fluid channel; 130, second temperature adjustment unit; 131, second fluid channel;
[0032] 140, thermal insulation layer; 150, airway layer; 160, temperature regulating layer; 170, base layer;
[0033] 180, wafer carrier; 190, thermal conductive layer; 200, edge ring; 300, edge thermal conductive layer;
[0034] 400, insulating ring; 410, first sub-ring; 420, second sub-ring; 500, induction element;
[0035] 600. Wafer. DETAILED DESCRIPTION
[0036] For a better understanding of the present application, various aspects of the present application will be described in more detail with reference to the accompanying drawings. It should be understood that these detailed descriptions are merely descriptions of exemplary embodiments of the present application and are not intended to limit the scope of the present application in any way. Throughout the specification, the same reference numerals refer to the same elements. The expression "and / or" includes any and all combinations of one or more of the associated listed items.
[0037] It should be noted that in this specification, the expressions first, second, third, etc. are only used to distinguish one feature from another feature area, and do not represent any limitation on the features, and especially do not represent any order of precedence.
[0038] In the description of this application, unless otherwise specified, the terms "upper", "lower", "left", "right", "front", "back", etc., indicating directions or positional relationships, are based on the directions or positional relationships shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction. Therefore, they should not be understood as limiting this application.
[0039] Unless otherwise specified or limited, the term "connection" should be understood broadly. For example, it can mean fixed connection, detachable connection, or integral connection; it can mean direct connection or indirect connection through an intermediary. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.
[0040] In the accompanying drawings, the thickness, size, and shape of components have been slightly adjusted for ease of illustration. The accompanying drawings are for illustration only and are not drawn strictly to scale. As used herein, the terms "substantially," "approximately," and similar terms are used to indicate approximations, not degrees, and are intended to account for the inherent variations in measurements or calculations that would be recognized by one of ordinary skill in the art.
[0041] It should also be understood that expressions such as "comprises," "including," "having," "includes," and / or "comprising" are open rather than closed expressions in this specification, indicating the presence of the stated features, elements, and / or components, but do not exclude the presence of one or more other features, elements, components, and / or combinations thereof. In addition, when expressions such as "at least one of..." appear after a list of listed features, they modify the entire list of features rather than just the individual elements in the list. In addition, when describing embodiments of the present application, "may" is used to mean "one or more embodiments of the present application." And, the term "exemplary" is intended to refer to an example or illustration.
[0042] Unless otherwise defined, all words used herein (including engineering terms and scientific and technological terms) have the same meaning as commonly understood by those skilled in the art to which this application belongs. It should also be understood that, unless otherwise specified in this application, words defined in commonly used dictionaries should be interpreted as having the same meaning as they do in the context of the relevant technology, and should not be interpreted in an idealized or overly formal sense.
[0043] It should be noted that, unless otherwise specified or inconsistent with the context, the embodiments and features of the embodiments in this application may be combined with each other. Furthermore, unless expressly limited or inconsistent with the context, the specific steps included in the methods described in this application are not necessarily limited to the order in which they are described, but may be performed in any order or in parallel. The present application will be described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.
[0044] During the semiconductor device manufacturing process, processes such as etching, physical vapor deposition (PVD), chemical vapor deposition (CVD), and / or ion implantation are typically performed on a wafer to ultimately obtain a semiconductor device. The semiconductor device may include a memory array and / or peripheral circuits. The memory array may be a non-volatile memory array such as a NAND memory array, a PROM (Programmable Read-Only Memory) memory array, or a NOR memory array, or a volatile memory array such as a DRAM (Dynamic Random Access Memory) memory array or an SRAM (Static Random Access Memory) memory array, but this application does not limit this.
[0045] Taking semiconductor devices, including NAND memory arrays, as an example, the manufacturing process typically involves etching channel holes on the wafer. As the number of stacked memory array layers increases, the difficulty of etching the channel holes increases. During the etching process, the temperature of the wafer edge exposure (WEE) may be higher than that of other areas, resulting in insufficient etching of the WEE.
[0046] Based on this, an embodiment of the present application provides a wafer chuck 100 . Figure 1 and Figure 2 Schematic cross-sectional views of the base 110 according to different embodiments of the present application are respectively shown; Figure 3 FIG. 1 shows a cross-sectional view of a wafer chuck 100 according to an embodiment of the present application. Figures 1 to 3 As shown, the wafer chuck 100 includes a base 110, and the base 110 includes a base body 115, a first temperature regulating part 120, a second temperature regulating part 130 and a thermal insulation layer 140. The base body 115 has a side wall 111 extending along a first direction, the first temperature regulating part 120 is located in the base body 115, the second temperature regulating part 130 is located in the base body 115 and is located on the side of the side wall 111 of the first temperature regulating part 120 facing the base body 115 along the second direction, the thermal insulation layer 140 is located in the base body 115 and is located between the first temperature regulating part 120 and the second temperature regulating part 130 along the second direction, and the first direction intersects with the second direction.
[0047] Since a first temperature regulating portion 120 and a second temperature regulating portion 130 are provided in the base body 115 in the embodiment of the present application, and the second temperature regulating portion 130 is located on the side of the first temperature regulating portion 120 facing the side wall 111 of the base body 115, in other words, compared with the first temperature regulating portion 120, the second temperature regulating portion 130 is closer to the edge area of the base body 115. Therefore, after the wafer 600 is fixed to the base body 115 during the etching process, the second temperature regulating portion 130 is closer to the edge of the wafer 600 than the first temperature regulating portion 120. On this basis, the embodiment of the present application can significantly reduce the heat or cold transfer between the portion of the base body 115 located near the first temperature regulating part 120 and the portion of the base body 115 located near the second temperature regulating part 130 by setting a thermal insulation layer 140 between the first temperature regulating part 120 and the second temperature regulating part 130. In other words, the influence between the first temperature regulating part 120 and the second temperature regulating part 130 can be significantly reduced, so that most of the cold generated by the second temperature regulating part 130 can be transferred along the first direction, thereby effectively reducing the temperature of the WEE of the wafer 600, and further reducing the risk of insufficient etching of the WEE of the wafer 600 due to the increase in the WEE temperature of the wafer 600.
[0048] It should be noted that, in the embodiment of the present application, the first temperature regulating portion 120 and the second temperature regulating portion 130 can release cold energy to the base body 115, or can release cold energy or heat to the base body 115 according to actual needs. For example, the first temperature regulating portion 120 includes a first fluid channel 121, and the second temperature regulating portion 130 includes a second fluid channel 131, and the first fluid channel 121 and the second fluid channel 131 are both disposed within the base body 115. When a refrigerant such as cold salt water is passed through the first fluid channel 121 and the second fluid channel 131, the first temperature regulating portion 120 and the second temperature regulating portion 130 release cold energy to the base body 115, and the cold energy absorbed by the base body 115 can be transferred to the wafer 600 placed on the base 110, thereby reducing the temperature of the wafer 600. When a heat medium such as hot brine is introduced into the first fluid channel 121 and the second fluid channel 131, the first temperature regulating part 120 and the second temperature regulating part 130 release heat to the base body 115, and the heat absorbed by the base body 115 can be transferred to the wafer 600, so that the temperature of the wafer 600 increases. In some other embodiments, the first temperature regulating part 120 and the second temperature regulating part 130 can also be semiconductor refrigeration plates. In addition, the intersection of the first direction and the second direction in the above text can generally be understood as an angle between the first direction and the second direction. For example, the first direction and the second direction are perpendicular or approximately perpendicular to each other. As an example, in an embodiment of the present application, the first direction can be the z direction in the accompanying drawings, that is, the axial direction of the wafer 600, and the second direction can be the x direction in the accompanying drawings, that is, the radial direction of the wafer 600.
[0049] In some embodiments, combined Figure 1 and Figure 3 As shown, the wafer chuck 100 includes a base 110 and a wafer carrier 180, with the wafer carrier 180 located on one side of the base 110 in a first direction. The wafer carrier 180 is used to support a wafer 600, which can be fixed to a side of the wafer carrier 180 facing away from the base 110. The base body 115 of the base 110 can be made of, but not limited to, a metal such as aluminum, and the wafer carrier 180 can be made of, but not limited to, a high- and low-temperature resistant material such as ceramic. The ceramic material includes at least one of aluminum oxide, aluminum nitride, silicon oxide, silicon carbide, silicon nitride, titanium oxide, and zirconium oxide. As an example, the size of the base 110 along the second direction is greater than the size of the wafer carrier 180 along the second direction. In other words, the projected area of the base 110 on a plane perpendicular to the first direction is greater than the projected area of the wafer carrier 180.
[0050] As an example, the wafer chuck 100 may further include a thermally conductive layer 190, which is located between the wafer carrier 180 and the base 110 in the first direction. The material of the thermally conductive layer 190 may include, but is not limited to, an aluminum-based thermally conductive adhesive or a brazing material. In the embodiments of the present application, by providing the thermally conductive layer 190 between the wafer carrier 180 and the base 110, the efficiency of heat or cold transfer between the wafer carrier 180 and the base body 115 can be improved, while also avoiding heat or cold loss due to a gap between the wafer carrier 180 and the base body 115.
[0051] In some embodiments, the base body 115 may include a first portion 110-1 and a second portion 110-2, wherein the second portion 110-2 surrounds the first portion 110-1, and the size of the second portion 110-2 along the first direction is smaller than the size of the first portion 110-1 along the first direction. The first temperature adjustment portion 120 is located within the first portion 110-1, and the second temperature adjustment portion 130 is located within the second portion 110-2. The first portion 110-1 and the second portion 110-2 may be integrally formed. As an example, the thermal insulation layer 140 may be located within the second portion 110-2, and the size of the thermal insulation layer 140 along the first direction may be equal to or smaller than the size of the second portion 110-2 along the first direction. In other embodiments, the thermal insulation layer 140 may also be disposed within the first portion 110-1. The material of the thermal insulation layer 140 may include, but is not limited to, thermal insulation materials such as aerogel felt, metallized polyester, or ultra-fine glass wool.
[0052] like Figure 3As shown, a heat-conducting layer 190 is disposed on one side of the first portion 110-1 of the base body 115 along a first direction, and a wafer carrier 180 is disposed on the side of the heat-conducting layer 190 facing away from the first portion 110-1. The second portion 110-2 of the base body 115 has a larger dimension along the second direction than the wafer 600, and the dimension of the wafer 600 along the second direction is larger than the dimension of the first portion 110-1 of the base body 115 along the second direction. Therefore, when the wafer 600 is secured to the surface of the wafer carrier 180 facing away from the heat-conducting layer 190 during the etching process, the edge of the wafer 600 protrudes beyond the first portion 110-1. The first temperature regulating portion 120 is located directly below the wafer 600 along the first direction, and the second temperature regulating portion 130 is located diagonally below the wafer 600. In the second direction, the second temperature regulating portion 130 is adjacent to the edge of the wafer 600. When the wafer 600 needs to be cooled, the cold energy generated by the first temperature regulating part 120 can be directly transferred to the wafer 600 through the heat conductive layer 190 and the wafer carrier 180 in sequence. Since a thermal insulation layer 140 is provided between the first temperature regulating part 120 and the second temperature regulating part 130, almost no heat is transferred from the wafer 600 to the first part 110-1 or only a small part is transferred to the second part 110-2. Therefore, most of the cold energy generated by the second temperature regulating part 130 can be transferred along the first direction and released to the edge of the wafer 600, thereby effectively reducing the temperature of the WEE of the wafer 600, and further reducing the risk of insufficient etching of the WEE of the wafer 600 due to the increase in the temperature of the WEE of the wafer 600.
[0053] As an example, Figure 2 As shown, the base body 115 further has a first surface 112, a second surface 113, and a third surface 114. The second surface 113 surrounds the first surface 112. The first surface 112 and the third surface 114 are disposed opposite each other along the first direction. The second surface 113 and the third surface 114 are disposed opposite each other along the first direction. The spacing between the first surface 112 and the third surface 114 in the first direction is greater than the spacing between the second surface 113 and the third surface 114 in the first direction. The first temperature regulating portion 120 is located between the first surface 112 and the third surface 114 in the first direction, and the second temperature regulating portion 130 is located between the second surface 113 and the third surface 114 in the first direction. As an example, the thermal insulation layer 140 may be located between the second surface 113 and the third surface 114 in the first direction.
[0054] In some embodiments, as Figure 2As shown, the base body 115 includes an air channel layer 150, a temperature regulating layer 160, and a base layer 170. The temperature regulating layer 160 is located on one side of the air channel layer 150 along the first direction, and the base layer 170 is located on the side of the temperature regulating layer 160 facing away from the air channel layer 150 along the first direction. The temperature regulating layer 160 includes a first temperature regulating portion 120, a second temperature regulating portion 130, and a thermal insulation layer 140. By way of example, the first temperature regulating portion 120 includes a first fluid channel 121, and the second temperature regulating portion 130 includes a second fluid channel 131. The first fluid channel 121 and / or the second fluid channel 131 extend from the side of the temperature regulating layer 160 facing away from the air channel layer 150 along the first direction into the temperature regulating layer 160. For example, both the first fluid channel 121 and the second fluid channel 131 extend from the side of the temperature regulating layer 160 facing away from the air channel layer 150 along the first direction into the temperature regulating layer 160. Thus, after the temperature-regulating layer 160 is secured to the base layer 170, the base layer 170 can function to seal the first fluid channel 121 and the second fluid channel 131. The first and second fluid channels 121, 131 may include, but are not limited to, serpentine, annular, or curved channels. Furthermore, to further minimize the interaction between the first and second temperature-regulating sections 120, 130, the dimension of the thermal insulation layer 140 along the first direction is greater than or equal to the dimension of the second fluid channel 131 along the first direction.
[0055] In some embodiments, the air channel layer 150 has a gas channel (not shown). As an example, one end of the gas channel extends along a first direction through the surface of the air channel layer 150 facing away from the temperature adjustment layer 160, and the other end of the gas channel is connected to the outside world. For example, when a wafer carrier 180 is provided on one side of the base 110, the gas channel can extend through the air channel layer 150 along the first direction, and a first channel is provided in the wafer carrier 180 that is connected to the gas channel and extends through the wafer carrier 180. A second channel is provided in the temperature adjustment layer 160, with one end of the second channel connected to the end of the gas channel away from the first channel, and the other end of the second channel extends through the side wall 111 of the temperature adjustment layer 160. Therefore, after the wafer 600 is placed on the surface of the wafer carrier 180 facing away from the base 110, the gap between the wafer 600 and the wafer carrier 180 can be connected to the outside world, that is, the process chamber where the wafer chuck 100 is located, through the first channel, the gas channel and the second channel. The process gas in the process chamber can quickly enter the gap between the wafer 600 and the wafer carrier 180 through the above-mentioned channels, or the gas in the gap between the wafer 600 and the wafer carrier 180 can quickly enter the process chamber, so that the air pressure in the gap between the wafer 600 and the wafer carrier 180 can be basically consistent with the air pressure in the process chamber.
[0056] like Figure 3 and Figure 4As shown, the embodiment of the present application further provides a semiconductor device, which includes a wafer chuck 100 and an edge ring 200. The wafer chuck 100 includes a base 110, and the base 110 includes a base body 115, a first temperature regulating portion 120, a second temperature regulating portion 130 and a temperature insulation layer 140. The base body 115 has a side wall 111 extending along a first direction. The first temperature regulating portion 120 is located in the base body 115, and the second temperature regulating portion 130 is located in the base body 115. 5 and is located along the second direction on a side of the sidewall 111 of the first temperature regulating portion 120 facing the base body 115. The thermal insulation layer 140 is located within the base body 115 and between the first temperature regulating portion 120 and the second temperature regulating portion 130 along the second direction. The edge ring 200 is disposed on the base body 115 and is located along the first direction on a side of the second temperature regulating portion 130. The first temperature regulating portion 120 is located on a side of the inner sidewall 111 of the edge ring 200 facing away from the second temperature regulating portion 130.
[0057] After wafer 600 is secured to base body 115 during the etching process, the edge of wafer 600 is adjacent to edge ring 200, and second temperature regulating portion 130 is located on one side of edge ring 200 along the first direction. Therefore, second temperature regulating portion 130 is closer to the edge of wafer 600 than first temperature regulating portion 120. Based on this, the present embodiment of the present application provides a thermal insulation layer 140 between first temperature regulating portion 120 and second temperature regulating portion 130. This significantly reduces heat or cold transfer between the portion of base body 115 near first temperature regulating portion 120 and the portion of base body 115 near second temperature regulating portion 130. In other words, the mutual influence between first temperature regulating portion 120 and second temperature regulating portion 130 is significantly reduced, allowing most of the cold generated by second temperature regulating portion 130 to be transferred along the first direction to edge ring 200, thereby effectively reducing the WEE temperature of wafer 600.
[0058] In some embodiments, the semiconductor device may further include an edge thermal conductive layer 300, which is positioned between the edge ring 200 and the base 110 in a first direction. The material of the edge thermal conductive layer 300 may include, but is not limited to, aluminum-based thermal conductive adhesive or brazing material, and the material of the edge ring 200 may include, but is not limited to, ceramic. In the embodiments of the present application, by providing the edge thermal conductive layer 300 between the edge ring 200 and the base 110, the efficiency of heat or cold transfer between the base 110 and the edge ring 200 is improved, while also preventing heat or cold loss due to a gap between the base 110 and the edge ring 200. In addition, since the embodiment of the present application sets a thermal insulation layer 140 between the first temperature regulating part 120 and the second temperature regulating part 130, even if the thermal conductivity of the edge heat conductive layer 300 gradually deteriorates over time, the presence of the thermal insulation layer 140 can significantly reduce the heat or cold transfer between the portion of the base body 115 located near the first temperature regulating part 120 and the portion of the base body 115 located near the second temperature regulating part 130, so that most of the cold generated by the second temperature regulating part 130 can be transferred to the edge ring 200 along the first direction, thereby still effectively reducing the temperature of the WEE of the wafer 600.
[0059] In some embodiments, the semiconductor device may further include an insulating ring 400 and an electric field induction element 500. The insulating ring 400 surrounds the base 110. In the second direction, a portion of the edge ring 200 is located on the base 110, and another portion of the edge is located on the insulating ring 400. The electric field induction element 500 extends into the insulating ring 400 along the first direction and is located on one side of the edge ring 200 along the first direction. The insulating ring 400 may be made of, but is not limited to, ceramic. The electric field induction element 500 may be electrically connected to a radio frequency (RF) power supply. The electric field generated by the electric field induction element 500 may affect parameters such as capacitance and reactance of the edge ring 200, thereby affecting the plasma concentration near the edge ring 200, i.e., near the edge of the wafer 600.
[0060] As an example, the insulating ring 400 may include a first sub-ring 410 and a second sub-ring 420, the first sub-ring 410 being located on a side of the second sub-ring 420 facing the edge ring 200 along the first direction, the first sub-ring 410 and the second sub-ring 420 both surrounding the base 110, at least a portion of the second sub-ring 420 away from the first sub-ring 410 being located on a side of the base 110 away from the edge ring 200 along the first direction, and the electric field induction component 500 passing through the second sub-ring 420 along the first direction and extending into the first sub-ring 410.
[0061] As described above, the base body 115 may include a first portion 110-1 and a second portion 110-2. The second portion 110-2 surrounds the first portion 110-1, and the dimension of the second portion 110-2 along the first direction is smaller than the dimension of the first portion 110-1 along the first direction. The first temperature regulating portion 120 is located within the first portion 110-1, the second temperature regulating portion 130 is located within the second portion 110-2, and the edge ring 200 is disposed in the second portion 110-2 and surrounds the first portion 110-1. The thermal insulation layer 140 may be, but is not limited to, located within the second portion 110-2.
[0062] As an example, the base body 115 further includes a first surface 112, a second surface 113, and a third surface 114. The second surface 113 surrounds the first surface 112. The first surface 112 and the third surface 114 are disposed opposite each other along the first direction. The second surface 113 and the third surface 114 are disposed opposite each other along the first direction. The spacing between the first surface 112 and the third surface 114 in the first direction is greater than the spacing between the second surface 113 and the third surface 114 in the first direction. The first temperature regulating portion 120 is located between the first surface 112 and the third surface 114 in the first direction. The second temperature regulating portion 130 is located between the second surface 113 and the third surface 114 in the first direction. The edge ring 200 is located on the second surface 113. The thermal insulation layer 140 may be located between the second surface 113 and the third surface 114 in the first direction.
[0063] In some embodiments, the base body 115 includes an air channel layer 150, a temperature regulating layer 160, and a base layer 170. The temperature regulating layer 160 is located on one side of the air channel layer 150 along a first direction, and the base layer 170 is located on a side of the temperature regulating layer 160 away from the air channel layer 150 along the first direction. The temperature regulating layer 160 is provided with a first temperature regulating portion 120, a second temperature regulating portion 130, and a thermal insulation layer 140. The edge ring 200 is provided on a side of the air channel layer 150 away from the temperature regulating layer 160.
[0064] It should be noted that the semiconductor device of the embodiments of the present application may include, but is not limited to, a plasma device. As an example, the semiconductor device may further include a first electrode (not shown), the first electrode being spaced apart from and opposite to the base 110 in a first direction, and the first electrode and the base body 115 being electrically connected to a radio frequency power supply. In this case, the first electrode may be referred to as an upper electrode, and the base body 115 may be referred to as a lower electrode. An electric field is formed between the upper and lower electrodes, and the process gas may form a plasma under the excitation of the electric field.
[0065] The above specific embodiments do not limit the scope of protection of this application. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application shall be included within the scope of protection of this application.
Claims
1. A wafer chuck comprising a base; in, The base comprises: The base body has a side wall extending along a first direction; A first temperature regulating part is located in the base body; a second temperature regulating portion, located in the base body and located on a side of the first temperature regulating portion facing the side wall along a second direction; and The temperature insulating layer is located in the base body and between the first temperature regulating part and the second temperature regulating part along the second direction, and the first direction intersects with the second direction.
2. The wafer chuck according to claim 1, wherein: The base body comprises: Part I; and a second portion surrounding the first portion, wherein a dimension of the second portion along the first direction is smaller than a dimension of the first portion along the first direction; The first temperature regulating part is located in the first portion, and the second temperature regulating part is located in the second portion.
3. The wafer chuck according to claim 2, wherein: The thermal insulation layer is located in the second portion.
4. The wafer chuck according to claim 1, wherein: The base body further comprises a first surface, a second surface and a third surface, wherein the second surface surrounds the first surface, the first surface and the third surface are disposed opposite to each other along the first direction, the second surface and the third surface are disposed opposite to each other along the first direction, and the distance between the first surface and the third surface in the first direction is greater than the distance between the second surface and the third surface in the first direction; The first temperature regulating portion is located between the first surface and the third surface along the first direction, and the second temperature regulating portion is located between the second surface and the third surface along the first direction.
5. The wafer chuck according to claim 4, wherein: The temperature insulation layer is located between the second surface and the third surface along the first direction.
6. The wafer chuck according to claim 1, wherein: The base body comprises: an airway layer having gas channels therein; a temperature regulating layer, located on one side of the air channel layer along the first direction, wherein the first temperature regulating portion, the second temperature regulating portion, and the temperature insulating layer are provided in the temperature regulating layer; and The base layer is located along the first direction on a side of the temperature regulating layer facing away from the air channel layer.
7. The wafer chuck according to claim 6, wherein: The first temperature regulating portion includes a first fluid channel, and the second temperature regulating portion includes a second fluid channel. The first fluid channel and / or the second fluid channel extend from a side of the temperature regulating layer away from the air channel layer along the first direction into the temperature regulating layer.
8. The wafer chuck according to claim 7, wherein: A dimension of the temperature insulation layer along the first direction is greater than or equal to a dimension of the second fluid channel along the first direction.
9. A semiconductor device comprising: A wafer chuck includes a base, wherein the base includes: The base body has a side wall extending along a first direction; A first temperature regulating part is located in the base body; a second temperature regulating portion located within the base body and located on a side of the first temperature regulating portion facing the side wall along a second direction; and a temperature insulating layer located within the base body and located between the first temperature regulating portion and the second temperature regulating portion along the second direction, the first direction intersecting the second direction; The edge ring is provided on the base body and is located on one side of the second temperature regulating portion along the first direction. The first temperature regulating portion is located on a side of the inner sidewall of the edge ring away from the second temperature regulating portion.
10. The semiconductor device according to claim 9, wherein The base body comprises: Part I; and a second portion surrounding the first portion, wherein a dimension of the second portion along the first direction is smaller than a dimension of the first portion along the first direction; The first temperature regulating portion is located in the first part, the second temperature regulating portion is located in the second part, and the edge ring is arranged in the second part and surrounds the first part.
11. The semiconductor device according to claim 10, wherein: The thermal insulation layer is located in the second portion.
12. The semiconductor device according to claim 9, wherein The base body further comprises a first surface, a second surface and a third surface, wherein the second surface surrounds the first surface, the first surface and the third surface are disposed opposite to each other along the first direction, the second surface and the third surface are disposed opposite to each other along the first direction, and the distance between the first surface and the third surface in the first direction is greater than the distance between the second surface and the third surface in the first direction; The first temperature regulating portion is located between the first surface and the third surface along the first direction, the second temperature regulating portion is located between the second surface and the third surface along the first direction, and the edge ring is located on the second surface.
13. The semiconductor device according to claim 12, wherein: The temperature insulation layer is located between the second surface and the third surface along the first direction.
14. The semiconductor device according to claim 9, wherein The base body comprises: an airway layer having gas channels therein; a temperature regulating layer, located on one side of the air channel layer along the first direction, wherein the first temperature regulating portion, the second temperature regulating portion, and the temperature insulating layer are provided in the temperature regulating layer; and a base layer, located along the first direction on a side of the temperature regulating layer facing away from the airway layer; Wherein, the edge ring is arranged on a side of the air channel layer away from the temperature adjustment layer.
15. The semiconductor device according to any one of claims 9 to 14, wherein: The semiconductor device further includes: An edge heat conducting layer is located between the edge ring and the base along the first direction.
16. The semiconductor device according to any one of claims 9 to 14, wherein: The semiconductor device further includes: an insulating ring surrounding the base, wherein a portion of the edge ring is located on the base and another portion is located on the insulating ring; and The electric field induction component extends into the insulating ring along the first direction and is located on one side of the edge ring along the first direction.
17. The semiconductor device according to any one of claims 9 to 14, wherein: The semiconductor device includes a plasma device.