Detection device for position of servo system

Abstract

The utility model discloses a servo system position detection device which comprises a signal acquisition circuit, a signal conditioning circuit, an analog-to-digital conversion circuit, a data analysis circuit, a data reading circuit and a display circuit. The input end of the signal acquisition circuit is connected with a detection interface of the servo system, the output end of the signal acquisition circuit is connected with the input end of the signal conditioning circuit, and the output end of the signal conditioning circuit is connected with the input end of the analog-to-digital conversion circuit. The output end of the analog-to-digital conversion circuit is connected with the input end of the data analysis circuit, the output end of the data analysis circuit is connected with the input end of the data reading circuit, and the output end of the data reading circuit is connected with the display circuit. Through mutual connection of a plurality of circuits, the position information of the servo system is acquired and displayed, and the problems of long detection time and low detection efficiency of position detection equipment in the prior art are solved.

Description

Technical Field

[0001] The utility model belongs to the technical field of servo control, and in particular relates to a detection device for the position of a servo system. Background Art

[0002] Launchers create a smoke screen within a specific area of ​​the air, disrupting enemy electro-optical reconnaissance and air-to-ground precision-guided weapon attacks, shielding key friendly military targets and improving the survivability of friendly ground targets under airstrike. These launchers typically utilize a servo system to control their elevation, azimuth, and gun position. To ensure safe and reliable operation, position detection within the servo system is crucial.

[0003] The prior art lacks specialized position detection equipment for testing the angular position of the launch vehicle's servo system. The Synopsys Design Constraints (SDC) position decoding chip within the launch vehicle's servo system uses a 14-bit binary code with low conversion accuracy, making it impossible to guarantee whether the detected position angle has deviated. When testing the servo system, equipment manufacturers often use large, inconvenient position detection equipment. The testing method is relatively complex, requiring specialized personnel, and the testing process is time-consuming and inefficient, significantly impacting equipment maintenance and use. Utility Model Content

[0004] The utility model provides a servo system position detection device to solve the problems of the existing detection device being large in size, inconvenient to carry and having low conversion accuracy.

[0005] According to one aspect of the present utility model, a device for detecting the position of a servo system is provided, comprising: a signal acquisition circuit, a signal conditioning circuit, an analog-to-digital conversion circuit, a data analysis circuit, a data reading circuit, and a display circuit; an input end of the signal acquisition circuit is connected to a detection interface of the servo system, an output end of the signal acquisition circuit is connected to an input end of the signal conditioning circuit, an output end of the signal conditioning circuit is connected to an input end of the analog-to-digital conversion circuit, an output end of the analog-to-digital conversion circuit is connected to an input end of the data analysis circuit, an output end of the data analysis circuit is connected to an input end of the data reading circuit, and an output end of the data reading circuit is connected to the display circuit;

[0006] The signal acquisition circuit is used to acquire an analog signal containing position detection information output by the detection interface of the servo system through an input end of the signal acquisition circuit, and transmit the analog signal to the signal conditioning circuit through an output end of the signal acquisition circuit;

[0007] The signal conditioning circuit is configured to receive the analog signal through an input terminal of the signal conditioning circuit, obtain a conditioned signal through the signal conditioning circuit, and transmit the conditioned signal to the analog-to-digital conversion circuit through an output terminal of the signal conditioning circuit;

[0008] The analog-to-digital conversion circuit is configured to receive the conditioned signal through an input terminal of the analog-to-digital conversion circuit, convert the conditioned signal into a digital signal, and transmit the digital signal to the data analysis circuit through an output terminal of the analog-to-digital conversion circuit;

[0009] The data analysis circuit is configured to receive the digital signal in a time sequence through an input terminal of the data analysis circuit, obtain analysis data through the data analysis circuit, and upload the analysis data to the data reading circuit through an output terminal of the data analysis circuit;

[0010] The data reading circuit is configured to receive the analysis data through an input terminal of the data reading circuit and transmit the analysis data to the display circuit through an output terminal of the data reading circuit;

[0011] The display circuit is used to receive the analysis data and display the analysis data on a display screen.

[0012] Optionally, the signal acquisition circuit is a voltage divider network, and the voltage divider network is composed of 24 voltage divider circuits.

[0013] Optionally, the signal acquisition circuit includes a diode circuit, a resistor circuit, an operational amplifier, and a power supply;

[0014] The first end of the diode circuit is connected to the negative electrode of the power supply, the second end of the diode circuit is connected to the positive electrode of the power supply, and the third end of the diode circuit is connected to the first end of the resistor circuit; the diode circuit includes a first diode and a second diode, the first diode and the second diode are connected in series, the first diode is located at the first end of the diode circuit, and the second diode is located at the second end of the diode circuit;

[0015] The resistance circuit includes a first resistor, a second resistor, and a third resistor. The first resistor and the second resistor are connected in series and in parallel with the third resistor. The first resistor is located at the second end of the resistance circuit, the third resistor is located at the third end of the resistance circuit, and the second resistor is located at the fourth end of the resistance circuit. The second end of the resistance circuit is connected to the detection interface of the servo system, the third end of the resistance circuit is grounded, and the fourth end of the resistance circuit is connected to the input end of the operational amplifier.

[0016] The output terminal of the operational amplifier is connected to the input terminal of the signal conditioning circuit;

[0017] The power supply is used to supply power to the signal acquisition circuit.

[0018] Optionally, the signal conditioning circuit includes a non-inverting operational amplifier, a fully differential attenuation amplifier, and a filtering circuit;

[0019] The input end of the non-inverting operational amplifier is connected to the output end of the operational amplifier, and the output end of the non-inverting operational amplifier is connected to the input end of the fully differential attenuation amplifier;

[0020] The output end of the fully differential attenuation amplifier is connected to the input end of the filter circuit;

[0021] The output end of the filter circuit is connected to the input end of the analog-to-digital conversion circuit.

[0022] Optionally, the in-phase operational amplifier is AD8620, the fully differential attenuation amplifier is AD8475, and the analog-to-digital conversion circuit is MS5182N or MS5189N.

[0023] Optionally, a gigabit network transformer and an Ethernet interface are further included between the data analysis circuit and the data reading circuit;

[0024] The output end of the data analysis circuit is connected to the input end of the data reading circuit, specifically:

[0025] The output end of the data analysis circuit is connected to the input end of the gigabit network transformer; the output end of the gigabit network transformer is connected to the input end of the Ethernet interface;

[0026] The output end of the Ethernet is connected to the input end of the data reading circuit.

[0027] Optionally, the Ethernet interface is connected to the data reading circuit via a local area network.

[0028] Optionally, the output end of the data analysis circuit is provided with a PHY pin for sending the processed signal to the gigabit network transformer.

[0029] Optionally, the gigabit network transformer is ZXGE-240-R.

[0030] Optionally, the data analysis circuit uses an XC7A100TFGG484ABX2101 chip, and the data reading circuit uses an RK3399pro chip.

[0031] Compared with the prior art, the utility model has the following advantages:

[0032] The present invention connects multiple circuits to collect status signals related to the servo system's position, and after conditioning, analog-to-digital conversion, analysis, and reading, displays them on a display screen. This allows personnel to monitor the servo system's position status online by observing the information displayed on the screen, providing a basis for servo system performance analysis, condition monitoring, and condition-based maintenance of the transmitter equipment. This is of great significance for improving equipment reliability and technical support capabilities. Furthermore, the present invention utilizes a structural approach that combines a data analysis circuit with a data reading circuit, shortening detection time and significantly improving detection efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 It is a structural diagram of a detection device for the position of a servo system of the present utility model.

[0034] Figure 2 The utility model is a structural diagram of a signal acquisition circuit of a servo system position detection device.

[0035] Figure 3 The utility model is a structural diagram of a signal conditioning circuit of a servo system position detection device.

[0036] Figure 4 This is a detection device for the position of the servo system of the utility model Figure 5 1 is a schematic structural diagram of an amplifier circuit including a non-inverting operational amplifier 121 and a fully differential attenuation amplifier 122 .

[0037] Figure 5 The utility model is a schematic diagram of the structure of the filter circuit of the detection device of the servo system position.

[0038] Figure 6 The utility model is a schematic diagram of the specific structure between the data analysis circuit and the data reading circuit of the detection device of the servo system position. DETAILED DESCRIPTION

[0039] The present invention will be further described in detail below in conjunction with the embodiments and drawings, but the implementation methods of the present invention are not limited thereto.

[0040] Existing launch equipment uses a servo system to control the launcher's elevation and azimuth. This system offers advantages such as simple structure, excellent speed regulation, and stable and reliable operation. To ensure safe and reliable operation, position detection in the servo system is crucial. The control performance of a launch vehicle's servo system is primarily influenced by its position, velocity, and current loops. The accuracy of position information is crucial for ensuring system stability and reliability. Therefore, accurately detecting the position information of a launch vehicle's servo system and monitoring its position status and changing trends in real time are crucial for reliable operation.

[0041] Currently, position detection for servo systems, both domestically and internationally, primarily focuses on detecting the position of servo motors. Most existing servo motor integrated testing equipment, consisting of a testing console and a test bench, only detects faults in a single servo system component. These devices are bulky and difficult to move, primarily used by manufacturers for product commissioning or centralized repair and inspection. This leads to lengthy testing cycles and inconvenience.

[0042] For the above questions, please refer to Figure 1 The present invention proposes a device 100 for detecting the position of a servo system 190. The device 100 for detecting the position of the servo system 190 includes: a signal acquisition circuit 110, a signal conditioning circuit 120, an analog-to-digital conversion circuit 130, a data analysis circuit 140, a data reading circuit 150, and a display circuit 160; the input end of the signal acquisition circuit 110 is connected to the detection interface of the servo system 190, the output end of the signal acquisition circuit 110 is connected to the input end of the signal conditioning circuit 120, the output end of the signal conditioning circuit 120 is connected to the input end of the analog-to-digital conversion circuit 130, the output end 130 of the analog-to-digital conversion circuit is connected to the input end of the data analysis circuit 140, the output end of the data analysis circuit 140 is connected to the input end of the data reading circuit 150, and the output end of the data reading circuit 150 is connected to the display circuit 160;

[0043] The signal acquisition circuit 110 is configured to acquire an analog signal having position detection information output by the detection interface of the servo system 190 through an input terminal of the signal acquisition circuit 110 , and transmit the analog signal to the signal conditioning circuit 120 through an output terminal of the signal acquisition circuit 110 ;

[0044] The signal conditioning circuit 120 is configured to receive the analog signal through an input terminal of the signal conditioning circuit 120 , obtain a conditioned signal through the signal conditioning circuit 120 , and transmit the conditioned signal to the analog-to-digital conversion circuit 130 through an output terminal of the signal conditioning circuit 120 ;

[0045] The analog-to-digital conversion circuit 130 is configured to receive the conditioned signal through an input terminal of the analog-to-digital conversion circuit 130 , convert the conditioned signal into a digital signal, and transmit the digital signal to the data analysis circuit 140 through an output terminal of the analog-to-digital conversion circuit 130 ;

[0046] The data analysis circuit 140 is configured to receive the digital signal in a time sequence through the input terminal of the data analysis circuit 140 , obtain analysis data through the data analysis circuit 140 , and upload the analysis data to the data reading circuit 150 through the output terminal 140 of the data analysis circuit;

[0047] The data reading circuit 150 is configured to receive the analysis data through an input terminal of the data reading circuit 150 and transmit the analysis data to the display circuit 160 through an output terminal of the data reading circuit 150 ;

[0048] The display circuit 160 is configured to receive the analysis data and display the analysis data on a display screen.

[0049] Since the present invention requires testing the forward and backward shooting direction and elevation position of the servo system 190 in the transmitter, it is necessary to test the static error angle values ​​of the forward and backward shooting direction and elevation servo system 190 at various positions, the dynamic response index of the shooting direction reversal, and the error angle value after the reversal. These test indicators reflect the performance of the servo system 190 in various aspects during constant speed and acceleration (forward or reverse rotation of the motor). Therefore, based on the above requirements, the performance indicators of the transmitter can be set as follows: the detection interface of the servo system 190 outputs a 400Hz / 36V analog voltage signal, the analog voltage value acquisition range is 0-36V, the maximum data sampling rate is not less than 200kSPS, and the analog data sampling accuracy error is not higher than 0.1%V.

[0050] Signal acquisition circuit 110 is typically a voltage divider network consisting of 24 voltage divider circuits. For servo system 190, the output signal is high impedance, so overvoltage protection is required. The 36V signal output from the servo system's 190 detection interface is divided down to a 5V signal. This 5V signal, which contains noise and interference, cannot be used directly and requires conditioning before use. Therefore, the voltage divider circuit transmits the converted 5V signal to signal conditioning module 120 for appropriate conditioning.

[0051] like Figure 2 As shown, the signal acquisition circuit 110 includes a diode circuit 111, a resistor circuit 112, an operational amplifier 113, and a power supply 114;

[0052] A first end of the diode circuit 111 is connected to the negative electrode of the power supply 114, a second end of the diode circuit 111 is connected to the positive electrode of the power supply 114, and a third end of the diode circuit 111 is connected to the first end of the resistor circuit 112. The diode circuit 111 includes a first diode 111-1 and a second diode 111-2. The first diode 111-1 and the second diode 111-2 are connected in series. The first diode 111-1 is located at the first end of the diode circuit 111, and the second diode 111-2 is located at the second end of the diode circuit 111.

[0053] The resistance circuit 112 includes a first resistor 112-1, a second resistor 112-2, and a third resistor 112-3. The first resistor 112-1 and the second resistor 112-2 are connected in series and in parallel with the third resistor 112-3. The first resistor 112-1 is located at the second end of the resistance circuit 112, the third resistor 112-2 is located at the third end of the resistance circuit 112, and the second resistor 112-2 is located at the fourth end of the resistance circuit 112. The second end of the resistance circuit 112 is connected to the detection interface of the servo system 190, the third end of the resistance circuit 112 is grounded, and the fourth end of the resistance circuit is connected to the input end of the operational amplifier 113; the output end of the operational amplifier 113 is connected to the input end of the signal conditioning circuit 120; and the power supply 114 is used to power the signal acquisition circuit.

[0054] In the process of signal conditioning, it is necessary to consider the signal follow-up amplification, single-ended differential conversion, and filtering. Therefore, if Figure 3 As shown, the signal conditioning circuit 120 mainly includes a non-inverting operational amplifier 121, a fully differential attenuating amplifier 122, and a filter circuit 123. The input of the non-inverting operational amplifier 121 is connected to the output of the operational amplifier 113, the input of the non-inverting operational amplifier 121 is connected to the output of the operational amplifier 113, and the output of the non-inverting operational amplifier 121 is connected to the input of the fully differential attenuating amplifier 122; the output of the fully differential attenuating amplifier 122 is connected to the input of the filter circuit 123; and the output of the filter circuit 123 is connected to the input of the analog-to-digital conversion circuit 130. After passing through the operational amplifier 113 in the signal acquisition circuit 110, the analog signal is transmitted to the non-inverting operational amplifier 121 in the signal conditioning circuit 120 to increase the input impedance and follow the amplification, and then transmitted to the fully differential attenuation amplifier 122 to obtain a differential signal and common-mode voltage suitable for the analog-to-digital conversion circuit 130. Then, in order to reduce the aliasing effect and high-frequency noise of the poor signal, the above-mentioned differential signal and common-mode voltage need to be transmitted to the filtering circuit 123 for filtering processing.

[0055] The non-inverting operational amplifier 121 uses the AD8620 or ADA4610. (AD stands for "circuit that converts specific signals in electromechanics.") An AD circuit refers to a circuit that converts analog signals into digital signals. Currently, AD conversion is typically performed using an AD chip. The AD8620 (dual channel) is a highly precise junction field-effect transistor (JFET) input amplifier featuring ultra-low offset voltage and drift, very low input voltage and current noise, very low input bias current, and excellent bandwidth. Unlike many other JFET amplifiers, the AD8620's input bias current is very low over the entire operating temperature range. The AD8210 can stably drive capacitive loads exceeding 1000pF at unity gain in the non-inverting mode, and can easily drive larger capacitive loads at higher noise gains. Even with a 1kΩ load, the AD8620's swing voltage remains within 1.2V of the supply voltage, maximizing dynamic range even with limited supply voltages. In either inverting or noninverting gain configurations, the output slew rate is 50V / μs and settles to 0.01% accuracy in less than 600ns. The AD8620 also features high input impedance, excellent accuracy, and very high output drive capability, making it an ideal amplifier for driving the inputs of high-performance analog-to-digital converters and buffering the outputs of digital-to-analog converters.

[0056] The fully differential attenuator amplifier 122 uses the AD8475, which can provide two outputs with a phase difference of 180 degrees and equal amplitude, provide precision attenuation processing of 0.4 and 0.8, and has the functions of single-ended to differential conversion and common-mode level conversion. When powered by AVDD5V (AVDD is generally used to represent the power supply of analog circuits), the power consumption is very small. It is used for single-ended differential conversion and is suitable for the differential input range of the AD8475 analog-to-digital converter. At the same time, its output common-mode voltage (VOCM) pin adjusts the output common-mode voltage of the precision level conversion, which is also suitable for the common-mode voltage input range of the AD8475, such as Figure 4 As shown, Figure 4 1 is a schematic structural diagram of an amplifier circuit including a non-inverting operational amplifier 121 and a fully differential attenuation amplifier 122 .

[0057] Filter circuit 123, in order to reduce the aliasing effect and high-frequency noise of the bad signal, it is necessary to filter the signal after the single-ended differential conversion. A filter composed of a differential resistor-capacitor (RC) network is designed for filtering. The RC filter consists of two 10M resistors and a differential capacitor, such as Figure 5 As shown, Figure 5 This is a structural diagram of the filter circuit of the utility model.

[0058] The conditioned signal after filtering by filter circuit 123 is connected to analog-to-digital converter circuit 130 through its output terminal. Analog-to-digital converter circuit 130 is also commonly referred to as an A / D converter (A / D is often referred to as an analog-to-digital converter). When selecting an A / D converter circuit, the A / D sampling rate, transmission bandwidth, and power consumption should be comprehensively considered. The MS5182N or MS5189N chip is selected. The MS5182N / MS5189N is a 4- / 8-channel, 16-bit, charge redistribution successive approximation analog-to-digital converter. It operates from a single power supply. The MS5182N / MS5189N incorporates all the necessary components for a multichannel, low-power data acquisition system, including a true 16-bit SAR ADC with no missing codes; a 4-channel (MS5182) or 8-channel (MS5189) low-crosstalk multiplexer for configuring inputs as single-ended (with or without a ground reference), differential, or bipolar; an internal low-drift reference (selectable between 2.5V and 4.096V) and buffer; a temperature sensor; a selectable single-pole filter; and a sequencer useful when sampling multiple channels sequentially. The MS5182N / MS5189N uses a simple SPI interface for writing configuration registers and receiving conversion results. The SPI interface utilizes a separate power supply (VIO) that is set to the host logic level.

[0059] In addition to reading the data analyzed by the data analysis circuit 140 and feeding it back to the display, the data reading circuit 150 is also used to control the present invention. The data analysis circuit in the present invention mainly selects the microprocessor architecture (ARM) as the embedded microprocessor system. The operating speed of the microprocessor will have a great impact on the drawing of the position state curve of the servo system 190 detected by the present invention and the calculation of the angular position. Since the main structure of the data reading circuit 150 in the present invention is the processor ARM, the ARM mentioned later is equivalent to representing the data reading circuit 150 in the present invention. Therefore, it is very important to select a suitable control processor to improve the performance of the device and ensure the reliable operation of the device. According to the functional requirements of this device, when selecting the core processor, try to consider processors with high performance, low power consumption, and strong environmental adaptability. ARM has the characteristics of high performance, low power consumption, and strong environmental adaptability. Its most prominent advantage is its strong control ability for the interface and application program. Therefore, the present invention selects ARM as the embedded microprocessor system and uses it as the central processing unit (CPU) of the device. However, parallel transmission is required during the axis-angle conversion process, and the ARM does not provide the required parallel interface. However, the field-programmable gate array (FPGA) has advantages in data synchronization acquisition and processing capabilities, so the FPGA is selected as the second processor, that is, the data analysis circuit 140 is primarily an FPGA. Since the main structure of the data analysis circuit 140 in the present invention is a processor FPGA, the FPGA mentioned below can represent the data analysis circuit 140 in the present invention. The processor of the entire detection device of the present invention mainly adopts the form of an ARM + FPGA dual processor, which can meet the various performance requirements required by the detection device. Among them, the ARM serves as a controller to control the entire device. It is mainly used to communicate with the FPGA and the display; control various operating instructions; read the data processed by the FPGA and feedback to the display. The FPGA serves as a processor to process data. It is mainly used to configure, synchronize, and control signals; compare, analyze, calculate, and process data; process the data converted by the analog-to-digital circuit 130; program and design the decoding algorithm; and process the data after the axis-angle conversion.

[0060] Since LAN communication has low cost, high communication rate and strong anti-interference ability, FPGA and ARM use LAN communication. At the same time, since there is no control unit inside the FPGA and it cannot handle the interruption generated by the controller, the FPGA side cannot use the existing controller parallel interface, that is, the FPGA cannot be directly connected to the ARM. Considering this situation, if Figure 6 As shown, a gigabit network transformer 170 and an Ethernet interface 180 are further included between the data analysis circuit 140 and the data reading circuit 150;

[0061] The output terminal of the data analysis circuit 140 is connected to the input terminal of the data reading circuit 150, specifically:

[0062] The output end of the data analysis circuit 140 is connected to the input end of the gigabit network transformer 170; the output end of the gigabit network transformer 170 is connected to the input end of the Ethernet interface 180;

[0063] The Ethernet output terminal 180 is connected to the input terminal of the data reading circuit 150;

[0064] The output end of the gigabit network transformer 170 is connected to the input end of the Ethernet interface 180, specifically:

[0065] The output end of the data analysis circuit 140 is provided with a PHY (port physical layer) pin for sending the processed signal to the gigabit network transformer 170 .

[0066] The output end of the Ethernet interface 180 is connected to the input end of the data reading circuit 150 . Specifically, the Ethernet interface 180 is connected to the data reading circuit 150 via a local area network.

[0067] The ZXGE-240-R gigabit network transformer not only provides coupling and filtering to enhance the signal, but also isolates the voltage levels of different network devices within the network cable, preventing voltage differences from damaging the FPGA and ARM. The ARM and display circuit 160 are connected via an HDMI (High-Definition Multimedia Interface) interface.

[0068] The FPGA in the data analysis circuit 140 uses the Artix-7 series XC7A100TFGG484ABX2101 chip, with a memory interface of 1066Mb / s; an operating voltage of 1.15V-1.25V; a maximum operating frequency of 260MHz; 338 I / O ports; all I / Os support double data rate (DDR), and each I / O can perform serial to parallel or parallel to serial conversion; high-speed SPI (SPI is a synchronous serial port for direct communication between the microprocessor control unit and peripheral ICs) and BPI (parallel NOR) configuration; contains multiple configuration bits, with a speed of 6.6Gb / s-28.05Gb / s; contains 36Kb dual-port block RAM (random access memory); has a powerful clock manager; has low power consumption performance, and can be repeatedly programmed.

[0069] The ARM chip in data reading circuit 150 uses the RK3399pro, a six-core processor with a main frequency of 1.8GHz. It boasts a compact size and high processing speed. It also comes standard with 16GB of EMMC (Embedded Memory Card) memory, a 5V input voltage, and a maximum power draw of less than 8W, offering advantages such as high energy efficiency, low power consumption, and low cost. It also supports a GMAC PHY Ethernet interface for data communication with the FPGA and an HDMI output interface for connecting to the LCD (liquid crystal display) in the display module.

[0070] The display circuit 160 is primarily used to provide the interface required for human-machine operation and various interfaces required by the device. An LCD touch screen is used to provide the interface required by application software, enabling effective human-machine interaction. For user convenience, various backup interfaces are used to complete software upgrades, updates, and expansions. After receiving and analyzing data through the output end of the data reading circuit 150, the analyzed data is displayed in an intuitive manner on the LCD display screen. This allows testers to clearly understand the current position status information of the servo system 190 and the gun position angle through the displayed graphical results, allowing calibration when the position angle deviates significantly. This provides a basis for performance analysis, status monitoring, and condition-based maintenance of the servo system 190 of the launch equipment, is of great significance for improving equipment reliability and technical support capabilities, and also has significant practical value and significance in saving manpower and reducing maintenance costs.

[0071] In order to facilitate a deeper understanding of the present invention, the overall working process of the present invention is described. After the input end of the signal acquisition circuit 110 in the present invention is connected to the detection interface of the servo system 190 of the transmitting device, the signal acquisition circuit 110 collects the analog signal in the servo system 190, and the signal acquisition circuit 110 performs voltage division processing on the collected analog signal, and transmits the analog signal after voltage division processing to the signal conditioning circuit 120 circuit for signal conditioning (after amplification, differential conversion, filtering and input overvoltage protection), and transmits the conditioned signal to the analog-to-digital conversion circuit 130, and the conditioned signal is converted from an analog signal into a digital signal, and the digital signal converted by the analog-to-digital conversion circuit 130 is transmitted to via SPI. The data analysis circuit 140 configures, synchronizes, and analyzes the digital signal to obtain analysis data. The data analysis circuit 140 then transmits the analysis data to the gigabit network transformer 170. The analysis data is then transmitted to the Ethernet interface 180 through the PHY pin set at the output end of the gigabit network transformer 170. The analysis data is transmitted to the data reading circuit 150 through the local area network between the Ethernet interface 180 and the data reading circuit 150. After the data reading circuit 150 reads the transmitted data, it uploads the read analysis data to the display screen in the display circuit 160 for display. The display screen displays the current angle value and deviation of the servo system 190, the completed waveform depiction, and various status information. By observing the above information displayed on the display screen, the staff can clearly understand the current position status information of the servo system 190, which provides a basis for performance analysis, status monitoring, and condition-based maintenance of the servo system 190 of the transmitting equipment. It is of great significance to improving the reliability of the equipment and the technical support capability of the equipment. Moreover, since the utility model adopts a dual-processor ARM+FPGA structure, it shortens the detection time and improves the detection efficiency, which also has great practical value and significance.

[0072] Although the present invention is disclosed as above in terms of preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make possible changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be based on the scope defined by the claims of the present invention.

Claims

1. A servo system position detection device, characterized in that: include: Signal acquisition circuit, signal conditioning circuit, analog-to-digital conversion circuit, data analysis circuit, data reading circuit, display circuit; The input end of the signal acquisition circuit is connected to the detection interface of the servo system, the output end of the signal acquisition circuit is connected to the input end of the signal conditioning circuit, the output end of the signal conditioning circuit is connected to the input end of the analog-to-digital conversion circuit, the output end of the analog-to-digital conversion circuit is connected to the input end of the data analysis circuit, the output end of the data analysis circuit is connected to the input end of the data reading circuit, and the output end of the data reading circuit is connected to the display circuit; The signal acquisition circuit is used to acquire an analog signal containing position detection information output by the detection interface of the servo system through an input end of the signal acquisition circuit, and transmit the analog signal to the signal conditioning circuit through an output end of the signal acquisition circuit; The signal conditioning circuit is configured to receive the analog signal through an input terminal of the signal conditioning circuit, obtain a conditioned signal through the signal conditioning circuit, and transmit the conditioned signal to the analog-to-digital conversion circuit through an output terminal of the signal conditioning circuit; The analog-to-digital conversion circuit is configured to receive the conditioned signal through an input terminal of the analog-to-digital conversion circuit, convert the conditioned signal into a digital signal, and transmit the digital signal to the data analysis circuit through an output terminal of the analog-to-digital conversion circuit; The data analysis circuit is configured to receive the digital signal in a time sequence through an input terminal of the data analysis circuit, obtain analysis data through the data analysis circuit, and upload the analysis data to the data reading circuit through an output terminal of the data analysis circuit; The data reading circuit is configured to receive the analysis data through an input terminal of the data reading circuit and transmit the analysis data to the display circuit through an output terminal of the data reading circuit; The display circuit is used to receive the analysis data and display the analysis data on a display screen.

2. The device according to claim 1, characterized in that The signal acquisition circuit is a voltage divider network, and the voltage divider network is composed of 24 voltage divider circuits.

3. The device according to claim 2, characterized in that The signal acquisition circuit includes a diode circuit, a resistor circuit, an operational amplifier, and a power supply; The first end of the diode circuit is connected to the negative electrode of the power supply, the second end of the diode circuit is connected to the positive electrode of the power supply, and the third end of the diode circuit is connected to the first end of the resistor circuit; the diode circuit includes a first diode and a second diode, the first diode and the second diode are connected in series, the first diode is located at the first end of the diode circuit, and the second diode is located at the second end of the diode circuit; The resistance circuit includes a first resistor, a second resistor, and a third resistor. The first resistor and the second resistor are connected in series and in parallel with the third resistor. The first resistor is located at the second end of the resistance circuit, the third resistor is located at the third end of the resistance circuit, and the second resistor is located at the fourth end of the resistance circuit. The second end of the resistance circuit is connected to the detection interface of the servo system, the third end of the resistance circuit is grounded, and the fourth end of the resistance circuit is connected to the input end of the operational amplifier. The output terminal of the operational amplifier is connected to the input terminal of the signal conditioning circuit; The power supply is used to supply power to the signal acquisition circuit.

4. The device according to claim 3, characterized in that The signal conditioning circuit includes a common-mode operational amplifier, a fully differential attenuation amplifier, and a filter circuit; The input end of the non-inverting operational amplifier is connected to the output end of the operational amplifier, and the output end of the non-inverting operational amplifier is connected to the input end of the fully differential attenuation amplifier; The output end of the fully differential attenuation amplifier is connected to the input end of the filter circuit; The output end of the filter circuit is connected to the input end of the analog-to-digital conversion circuit.

5. The device according to claim 4, characterized in that The in-phase operational amplifier is AD8620, the fully differential attenuating amplifier is AD8475, and the analog-to-digital conversion circuit is MS5182N or MS5189N.

6. The device according to claim 1, characterized in that A gigabit network transformer and an Ethernet interface are also included between the data analysis circuit and the data reading circuit; The output end of the data analysis circuit is connected to the input end of the data reading circuit, specifically: The output end of the data analysis circuit is connected to the input end of the gigabit network transformer; the output end of the gigabit network transformer is connected to the input end of the Ethernet interface; The output end of the Ethernet is connected to the input end of the data reading circuit.

7. The device according to claim 6, characterized in that The Ethernet interface is connected to the data reading circuit via a local area network.

8. The device according to claim 6, characterized in that The output end of the data analysis circuit is provided with a PHY pin for sending the processed signal to the gigabit network transformer.

9. The device according to claim 6, characterized in that The gigabit network transformer is ZXGE-240-R.

10. The device according to claim 1, characterized in that The data analysis circuit uses the XC7A100TFGG484ABX2101 chip, and the data reading circuit uses the RK3399pro chip.

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