Active voltage-sharing circuit
Through the active voltage equalization circuit, the switching tube and the voltage stabilizing circuit are used to adjust the voltage difference of the capacitor group, which solves the problem of voltage imbalance after the electrolytic capacitors are connected in series, reduces circuit heating, and improves system efficiency and inverter stability.
Patent Information
- Application Number
- CN202422743829.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-09
- Publication Date
- 2025-09-12
- Estimated Expiration
- 2034-11-09
AI Technical Summary
In the prior art, when electrolytic capacitors are connected in series and used on a high DC bus, it is easy to cause voltage imbalance, resulting in overheating and damage to some electrolytic capacitors. In addition, the traditional voltage-equalizing resistor method has the problems of high power consumption, large heat, and inability to adjust impedance inconsistency.
An active voltage-equalizing circuit is used, and the voltage difference between the capacitor groups is dynamically adjusted through the cooperation of the first and second switching tubes (such as transistors) with the voltage stabilizing circuit, thereby reducing circuit heating and improving system efficiency.
Effectively reduce the voltage of electrolytic capacitors, reduce circuit heating, improve system efficiency, avoid capacitor bank voltage imbalance, and ensure the normal operation of the inverter.
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Figure CN223334586U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of converters, and in particular to an active voltage balancing circuit. Background Art
[0002] Electrolytic capacitors are commonly used as filter capacitors for the DC bus in power electronic equipment due to their large capacitance, high energy storage capacity, and low price. In converters like photovoltaic inverters and energy storage inverters, due to the high DC bus voltage and the common three-level topology, lower-rated voltage electrolytic capacitors are typically connected in series to the DC bus. This ensures the electrolytic capacitors withstand high DC bus voltages and provides a midpoint for the three-level topology.
[0003] Electrolytic capacitors inherently have significant leakage current, which is equivalent to connecting a smaller resistor in parallel with the capacitor. Because each electrolytic capacitor has a different leakage current, connecting them in series and then connecting them to the positive and negative DC busbars is equivalent to connecting resistors of different resistances in parallel. This can easily lead to voltage imbalance across the series-connected electrolytic capacitors over time. Especially after long-term operation, the difference in leakage current between each electrolytic capacitor increases, leading to a more severe imbalance and potentially damaging one set of electrolytic capacitors due to excessive voltage.
[0004] The traditional method is to connect equal-sized voltage-equalizing resistors in parallel at both ends of the capacitor group, such as Figure 1 As shown. The resistance of the equalizing resistor is determined by the leakage current value of the capacitor group. The current flowing through the equalizing resistor must be much larger than the leakage current of the capacitor, otherwise it will not play the role of equalizing. Using this method, the equalizing resistor is always subjected to the high voltage of the DC bus, which will generate a lot of power consumption and heat, reducing the efficiency of the system. At the same time, when the positive and negative poles of the photovoltaic input of the photovoltaic inverter are inconsistent with each other or the positive and negative poles of the battery of the energy storage inverter are inconsistent with each other, it is easy to cause the impedance of the positive DC bus to the midpoint to be inconsistent with the impedance of the negative DC bus to the midpoint, causing the electrolytic capacitor voltage on the positive DC bus and the electrolytic capacitor voltage on the negative DC bus to deviate, and this traditional method cannot adjust this deviation, resulting in electrolytic capacitor loss or inverter failure to work properly. Utility Model Content
[0005] The present application aims to provide an active voltage balancing circuit to reduce the voltage of the electrolytic capacitor, reduce circuit heating, and improve system efficiency.
[0006] The present application provides an active voltage balancing circuit, including a positive DC bus, a negative DC bus, a first electrolytic capacitor group, a second electrolytic capacitor group, a first switching tube, a second switching tube, a first voltage balancing resistor, a second voltage balancing resistor, a first voltage divider circuit, a second voltage divider circuit, a first voltage stabilizing circuit, and a second voltage stabilizing circuit;
[0007] The positive DC bus is connected to one end of the first electrolytic capacitor group, one end of the first voltage balancing resistor, and one end of the first voltage divider circuit;
[0008] The other end of the first electrolytic capacitor group is connected to one end of the second electrolytic capacitor group, the first electrode end of the first switching tube, and the first electrode end of the second switching tube. The other end of the first voltage balancing resistor is connected to the second electrode end of the first switching tube. The control end of the first switching tube is connected to the positive electrode of the first voltage stabilizing circuit. The second electrode end of the second switching tube is connected to one end of the second voltage balancing resistor. The control end of the second switching tube is connected to the negative electrode of the second voltage stabilizing circuit. The other end of the first voltage divider circuit is connected to the negative electrode of the first voltage stabilizing circuit, the positive electrode of the second voltage stabilizing circuit, and one end of the second voltage divider circuit.
[0009] The negative DC bus is connected to the other end of the second electrolytic capacitor group, the other end of the second voltage-sharing resistor, and the other end of the second voltage-dividing circuit.
[0010] In one example, the first switching tube or the second switching tube includes a triode, the first electrode end of the first switching tube or the second switching tube is an emitter, the second electrode end of the first switching tube or the second switching tube is a collector, and the control end of the first switching tube or the second switching tube is a base.
[0011] In one example, the first switch tube is an NPN switch tube, and the second switch tube is a PNP switch tube.
[0012] In one example, the first voltage-dividing circuit includes a first voltage-dividing resistor, and the second voltage-dividing circuit includes a second voltage-dividing resistor.
[0013] In one example, the first voltage stabilizing circuit or the second voltage stabilizing circuit includes a voltage stabilizing diode, the positive electrode of the first voltage stabilizing circuit or the second voltage stabilizing circuit is the anode of the voltage stabilizing diode, and the negative electrode of the first voltage stabilizing circuit or the second voltage stabilizing circuit is the cathode of the voltage stabilizing diode.
[0014] In one example, the first electrolytic capacitor group or the second electrolytic capacitor group includes one electrolytic capacitor or multiple electrolytic capacitors connected in series.
[0015] In one example, the resistance value of the first voltage divider circuit is the same as the resistance value of the second voltage divider circuit.
[0016] The active voltage balancing circuit provided in the present application can actively operate when the voltage difference between the first electrolytic capacitor group and the second electrolytic capacitor group is large, thereby reducing the electrolytic capacitor voltage, reducing circuit heat generation, and improving system efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 This is a schematic diagram of an active voltage equalization circuit in the prior art;
[0018] Figure 2 A schematic diagram of an active voltage balancing circuit provided in an embodiment of the present application;
[0019] Figure 3 1 is a schematic diagram of an equivalent circuit of the active voltage balancing circuit provided in an embodiment of the present application when the voltage difference between the positive and negative DC bus bars is less than a threshold value;
[0020] Figure 4 1 is a schematic diagram of an equivalent circuit of the active voltage balancing circuit provided in an embodiment of the present application when the positive DC bus voltage is greater than the negative DC bus voltage;
[0021] Figure 5 Schematic diagram of an equivalent circuit of the active voltage balancing circuit provided in an embodiment of the present application when the positive DC bus voltage is less than the negative DC bus voltage.
[0022] The realization of the objectives, functional features and advantages of this application will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION
[0023] In order to make the technical problems, technical solutions and beneficial effects to be solved by this application clearer and more understandable, this application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.
[0024] In the description of this application, it should be understood that the directions or positional relationships indicated by terms such as "center," "upper," "lower," "front," "back," "left," and "right" are based on the directions or positional relationships shown in the accompanying drawings and are intended solely to facilitate the description of this application and simplify the description. They do not indicate or imply that the devices or components referred to must have a specific direction, be constructed, or operate in a specific direction. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0025] like Figure 2 As shown, the embodiment of the present application provides an active voltage balancing circuit, including a positive DC bus BUS+, a negative DC bus BUS-, a first electrolytic capacitor group C1, a second electrolytic capacitor group C2, a first switch tube Q1, a second switch tube Q2, a first voltage balancing resistor R1, a second voltage balancing resistor R2, a first voltage dividing resistor R3, a second voltage dividing resistor R4, a first voltage stabilizing circuit D1, and a second voltage stabilizing circuit D2;
[0026] The positive DC bus BUS+ is connected to one end of the first electrolytic capacitor group C1, one end of the first voltage balancing resistor R1, and one end of the first voltage dividing resistor R3;
[0027] The other end of the first electrolytic capacitor group C1 is connected to one end of the second electrolytic capacitor group C2, the first electrode end of the first switching tube Q1, and the first electrode end of the second switching tube Q2. The other end of the first voltage balancing resistor R1 is connected to the second electrode end of the first switching tube Q1. The control end of the first switching tube Q1 is connected to the positive electrode of the first voltage stabilizing circuit D1. The second electrode end of the second switching tube Q2 is connected to one end of the second voltage balancing resistor R2. The control end of the second switching tube Q2 is connected to the negative electrode of the second voltage stabilizing circuit D2. The other end of the first voltage dividing resistor R3 is connected to the negative electrode of the first voltage stabilizing circuit D1, the positive electrode of the second voltage stabilizing circuit D2, and one end of the second voltage dividing resistor R4.
[0028] The negative DC bus BUS- is connected to the other end of the second electrolytic capacitor group C2, the other end of the second voltage balancing resistor R2, and the other end of the second voltage dividing resistor R4.
[0029] In one example, the first switch tube Q1 or the second switch tube Q2 includes a triode, the first electrode end of the first switch tube Q1 or the second switch tube Q2 is an emitter, the second electrode end of the first switch tube Q1 or the second switch tube Q2 is a collector, and the control end of the first switch tube Q1 or the second switch tube Q2 is a base.
[0030] In one example, the first switch tube Q1 is an NPN switch tube, and the second switch tube Q2 is a PNP switch tube.
[0031] In one example, the first voltage stabilizing circuit D1 or the second voltage stabilizing circuit D2 includes a Zener diode, the positive electrode of the first voltage stabilizing circuit D1 or the second voltage stabilizing circuit D2 is the anode of the Zener diode, and the negative electrode of the first voltage stabilizing circuit D1 or the second voltage stabilizing circuit D2 is the cathode of the Zener diode.
[0032] In one example, the first electrolytic capacitor group C1 or the second electrolytic capacitor group C2 includes one electrolytic capacitor or multiple electrolytic capacitors connected in series.
[0033] In one example, the resistance of the first voltage-dividing resistor R3 is the same as the resistance of the second voltage-dividing resistor R4.
[0034] The following combination Figure 3-Figure 5 The working principle of the active voltage balancing circuit is explained below:
[0035] Assume that the voltage between the positive DC bus BUS+ and the negative DC bus BUS- is U bus , the voltage across the first electrolytic capacitor group C1 is U p , the voltage across the second electrolytic capacitor group C2 is U n The voltage difference between the first electrolytic capacitor group C1 and the second electrolytic capacitor group C2 is ΔU, that is, ΔU = U p -U n According to Kirchhoff's voltage law, it can be determined that: U bus =U p +U n .
[0036] Since the resistance of the first voltage-dividing resistor R3 is larger than that of the second voltage-dividing resistor R4, and both are high-precision resistors with exactly the same resistance, the voltage of the first voltage-dividing resistor R3 and the second voltage-dividing resistor R4 is exactly the same. Therefore, the voltage between the common point F of the first voltage-dividing resistor R3 and the second voltage-dividing resistor R4 and the common point N of the first electrolytic capacitor group C1 and the second electrolytic capacitor group C2 is
[0037] like Figure 3 As shown, when the voltage across the first electrolytic capacitor group C1 and the voltage across the second electrolytic capacitor group C2 are in a relatively balanced state, the absolute value of ΔU is small or close to zero. 1) When the voltage across the first electrolytic capacitor group C1 is slightly higher than the voltage across the second electrolytic capacitor group C2, that is, ΔU>0. At this time, ΔU is less than the sum of the breakdown voltage of the first voltage regulator D1 and the saturation conduction voltage drop between the base and emitter of the first transistor Q1. Q1 and Q2 do not work, and the active voltage equalization circuit does not work, maintaining the deviation between the voltage across the first electrolytic capacitor group C1 and the voltage across the second electrolytic capacitor group C2 in a small state. 2) When the voltage across the first electrolytic capacitor group C1 is slightly lower than the voltage across the second electrolytic capacitor group C2, that is, ΔU<0. At this point, ΔU is less than the breakdown voltage of the second voltage-stabilizing diode D2 and the sum of the saturation conduction voltage drop between the emitter and base of the second triode Q2. Therefore, neither Q1 nor Q2 operates, and the active voltage-balancing circuit does not operate. The voltage difference between the first electrolytic capacitor group C1 and the second electrolytic capacitor group C2 is maintained at a small value. This prevents the active voltage-balancing circuit from operating frequently during normal inverter operation.
[0038] like Figure 4As shown, when the voltage across the first electrolytic capacitor group C1 and the voltage across the second electrolytic capacitor group C2 are in an unbalanced state, ΔU is large. When the voltage across the first electrolytic capacitor group C1 is higher than the voltage across the second electrolytic capacitor group C2, ΔU>0. If ΔU is greater than the critical value of the sum of the breakdown voltage of the first voltage-stabilizing diode D1 and the saturation conduction voltage drop between the base and emitter of the first transistor Q1, Q1 starts to work. The voltage at point F is clamped at the sum of the voltage at point N, the breakdown voltage of D1, and the saturation conduction voltage drop between the base and emitter of Q1. The current on R3 is the sum of the current flowing into the base of Q1 and the current on R4. At this time, the base current of Q1 is small, Q1 is in the amplification region, the voltage drop between the collector and emitter of Q1 is large, and the equivalent resistance between the positive DC bus BUS+ and point N is the sum of the resistance of R1 and the equivalent resistance of Q1. As Q1 begins operating, the total resistance between the positive DC bus BUS+ and point N decreases, causing the voltage across the first electrolytic capacitor group C1 to drop, reducing the imbalance between the first and second electrolytic capacitor groups C1 and C2. As ΔU increases, the imbalance between the first and second electrolytic capacitor groups C1 and C2 increases, increasing the base current flowing through Q1, reducing the voltage drop between Q1's collector and emitter, and decreasing Q1's equivalent resistance. This reduces the equivalent resistance between the positive DC bus BUS+ and point N, and the total resistance between the positive DC bus BUS+ and point N. This suppresses the rise in voltage across the first electrolytic capacitor group C1, and the active voltage balancing circuit's ability to suppress the imbalance between the first and second electrolytic capacitor groups C1 and C2 increases. When ΔU increases to a certain value, Q1 begins to enter its saturation region, at which point Q1's impedance is minimal, and the active voltage balancing circuit's ability to suppress the imbalance between the first and second electrolytic capacitor groups C1 and C2 is at its strongest. Similarly, as ΔU decreases, the ability of the active voltage balancing circuit to suppress the imbalance between the first electrolytic capacitor group C1 and the second electrolytic capacitor group C2 becomes weaker.
[0039] like Figure 5As shown, when the voltage across the first electrolytic capacitor group C1 and the voltage across the second electrolytic capacitor group C2 are in an unbalanced state, the absolute value of ΔU is large. When the voltage across the first electrolytic capacitor group C1 is lower than the voltage across the second electrolytic capacitor group C2, ΔU<0. If the absolute value of ΔU is greater than the critical value of the breakdown voltage of the second voltage-stabilizing diode D2 and the sum of the saturation conduction voltage drop between the emitter and base of the second triode Q2, Q2 starts to work. The voltage at point F is clamped at the sum of the voltage at point N, the breakdown voltage of D2, and the saturation conduction voltage drop between the emitter and base of Q2. The current on R4 is the sum of the current flowing out of the base of Q2 and the current on R3. At this time, the base current flowing out of Q2 is small, Q2 is in the amplification region, the voltage drop between the collector and emitter of Q2 is large, and the equivalent resistance between the negative DC bus BUS- and point N is the sum of the resistance of R2 and the equivalent resistance of Q2. As Q2 begins operating, the total resistance between the negative DC bus BUS- and point N decreases, causing the voltage across the second electrolytic capacitor group C2 to drop, reducing the imbalance between the first and second electrolytic capacitor groups C1 and C2. As the absolute value of ΔU increases, the base current flowing out of Q2 also increases, the voltage drop between Q2's collector and emitter decreases, Q2's equivalent resistance decreases, and the equivalent resistance between the negative DC bus BUS- and point N decreases. This reduces the total resistance between the negative DC bus BUS- and point N, suppressing the voltage rise across the second electrolytic capacitor group C2 and enhancing its ability to suppress the imbalance between the first and second electrolytic capacitor groups C1 and C2. When the absolute value of ΔU increases to a certain value, Q2 begins to enter its saturation region, at which point Q2's impedance is minimized, and the active voltage balancing circuit's ability to suppress the imbalance between the first and second electrolytic capacitor groups C1 and C2 is at its strongest. Similarly, as the absolute value of ΔU decreases, the ability of the active voltage balancing circuit to suppress the imbalance between the first electrolytic capacitor group C1 and the second electrolytic capacitor group C2 becomes weaker.
[0040] The preferred embodiments of the present application are described above with reference to the accompanying drawings, but are not intended to limit the scope of the present application. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and essence of the present application shall fall within the scope of the present application.
Claims
1. An active voltage balancing circuit, characterized in that: It includes a positive DC bus, a negative DC bus, a first electrolytic capacitor group, a second electrolytic capacitor group, a first switching tube, a second switching tube, a first balancing resistor, a second balancing resistor, a first voltage divider circuit, a second voltage divider circuit, a first voltage stabilizing circuit, and a second voltage stabilizing circuit; The positive DC bus is connected to one end of the first electrolytic capacitor group, one end of the first voltage balancing resistor, and one end of the first voltage divider circuit; The other end of the first electrolytic capacitor group is connected to one end of the second electrolytic capacitor group, the first electrode end of the first switching tube, and the first electrode end of the second switching tube. The other end of the first voltage balancing resistor is connected to the second electrode end of the first switching tube. The control end of the first switching tube is connected to the positive electrode of the first voltage stabilizing circuit. The second electrode end of the second switching tube is connected to one end of the second voltage balancing resistor. The control end of the second switching tube is connected to the negative electrode of the second voltage stabilizing circuit. The other end of the first voltage divider circuit is connected to the negative electrode of the first voltage stabilizing circuit, the positive electrode of the second voltage stabilizing circuit, and one end of the second voltage divider circuit. The negative DC bus is connected to the other end of the second electrolytic capacitor group, the other end of the second voltage-sharing resistor, and the other end of the second voltage-dividing circuit.
2. The active voltage balancing circuit according to claim 1, characterized in that: The first switching tube or the second switching tube includes a triode, the first electrode end of the first switching tube or the second switching tube is an emitter, the second electrode end of the first switching tube or the second switching tube is a collector, and the control end of the first switching tube or the second switching tube is a base.
3. The active voltage balancing circuit according to claim 2, characterized in that: The first switch tube is an NPN switch tube, and the second switch tube is a PNP switch tube.
4. The active voltage balancing circuit according to claim 1, wherein: The first voltage-dividing circuit includes a first voltage-dividing resistor, and the second voltage-dividing circuit includes a second voltage-dividing resistor.
5. The active voltage balancing circuit according to claim 1, wherein: The first voltage stabilizing circuit or the second voltage stabilizing circuit includes a voltage stabilizing tube, the positive electrode of the first voltage stabilizing circuit or the second voltage stabilizing circuit is the anode of the voltage stabilizing tube, and the negative electrode of the first voltage stabilizing circuit or the second voltage stabilizing circuit is the cathode of the voltage stabilizing tube.
6. The active voltage balancing circuit according to claim 1, characterized in that: The first electrolytic capacitor group or the second electrolytic capacitor group includes one electrolytic capacitor or a plurality of electrolytic capacitors connected in series.
7. The active voltage balancing circuit according to claim 1, characterized in that: The resistance value of the first voltage divider circuit is the same as the resistance value of the second voltage divider circuit.