Radio frequency amplifier circuit with fast response rate

By briefly adjusting the bias resistance and voltage during the period from the start-up to the stabilization of the RF amplifier and using a switch to control the pulse signal, the problem of circuit performance degradation caused by increased response rate in the existing technology is solved, and a faster response rate is achieved without affecting the stability performance.

CN223364118UActive Publication Date: 2025-09-19SHANGHAI CANAANTEK CO LTD +2
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202422625084.X
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-10-30
Publication Date
2025-09-19
Estimated Expiration
2034-10-30

AI Technical Summary

Technical Problem

Existing technologies speed up the response rate by adjusting the equivalent capacitance and bias resistance of the RF amplifier, but this can easily deteriorate circuit performance, leading to a decrease in input and output return loss and transmission gain, posing a high risk.

Method used

The bias resistance value is temporarily reduced or the bias voltage is increased during the period from the start-up to the stabilization of the RF amplifier, and this is achieved by controlling the pulse signal through a switch to ensure that the performance is not affected after stable operation.

Benefits of technology

The response rate of the RF amplifier is improved without affecting its performance and signal amplitude after stable operation, achieving faster response time.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN223364118U_ABST
    Figure CN223364118U_ABST
Patent Text Reader

Abstract

The utility model discloses a radio frequency amplifier circuit with a fast response rate, and relates to the technical field of radio frequency amplifiers. A bias point of the radio frequency amplifier is grounded, an equivalent capacitor is connected between the bias point and the equivalent capacitor is the sum of all capacitors at the bias point, and the equivalent capacitor comprises a blocking capacitor and a parasitic capacitor; a first bias resistor and a second bias resistor are connected in parallel between the bias point and the equivalent capacitor, the first bias resistor and the second bias resistor are arranged in series, and first switches are arranged at two ends of the second bias resistor; and / or a second switch is connected in parallel between the equivalent capacitor and the radio frequency amplifier. According to the utility model, the bias resistance value is temporarily reduced or the bias voltage is increased during the period from starting to stabilization, the performance of the amplifier after stable operation is not influenced, the response rate is faster, the final signal amplitude is not influenced, and the performance of the amplifier is not influenced.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The utility model belongs to the technical field of radio frequency amplifiers, and in particular relates to a radio frequency amplifier circuit with a fast response rate. Background Art

[0002] In mobile communication applications, the response time of the transceiver system is an important performance in time-division communication, which enables the signal to be transmitted faster and more efficiently during communication. In order to improve the response rate of the transceiver system, it is necessary to further study how to improve the response speed of important integrated parts in the transceiver system.

[0003] like Figure 1 The figure shows the structure of a traditional RF amplifier, which includes an RF amplifier connected between the input terminal IN and the output terminal OUT. The existing solution accelerates the response by adjusting the bias resistor R or equivalent capacitor C at point "X", but this will deteriorate the basic amplifier performance of the circuit, such as input and output return loss and transmission gain. One of the main factors affecting the response rate of the RF amplifier is the size of the RC time constant and the bias voltage at the amplifier bias point (X). As long as the size of the bias resistor R and the equivalent capacitor C is adjusted to reduce the RC time constant or increase the bias voltage during the period from amplifier startup to stability, the charging state of the RF amplifier can be accelerated to achieve a stable operating state.

[0004] The above-mentioned existing technologies primarily adjust the equivalent capacitor C and bias resistor R. However, blindly reducing the capacitance and resistance values ​​will degrade the circuit's basic amplifier performance, such as input and output return loss and transmission gain, with little success and significant risks. This technical solution provides a RF amplifier circuit with a fast response rate. By only briefly reducing the bias resistor value or increasing the bias voltage during the startup and stabilization period, the performance of the amplifier after stable operation is not affected. Utility Model Content

[0005] The utility model provides a radio frequency amplifier circuit with a fast response rate, such as Figure 2As shown, before the amplifier operates stably, R2 is briefly short-circuited through SW to reduce the RC time constant from startup to stabilization, thereby improving the amplifier response rate; and / or, the bias voltage of the amplifier bias point is briefly pulled to a high level VH through SW, so that the amplifier is quickly charged to reach stability, thereby improving the response rate of the entire amplifier; SW can be controlled on and off by a pulse signal sent by the controller, and the pulse signal is high only before the amplifier operates stably, and is low at the rest of the time; the type of controller is not unique; compared with traditional RF amplifier circuits, this solution only temporarily reduces the bias resistance value or increases the bias voltage from startup to stabilization, and does not affect the performance of the amplifier after stable operation, has a faster response rate, and does not affect the final signal amplitude, and the performance of the amplifier is not affected; in summary, the above problems are solved.

[0006] In order to solve the above technical problems, the present invention is achieved through the following technical solutions:

[0007] The utility model discloses a radio frequency amplifier circuit with a fast response rate, comprising a radio frequency amplifier;

[0008] The bias point of the radio frequency amplifier is grounded and is connected with an equivalent capacitor in the middle, where the equivalent capacitor is the sum of all capacitors at the bias point, including DC blocking capacitors and parasitic capacitors;

[0009] A bias resistor is connected in parallel between the bias point and the equivalent capacitor, and a second switch is connected in parallel between the equivalent capacitor and the RF amplifier; and / or, the bias resistor includes a first bias resistor and a second bias resistor, the first bias resistor and the second bias resistor are arranged in series, the other end of the second bias resistor is connected to the bias voltage, and a first switch is provided at both ends of the second bias resistor.

[0010] Furthermore, the resistance of the first bias resistor is smaller than that of the second bias resistor. Before the RF amplifier operates stably, the second bias resistor is temporarily short-circuited by the first switch to reduce the RC time constant from startup to stabilization.

[0011] Furthermore, the bias voltage of the radio frequency amplifier is briefly pulled to a high level through the second switch; the high level is greater than the bias voltage.

[0012] Furthermore, the first switch and the second switch are both controlled to be on and off by sending a pulse signal through the controller. The pulse signal is high level only before the RF amplifier works stably, and is low level at other times.

[0013] Furthermore, the controller adopts a CPU, a central processing unit, an MCU or an FPGA.

[0014] Compared with the prior art, the present invention has the following beneficial effects:

[0015] (1) This solution briefly short-circuits R2 through SW before the amplifier stabilizes, reducing the RC time constant from startup to stabilization, thereby improving the amplifier response rate; and / or briefly pulls the amplifier bias point bias voltage to a high level VH through SW, thereby allowing the amplifier to quickly charge and stabilize, thereby improving the overall amplifier response rate;

[0016] (2) The SW of this solution can be controlled on and off by a pulse signal sent by the controller. The pulse signal is high only before the amplifier is working stably and is low at other times. The type of controller is not unique.

[0017] (3) Compared with traditional RF amplifier circuits, this solution only temporarily reduces the bias resistance value or increases the bias voltage during the startup to stabilization period, which does not affect the performance of the amplifier after stable operation. It has a faster response rate and does not affect the final signal amplitude. The performance of the amplifier is not affected.

[0018] Of course, any product implementing the present invention does not necessarily need to achieve all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0020] Figure 1 This is a structural diagram of a traditional radio frequency amplifier;

[0021] Figure 2 This is a circuit structure diagram of a radio frequency amplifier with a fast response rate according to a specific embodiment 1 of the present utility model;

[0022] Figure 3 This is a circuit diagram of a radio frequency amplifier with a fast response rate according to a specific embodiment 2 of the present utility model;

[0023] Figure 4 This is a circuit diagram of a radio frequency amplifier with a fast response rate according to specific embodiment 3 of the present utility model;

[0024] Figure 5 This is a simulation comparison diagram of startup time of a traditional RF amplifier and three amplifiers of this specific embodiment;

[0025] In the accompanying drawings, the components represented by the reference numerals are as follows:

[0026] C-equivalent capacitance, X-bias point, VDD-supply voltage, VH-high level, Vb-bias voltage, AMP-RF amplifier, R-bias resistor, R1-first bias resistor, R2-first bias resistor, where R=R1+R2, SW1-first switch, SW2-second switch, IN-input end, OUT-output end. DETAILED DESCRIPTION

[0027] The following will be combined with the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0028] Conventional RF amplifiers such as Figure 1 As shown, the main thing is to adjust the equivalent capacitance C and bias resistor R. However, blindly reducing the capacitance and resistance values ​​will deteriorate the basic performance of the amplifier, such as the input and output return loss and transmission gain of the circuit, with little effect and high risk.

[0029] This solution only temporarily reduces the bias resistor value or increases the bias voltage during the startup to stabilization period, and does not affect the performance of the amplifier after it stabilizes. It is specifically achieved through the following specific solution: Specific embodiment 1:

[0031] See also Figure 2 As shown, the utility model is a radio frequency amplifier circuit with a fast response rate, comprising a radio frequency amplifier AMP; the bias point X of the radio frequency amplifier AMP is grounded and an equivalent capacitor C is connected in the middle, and the equivalent capacitor C is the sum of all capacitors at the bias point X, including DC blocking capacitors and parasitic capacitors;

[0032] A first bias resistor R1 and a second bias resistor R2 are connected in parallel between the bias point X and the equivalent capacitor C. The first bias resistor R1 and the second bias resistor R2 are arranged in series. The other end of the second bias resistor R2 is connected to the bias voltage Vb. A first switch SW1 is provided at both ends of the second bias resistor R2.

[0033] In this embodiment, Figure 1 The bias resistor R in the traditional RF amplifier circuit is split into two resistors R1 and R2. The first bias resistor R1 and the second bias resistor R2 are connected in series. The first bias resistor R1 is kept as small as possible. Before the amplifier stabilizes, R2 is briefly short-circuited through SW1 to reduce the RC time constant from startup to stabilization, thereby improving the amplifier response rate. Specific embodiment 2:

[0035] See also Figure 3 As shown, the present invention provides a radio frequency amplifier circuit with a fast response rate, including a radio frequency amplifier AMP; the bias point X of the radio frequency amplifier AMP is grounded and an equivalent capacitor C is connected in the middle, the equivalent capacitor C is the sum of all capacitors at the bias point X, including DC blocking capacitors and parasitic capacitors, a bias resistor R is connected in parallel between the bias point X and the equivalent capacitor C, the other end of R is connected to a bias voltage Vb, and a second switch SW2 is connected in parallel between the equivalent capacitor C and the radio frequency amplifier AMP; the bias voltage at the bias point of the radio frequency amplifier AMP is briefly pulled to a high level VH (VH>bias voltage Vb) through the second switch SW2, so that the amplifier is quickly charged to achieve stability, thereby improving the response rate of the entire amplifier; Specific embodiment 3:

[0037] See also Figure 4 As shown, by combining the structures of specific embodiment 1 and specific embodiment 2, the present invention provides a radio frequency amplifier circuit with a fast response rate, including a radio frequency amplifier AMP; the bias point X of the radio frequency amplifier AMP is grounded and an equivalent capacitor C is connected in the middle, and the equivalent capacitor C is the sum of all capacitors at the bias point X, including a DC blocking capacitor and a parasitic capacitor; a first bias resistor R1 and a second bias resistor R2 are connected in parallel between the bias point X and the equivalent capacitor C, the first bias resistor R1 and the second bias resistor R2 are arranged in series, the other end of the second bias resistor R2 is connected to a bias voltage Vb, and a first switch SW1 is provided at both ends of the second bias resistor R2;

[0038] A second switch SW2 is connected in parallel between the equivalent capacitor C and the radio frequency amplifier AMP; the bias voltage of the bias point of the radio frequency amplifier AMP is briefly pulled to a high level VH (VH>bias voltage Vb) through the second switch SW2, so that the amplifier is quickly charged to reach stability, thereby improving the response rate of the entire amplifier;

[0039] Since the key point of this solution is to improve the response rate by temporarily reducing the equivalent RC time constant of the circuit bias point or temporarily increasing the bias voltage of the circuit bias point, to adapt to different circuit structures, the bias points of different structures are collectively referred to as point "X", C represents the sum of all capacitors and parasitic capacitances at point "X", and the control signal of the first switch SW1 / the second switch SW2 is a pulse signal;

[0040] The resistance of the first bias resistor R1 is smaller than that of the second bias resistor R2. Before the RF amplifier AMP works stably, the second bias resistor R2 is temporarily short-circuited by the first switch SW1 to reduce the RC time constant from startup to stabilization.

[0041] The first switch SW1 and the second switch SW2 are both turned on and off by pulse signals sent by the controller. The pulse signals are high level only before the RF amplifier AMP works stably, and are low level at other times.

[0042] Figure 2 / Figure 3 Both implementation methods can be used or only one of them can be used according to the actual situation.

[0043] The first switch SW1 and the second switch SW2 can be turned on and off by a pulse signal sent by a controller. The pulse signal is high only before the amplifier stabilizes and is low the rest of the time. The controller can be of any type, including a CPU (Central Processing Unit), an MCU (Microcontroller Unit), an FPGA (Field-Programmable Gate Array), and other devices.

[0044] For detailed description and demonstration, in this specific embodiment, the DC blocking capacitor C is set to 7pF, and the bias resistor R is set to 37K (where R1 is set to 6K and R2 is set to 31K).

[0045] Figure 4 Given the situation where this solution is not used, Figure 1 A traditional RF amplifier structure, and a startup time simulation diagram of the RF amplifier using specific embodiment 1, specific embodiment 2, and specific embodiment 3, respectively; as can be seen from the figure, the RF amplifiers all send an enable signal at 1us to start working. The startup time of the amplifier that does not adopt this solution is 0.86us, and the startup times of the other three amplifiers are 0.7us, 0.61us, and 0.42us, respectively. The amplifier can respond faster without affecting the final signal amplitude, and the performance of the amplifier is not affected.

[0046] The amplifier circuit described in this solution is not limited to MOS transistor circuits; it is also applicable to BJT transistor circuits. The gate of the MOS transistor corresponds to the base of the BJT transistor, and the application can be adjusted according to actual needs. This solution is also applicable to other RF and analog circuits. All that is needed is to find the main bias point (X) that affects the circuit's response time and adjust the RC constant or bias voltage at this bias point (X) using this solution.

[0047] The preferred embodiments of the present invention disclosed above are intended only to help illustrate the present invention. The preferred embodiments do not describe all details in detail, nor do they limit the present invention to the specific embodiments described. Obviously, many modifications and variations are possible based on the contents of this specification. These embodiments are selected and described in detail in this specification to better explain the principles and practical applications of the present invention, thereby enabling those skilled in the art to better understand and utilize the present invention. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A radio frequency amplifier circuit with a fast response rate, comprising a radio frequency amplifier (AMP), characterized in that: The bias point (X) of the radio frequency amplifier (AMP) is grounded and has an equivalent capacitor (C) in between, wherein the equivalent capacitor (C) is the sum of all capacitors at the bias point (X), including DC blocking capacitors and parasitic capacitors; A bias resistor (R) is connected in parallel between the bias point (X) and the equivalent capacitor (C), and a second switch (SW2) is connected in parallel between the equivalent capacitor (C) and the radio frequency amplifier (AMP); and / or the bias resistor (R) includes a first bias resistor (R1) and a second bias resistor (R2), the first bias resistor (R1) and the second bias resistor (R2) being arranged in series, the other end of the second bias resistor (R2) being connected to a bias voltage (Vb), and a first switch (SW1) being provided at both ends of the second bias resistor (R2).

2. The radio frequency amplifier circuit with a fast response rate according to claim 1, characterized in that: The resistance of the first bias resistor (R1) is smaller than that of the second bias resistor (R2).

3. The radio frequency amplifier circuit with a fast response rate according to claim 1, characterized in that: The first switch (SW1) and the second switch (SW2) are both controlled to be on and off by sending pulse signals through a controller.

4. The radio frequency amplifier circuit with a fast response rate according to claim 3, characterized in that: The controller adopts CPU, central processing unit, MCU or FPGA.