Surge voltage and current suppression circuit

Abstract

The utility model discloses a surge voltage and current suppression circuit, which belongs to the technical field of power electronics, and comprises a power supply circuit, a sampling circuit, a power control circuit and a starting surge current suppression circuit, a power supply input positive electrode sequentially passes through the step-down circuit, the booster circuit and the filter circuit to generate standard voltage, the sampling circuit is used for feeding back output voltage and comprises a voltage division circuit, a sixteenth triode and a photoelectric coupler, and the power control circuit restrains surge voltage and current within a required range through feedback signals of the sampling circuit. The power control circuit comprises a twelfth MOS tube, a fourteenth MOS tube, a fifteenth triode and the like. Compared with the prior art, the circuit can suppress surge voltage and surge current at the same time, so that the product meets the technical requirements that the surge can pass through 80V / 50mS, and the starting surge current does not exceed five times of the rated current. In addition, the circuit can use a plurality of domestic discrete devices to reduce the dependence of the circuit on foreign special power supply chips.

Description

Technical Field

[0001] The utility model belongs to the technical field of power electronics, and in particular relates to a surge voltage and current suppression circuit. Background Art

[0002] Surge voltage and current suppression circuits are electronic devices that provide safety protection for various electronic devices, instruments, and communication lines. When external interference suddenly generates a spike in current or voltage in an electrical circuit or communication line, the surge protector can conduct and divert the current in a very short time, thereby preventing the surge from damaging other devices in the circuit.

[0003] Military power supply components face stringent standards, with surge suppression being a crucial indicator and requiring full domestic production. Existing surge voltage and current suppression circuits often utilize specialized integrated circuit solutions from abroad, making domestically produced replacements unsuitable and prohibitively expensive. Reducing the existing circuits' reliance on specialized foreign power supply chips while maintaining military standards presents a technical challenge. Utility Model Content

[0004] In response to the above technical problems, the utility model provides a surge voltage and current suppression circuit, which can simultaneously suppress surge voltage and surge current, and can use multiple domestic discrete devices to replace foreign dedicated power supply chips.

[0005] The utility model solves the above problems through the following technical means:

[0006] A surge voltage and current suppression circuit, characterized in that it includes a power supply circuit, a sampling circuit and a power control circuit, wherein: the power supply circuit includes a step-down circuit, a step-up circuit and a filter circuit, and the positive electrode of the power supply input generates a standard voltage after passing through the step-down circuit, the step-up circuit and the filter circuit in sequence; the sampling circuit is used to feed back the output voltage, and the sampling circuit includes a voltage divider circuit, a sixteenth transistor and a photocoupler, the E pole of the sixteenth transistor is connected to the positive electrode of the power supply output, the C pole of the sixteenth transistor is connected to the primary port 1 of the photocoupler through the forty-fourth resistor, the primary port 2 of the photocoupler is connected to the power supply output common terminal, and the voltage of the positive electrode of the power supply output is connected to the B pole of the sixteenth transistor through the voltage divider circuit. The power control circuit suppresses surge voltage and current within a required range through feedback signals from a sampling circuit. The power control circuit includes a twelfth MOS transistor, a fourteenth MOS transistor, and a fifteenth transistor. The E pole of the fifteenth transistor is connected to a standard voltage, the C pole of the fifteenth transistor is connected to the G pole of the fourteenth MOS transistor via a thirty-third resistor, the B pole of the fifteenth transistor is connected to the D pole of the twelfth MOS transistor via a thirty-eighth resistor, the G pole of the twelfth MOS transistor is connected to the secondary four-port of the photocoupler, the S pole of the twelfth MOS transistor is connected to the secondary three-port of the photocoupler, the D pole of the fourteenth MOS transistor is connected to the power output common terminal, and the S pole of the fourteenth MOS transistor is connected to the power input negative terminal.

[0007] Preferably, it also includes a startup inrush current suppression circuit, which includes a twenty-sixth diode, a thirty-seventh resistor, a twenty-ninth capacitor and a seventeenth transistor, wherein: the E pole of the seventeenth transistor is connected to the standard voltage through the thirty-ninth resistor, the B pole of the seventeenth transistor is connected to the standard voltage through the thirty-seventh resistor, the twenty-sixth diode and the thirty-seventh resistor are connected in parallel, the two ends of the twenty-ninth capacitor are respectively connected to the B pole and the C pole of the seventeenth transistor, and the C pole of the seventeenth transistor is connected to the negative pole of the power input.

[0008] Preferably, the step-down circuit includes a thirteenth transistor, a twenty-seventh diode and a control chip, wherein: the C pole of the thirteenth transistor is connected to the positive pole of the power input through the thirty-fourth resistor and the thirty-second resistor in parallel, the B pole of the thirteenth transistor is divided into two paths, one path is connected to the positive pole of the power input through the thirty-sixth resistor, and the other path is connected to the negative pole of the power input through the twenty-seventh diode, and the E pole of the thirteenth transistor is divided into two paths, one path is connected to the enable end and the power end of the control chip, and the other path is connected to the input end of the boost circuit.

[0009] Preferably, the boost circuit is a BOOST boost circuit, and the BOOST boost circuit includes a second inductor and a twenty-fifth diode.

[0010] Preferably, the filtering circuit includes a twenty-seventh capacitor and a twenty-eighth capacitor, and the twenty-seventh capacitor and the twenty-eighth capacitor are connected in parallel between the standard voltage and the negative pole of the power input.

[0011] The surge voltage and current suppression circuit of the utility model has the following beneficial effects:

[0012] The suppression circuit includes a power supply circuit, a sampling circuit, a power control circuit, and a startup surge current suppression circuit, wherein: the power supply circuit includes a step-down circuit, a boost circuit, and a filter circuit; the positive pole of the power input generates a standard voltage after passing through the step-down circuit, the boost circuit, and the filter circuit in sequence; the sampling circuit is used to feedback the output voltage; the power control circuit suppresses the surge voltage and current within the required range through the feedback signal of the sampling circuit; the circuit can simultaneously suppress surge voltage and surge current, so that the product meets the technical requirements of over-surge 80V / 50mS and startup surge current not exceeding 5 times the rated current.

[0013] Furthermore, this circuit utilizes multiple domestically produced discrete components, reducing its reliance on specialized foreign power supply chips. This circuit achieves its desired functionality using discrete components from a wide variety of manufacturers, allowing for upgrades to a wide range of product series and models. This ensures product stability and reliability while also making it easy to control costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solution of the present invention, the following is a brief introduction to the drawings required for use in the implementation. Obviously, the drawings described below are only some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0015] Figure 1 It is the overall circuit diagram of the utility model;

[0016] Figure 2 It is a schematic diagram of the technical effect of the utility model;

[0017] Figure 3 This is a schematic diagram of the power supply circuit of the utility model;

[0018] Figure 4 This is a schematic diagram of the power control circuit of the utility model. DETAILED DESCRIPTION

[0019] In the description of the present invention, it should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. The terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

[0020] The present invention will be described in detail below with reference to the accompanying drawings.

[0021] like Figure 1 and Figure 2 As shown, the surge voltage and current suppression circuit can suppress the input surge voltage and surge current to within the required range. Figure 2 In the diagram, the first line is voltage, the second line is current, and the left side is input and the right side is output. Specifically, the circuit includes a power supply circuit, a sampling circuit, and a power control circuit. In the figure, the power supply circuit includes a buck circuit, a boost circuit, and a filter circuit. The positive electrode of the power input VIN+ passes through the buck circuit, the boost circuit, and the filter circuit in sequence to generate a standard voltage VCC_10V. In actual operation, the power supply circuit mainly solves the unstable power supply caused by the input voltage surge. When the input voltage surges from 8V to 80V, the output is stable at 10V. Circuit as shown Figure 3 The buck regulator is primarily composed of Q13, D27, R36, R32, and R34, while the boost circuit, consisting of L2, D25, and IC4, performs the step-up. The buck circuit operates when the input voltage is above 10V, and the boost circuit operates when the input voltage is below 10V.

[0022] Specifically, the step-down circuit includes a thirteenth transistor Q13, a twenty-seventh diode D27, and a control chip IC4, wherein: the C-pole of the thirteenth transistor Q13 is connected to the positive power input VIN+ through a thirty-fourth resistor R34 and a thirty-second resistor R32 connected in parallel; the B-pole of the thirteenth transistor Q13 is divided into two paths, one path is connected to the positive power input VIN+ through a thirty-sixth resistor R36, and the other path is connected to the negative power input VIN- through a twenty-seventh diode D27; the E-pole of the thirteenth transistor Q13 is divided into two paths, one path is connected to the enable terminal EN of the control chip IC4 and the power terminal VIN, and the other path is connected to the input terminal of the boost circuit. The boost circuit is a BOOST boost circuit, which includes a second inductor L2 and a twenty-fifth diode D25. The filter circuit includes a twenty-seventh capacitor C27 and a twenty-eighth capacitor C28, which are connected in parallel between the standard voltage VCC_10V and the negative power input VIN-.

[0023] like Figure 4 As shown, the circuit also includes a sampling circuit, which provides feedback on the output voltage. When the output voltage is higher than the set voltage, the sampling circuit provides feedback to the power circuit to achieve voltage regulation. In the figure, the sampling circuit consists of Q16, U7, U8, R44, R45, R46, R47, and R48. R47 and R48 determine the output voltage. When the output voltage is higher than the set voltage, Q16 turns on to supply power to the primary side of the optocoupler.

[0024] Specifically, the sampling circuit includes a voltage divider circuit, a sixteenth transistor Q16 and a photocoupler U7. The E-pole of the sixteenth transistor Q16 is connected to the positive output electrode VOUT of the power supply, the C-pole of the sixteenth transistor Q16 is connected to the primary port 1 of the photocoupler U7 via the forty-fourth resistor R44, the primary port 2 of the photocoupler U7 is connected to the power output common terminal COM, and the voltage of the positive output electrode VOUT of the power supply is connected to the B-pole of the sixteenth transistor Q16 via the voltage divider circuit.

[0025] Figure 4 In the circuit, the power control circuit suppresses the surge voltage and current within the required range through the feedback signal of the sampling circuit. The power circuit surge voltage suppression is mainly composed of Q12, Q14, Q15, and U7. When the optocoupler secondary receives the feedback signal, it controls Q12, and then Q12, R35, R38, and Q15 make Q14 work in the linear region, and the surge voltage is absorbed by Q14.

[0026] Specifically, the power control circuit includes a twelfth MOS transistor Q12, a fourteenth MOS transistor Q14, and a fifteenth transistor Q15. The E-pole of the fifteenth transistor Q15 is connected to the standard voltage VCC_10V, the C-pole of the fifteenth transistor Q15 is connected to the G-pole of the fourteenth MOS transistor Q14 via a thirty-third resistor R33, the B-pole of the fifteenth transistor Q15 is connected to the D-pole of the twelfth MOS transistor Q12 via a thirty-eighth resistor R38, the G-pole of the twelfth MOS transistor Q12 is connected to the secondary four-port of the photocoupler U7, the S-pole of the twelfth MOS transistor Q12 is connected to the secondary three-port of the photocoupler U7, the D-pole of the fourteenth MOS transistor Q14 is connected to the power output common terminal COM, and the S-pole of the fourteenth MOS transistor Q14 is connected to the power input negative electrode VIN-.

[0027] Figure 4 The power circuit also includes a startup inrush current suppression circuit, which is mainly composed of D26, R37, C29, and Q17. When the normal input is turned on, VCC charges C29 through R37, causing Q17 to slowly turn off, which in turn causes Q14 to slowly turn on to absorb the excessive inrush current.

[0028] Specifically, the inrush current suppression circuit includes a twenty-sixth diode D26, a thirty-seventh resistor R37, a twenty-ninth capacitor C29 and a seventeenth transistor Q17, wherein: the E pole of the seventeenth transistor Q17 is connected to the standard voltage VCC_10V through the thirty-ninth resistor R39, the B pole of the seventeenth transistor Q17 is connected to the standard voltage VCC_10V through the thirty-seventh resistor R37, the twenty-sixth diode D26 and the thirty-seventh resistor R37 are connected in parallel, the two ends of the twenty-ninth capacitor C29 are respectively connected to the B pole and the C pole of the seventeenth transistor Q17, and the C pole of the seventeenth transistor Q17 is connected to the negative power input electrode VIN-.

[0029] It should be noted that the PNP transistor and the voltage reference chip can be replaced by a voltage regulator tube.

[0030] In actual operation, the circuit utilizes a linear step-down and boost wide-range power supply circuit. It also features an overvoltage detection circuit consisting of a PNP transistor and voltage reference chip U8. During surges, this circuit operates the power MOSFET in its linear region, absorbing the surge voltage and current. This circuit is easily domestically manufactured, can be replaced in situ, and is low-cost. Because it is independent of chip design, it can be easily serialized and reduced R&D time.

[0031] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A surge voltage and current suppression circuit, characterized in that: It includes a power supply circuit, a sampling circuit and a power control circuit, wherein: The power supply circuit includes a step-down circuit, a step-up circuit and a filter circuit. The positive electrode of the power input (VIN+) passes through the step-down circuit, the step-up circuit and the filter circuit in sequence to generate a standard voltage (VCC_10V); The sampling circuit is used to feedback the output voltage, and the sampling circuit includes a voltage divider circuit, a sixteenth transistor (Q16) and a photoelectric coupler (U7), wherein the E pole of the sixteenth transistor (Q16) is connected to the positive output pole (VOUT) of the power supply, the C pole of the sixteenth transistor (Q16) is connected to the primary port 1 of the photoelectric coupler (U7) via a forty-fourth resistor (R44), the primary port 2 of the photoelectric coupler (U7) is connected to the power output common terminal (COM), and the voltage of the positive output pole (VOUT) of the power supply is connected to the B pole of the sixteenth transistor (Q16) via the voltage divider circuit; The power control circuit suppresses surge voltage and current within a required range through feedback signals from a sampling circuit. The power control circuit includes a twelfth MOS tube (Q12), a fourteenth MOS tube (Q14), and a fifteenth transistor (Q15). The E pole of the fifteenth transistor (Q15) is connected to a standard voltage (VCC_10V), the C pole of the fifteenth transistor (Q15) is connected to the G pole of the fourteenth MOS tube (Q14) via a thirty-third resistor (R33), the B pole of the fifteenth transistor (Q15) is connected to the D pole of the twelfth MOS tube (Q12) via a thirty-eighth resistor (R38), the G pole of the twelfth MOS tube (Q12) is connected to the secondary four-port of the photoelectric coupler (U7), the S pole of the twelfth MOS tube (Q12) is connected to the secondary three-port of the photoelectric coupler (U7), the D pole of the fourteenth MOS tube (Q14) is connected to the power output common terminal (COM), and the S pole of the fourteenth MOS tube (Q14) is connected to the power input negative terminal (VIN-).

2. The surge voltage and current suppression circuit according to claim 1, wherein: The device also includes a startup inrush current suppression circuit, the inrush current suppression circuit including a twenty-sixth diode (D26), a thirty-seventh resistor (R37), a twenty-ninth capacitor (C29) and a seventeenth transistor (Q17), wherein: The E-pole of the seventeenth transistor (Q17) is connected to the standard voltage (VCC_10V) through the thirty-ninth resistor (R39), the B-pole of the seventeenth transistor (Q17) is connected to the standard voltage (VCC_10V) through the thirty-seventh resistor (R37), the twenty-sixth diode (D26) is connected in parallel with the thirty-seventh resistor (R37), the two ends of the twenty-ninth capacitor (C29) are respectively connected to the B-pole and the C-pole of the seventeenth transistor (Q17), and the C-pole of the seventeenth transistor (Q17) is connected to the negative electrode of the power input (VIN-).

3. The surge voltage and current suppression circuit according to claim 1, wherein: The step-down circuit includes a thirteenth transistor (Q13), a twenty-seventh diode (D27) and a control chip (IC4), wherein: The C-pole of the thirteenth transistor (Q13) is connected to the positive power input electrode (VIN+) through a thirty-fourth resistor (R34) and a thirty-second resistor (R32) connected in parallel. The B-pole of the thirteenth transistor (Q13) is divided into two paths, one of which is connected to the positive power input electrode (VIN+) through a thirty-sixth resistor (R36), and the other of which is connected to the negative power input electrode (VIN-) through a twenty-seventh diode (D27). The E-pole of the thirteenth transistor (Q13) is divided into two paths, one of which is connected to the enable terminal (EN) and the power terminal (VIN) of the control chip (IC4), and the other of which is connected to the input terminal of the boost circuit.

4. The surge voltage and current suppression circuit according to claim 1, wherein: The boost circuit is a BOOST boost circuit, and the BOOST boost circuit includes a second inductor (L2) and a twenty-fifth diode (D25).

5. The surge voltage and current suppression circuit according to claim 1, wherein: The filtering circuit includes a twenty-seventh capacitor (C27) and a twenty-eighth capacitor (C28), and the twenty-seventh capacitor (C27) and the twenty-eighth capacitor (C28) are connected in parallel between the standard voltage (VCC_10V) and the negative electrode of the power input (VIN-).

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