Circuit board

By setting up multiple layers of water-blocking layers on the circuit board to prevent liquid or water vapor from penetrating, the problem of oxidation or corrosion of the circuit board's line layer is solved, and the reliability of the circuit board is improved.

CN223379356UActive Publication Date: 2025-09-23CHIPBOND TECH
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202422676022.1
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Priority Date
2024-09-27
Filing Date
2024-11-04
Publication Date
2025-09-23
Estimated Expiration
2034-11-04

Smart Images

  • Figure CN223379356U_ABST
    Figure CN223379356U_ABST
Patent Text Reader

Abstract

A circuit board comprises a carrier plate, a circuit layer, a solder mask layer and at least one waterproof layer, the circuit layer is arranged on the carrier plate, the solder mask layer covers the circuit layer and exposes a plurality of inner pins and a plurality of outer pins of the circuit layer, and the waterproof layer covers the solder mask layer, so that the circuit layer and the solder mask layer are located between the carrier plate and the waterproof layer. The waterproof layer can prevent liquid attached to the waterproof layer or water vapor in the environment from permeating to the solder mask layer and the circuit layer through the waterproof layer to cause corrosion or oxidation of the circuit layer.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The utility model relates to a circuit board, in particular to a circuit board which prevents a circuit layer from being corroded or oxidized. Background Art

[0002] See also Figure 1 A conventional circuit board 10 forms a circuit layer 12 on a carrier board 11 and then covers the circuit layer 12 with a solder mask 13. However, during the manufacturing process, transportation, or storage of the circuit board 10, liquid or moisture may adhere to the solder mask 13 and penetrate through the solder mask 13 into the circuit layer 12, causing oxidation of the circuit layer 12 and, in turn, causing a bridge short circuit in the circuit layer 12. Furthermore, when the liquid or moisture contains corrosive elements (such as chlorine), the corrosive elements may be carried by the liquid or moisture, penetrating through the solder mask 13 into the circuit layer 12, corroding the circuit layer 12 and causing a short circuit in the circuit layer 12. This may affect the structure and electrical reliability of the circuit board 10. Utility Model Content

[0003] The main purpose of the present invention is to provide a circuit board that prevents liquid or water vapor from penetrating into a solder mask layer. At least one water-blocking layer of the circuit board blocks liquid or water vapor from penetrating into the solder mask layer and the circuit layer, thereby avoiding oxidation or corrosion of the circuit layer.

[0004] The present invention provides a circuit board comprising a carrier board, a circuit layer, a solder mask layer, and at least a first water barrier layer. The circuit layer is disposed on the carrier board, the circuit layer having a plurality of inner pins and a plurality of outer pins. The solder mask layer covers the circuit layer, exposing the inner pins and the outer pins. The first water barrier layer covers the solder mask layer, so that the circuit layer and the solder mask layer are located between the carrier board and the first water barrier layer. The water vapor transmission rate (WVTR) of the first water barrier layer is no greater than 1x10 -2 g / m 2 ·day.

[0005] In one embodiment of the present invention, the first water-blocking layer has a projection on the carrier board, the solder mask layer is located in the projection, and the first water-blocking layer completely covers the solder mask layer.

[0006] In one embodiment of the present invention, the thickness of the first water-blocking layer is no more than 50 μm.

[0007] In one embodiment of the present invention, it further comprises a second water barrier layer, wherein the first water barrier layer is integrated with the solder mask layer by the second water barrier layer, and the water vapor transmission rate (WVTR) of the second water barrier layer is not greater than 10g / m 2 ·day.

[0008] In one embodiment of the present invention, the second water-blocking layer is adhesive.

[0009] In one embodiment of the present invention, the thickness of the second water-blocking layer is no more than 80 μm.

[0010] In one embodiment of the present invention, it further comprises a third water-blocking layer, the third water-blocking layer covers the first water-blocking layer, and the water vapor transmission rate (WVTR) of the third water-blocking layer is not greater than 0.6 g / m 2 ·day.

[0011] In one embodiment of the present invention, the third water-blocking layer has a projection on the carrier board, the first water-blocking layer is located in the projection of the third water-blocking layer, and the third water-blocking layer completely covers the first water-blocking layer.

[0012] In one embodiment of the present invention, the thickness of the third water-blocking layer is no more than 50 μm.

[0013] In one embodiment of the present invention, it includes an adhesive layer, and the third water-blocking layer is attached to the first water-blocking layer via the adhesive layer.

[0014] In one embodiment of the present invention, the water vapor transmission rate (WVTR) of the adhesive layer is not greater than 10 g / m 2 ·day.

[0015] In one embodiment of the present invention, the thickness of the adhesive layer is no more than 80 μm.

[0016] The utility model uses the first water-blocking layer to block the liquid or water vapor from penetrating into the solder mask layer, thereby preventing the liquid or water vapor or corrosive elements (such as chlorine) carried by the liquid or water vapor from passing through the water-blocking layer and sequentially penetrating into the solder mask layer and the circuit layer, causing oxidation or corrosion of the circuit layer, thereby avoiding affecting the structure and electrical reliability of the circuit board. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a cross-sectional view of a known circuit board;

[0018] Figure 2 A schematic diagram of the packaging structure of the present invention;

[0019] Figures 3 and 4 It is a cross-sectional view of the packaging structure of the present invention.

[0020] Reference numerals:

[0021] 10: Circuit board 11: Carrier board

[0022] 12: Circuit layer 13: Solder mask

[0023] 100: Circuit board 110: Carrier board

[0024] 120: Circuit layer 121: Internal pin

[0025] 122: External pin 130: Solder mask

[0026] 140: first water-blocking layer 141: projection

[0027] 150: second water blocking layer 160: third water blocking layer

[0028] 161: Projection 170: Adhesive layer DETAILED DESCRIPTION

[0029] See also Figure 2 and Figure 3 The circuit board 100 of the present invention is used to prevent liquid or moisture from penetrating into the circuit layer 120 of the circuit board 100 and causing the circuit layer 120 to be oxidized or corroded.

[0030] See also Figure 2 and Figure 3 The circuit board 100 includes a carrier 110, the circuit layer 120, a solder mask layer 130 and at least a first water-blocking layer 140. The circuit layer 120 is disposed on the carrier 110. The circuit layer 120 includes a plurality of inner pins 121 and a plurality of outer pins 122. The solder mask layer 130 covers the circuit layer 120 and exposes at least the inner pins 121 and the outer pins 122. The inner pins 121 are used to electrically connect to a chip (not shown), and the outer pins 122 are used to electrically connect to another electronic component (not shown, such as a display panel), but the present invention is not limited thereto.

[0031] See also Figure 2 and Figure 3 The first water-blocking layer 140 covers the solder mask 130, so that the circuit layer 120 and the solder mask 130 are located between the carrier 110 and the first water-blocking layer 140. The water vapor transmission rate (WVTR) of the first water-blocking layer 140 is not greater than 1x10 -2 g / m 2 day, and the thickness of the first water-blocking layer 140 is not greater than 50 μm. The material of the first water-blocking layer 140 can be selected from moisture-proof materials such as copper, aluminum, polyvinylidene fluoride, and tetrafluoroethylene. Preferably, the water vapor transmission rate (WVTR) of the first water-blocking layer 140 is 0.0 g / m 2 ·day.

[0032] See also Figure 2 and Figure 3The first water-blocking layer 140 has a projection 141 on the carrier 110 , the solder mask 130 is located in the projection 141 of the first water-blocking layer, and the first water-blocking layer 140 completely covers the solder mask 130 .

[0033] See also Figure 2 and Figure 3 In this embodiment, the circuit board 100 further includes a second water-blocking layer 150. The first water-blocking layer 140 is integrated with the solder mask 130 by the second water-blocking layer 150. The water vapor transmission rate (WVTR) of the second water-blocking layer 150 is not greater than 10 g / m 2 · day, and the thickness of the second water-blocking layer 150 is not greater than 80 μm. Preferably, the second water-blocking layer 150 is adhesive, and the material of the second water-blocking layer 150 can be selected from pressure-sensitive adhesive materials such as acrylic and epoxy resin.

[0034] See also Figure 2 and Figure 4 In this embodiment, the circuit board 100 further includes a third water-blocking layer 160, which covers the first water-blocking layer 140, and the water vapor transmission rate (WVTR) of the third water-blocking layer 160 is not greater than 0.6 g / m 2 ·day, and the thickness of the third water-blocking layer 160 is not greater than 50 μm. The material of the third water-blocking layer 160 can be selected from moisture-proof materials such as polyimide and polyethylene terephthalate.

[0035] See also Figure 2 and Figure 4 The third water-blocking layer 160 has a projection 161 on the carrier 110 . The first water-blocking layer 140 is located in the projection 161 of the third water-blocking layer 160 , and the third water-blocking layer 160 completely covers the first water-blocking layer 140 .

[0036] See also Figure 2 and Figure 4 Preferably, the circuit board 100 further includes an adhesive layer 170, and the third water-blocking layer 160 is attached to the first water-blocking layer 140 by the adhesive layer 170, so that the first water-blocking layer 140 and the third water-blocking layer 160 are integrated into one body. The water vapor transmission rate (WVTR) of the adhesive layer 170 is not greater than 10g / m 2 day, and the thickness of the adhesive layer 170 is not greater than 80 μm.

[0037] See also Figure 3During the manufacturing process, transportation, or storage environment, if liquid or moisture adheres to the first water-blocking layer 140, the first water-blocking layer 140, or the first water-blocking layer 140 and the second water-blocking layer 150, prevents the liquid or moisture from penetrating into the solder mask 130. This prevents the liquid or moisture, or corrosive elements (such as chlorine) carried by the liquid or moisture from penetrating into the solder mask 130 and the circuit layer 120, thereby preventing the circuit layer 120 from being oxidized or corroded, thereby preventing the structure and electrical reliability of the circuit board 100 from being affected.

[0038] See also Figure 4 During the manufacturing process, transportation, or storage environment, if liquid or moisture adheres to the third water-blocking layer 160, the third water-blocking layer 160, or the third water-blocking layer 160, the first water-blocking layer 140, and the second water-blocking layer 150 prevent the liquid or moisture from penetrating into the solder mask 130. This prevents the liquid or moisture, or corrosive elements (such as chlorine) carried by the liquid or moisture from penetrating into the solder mask 130 and the circuit layer 120, thereby preventing the circuit layer 120 from being oxidized or corroded, thereby preventing the structure and electrical reliability of the circuit board 100 from being affected.

[0039] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment as above, it is not used to limit the present invention. Any technician familiar with this profession can make some changes or modifications to equivalent embodiments of the technical content disclosed above without departing from the scope of the technical solution of the present invention. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention are still within the scope of the technical solution of the present invention.

Claims

1. A circuit board, characterized in that: Include: carrier board; A circuit layer is disposed on the carrier board, and the circuit layer has a plurality of inner pins and a plurality of outer pins; a solder mask layer covering the circuit layer and exposing the inner pins and the outer pins; and At least one first water-blocking layer covers the solder mask layer, so that the circuit layer and the solder mask layer are located between the carrier and the first water-blocking layer, and the water vapor permeability of the first water-blocking layer is not greater than 1x10 -2 g / m 2 ·day.

2. The circuit board according to claim 1, wherein: The first water-blocking layer has a projection on the carrier board, the solder mask layer is located in the projection, and the first water-blocking layer completely covers the solder mask layer.

3. The circuit board according to claim 1, wherein: The thickness of the first water-blocking layer is no more than 50 μm.

4. The circuit board according to claim 1, wherein: It also includes a second water-blocking layer, the first water-blocking layer is integrated with the second water-blocking layer and the solder mask layer, and the water vapor permeability of the second water-blocking layer is not greater than 10g / m 2 ·day.

5. The circuit board according to claim 4, wherein: The second water-blocking layer has adhesiveness.

6. The circuit board according to claim 5, wherein: The thickness of the second water-blocking layer is no more than 80 μm.

7. The circuit board according to claim 1 or 4, wherein: It also includes a third water-blocking layer, which covers the first water-blocking layer, and the water vapor permeability of the third water-blocking layer is not greater than 0.6g / m 2 ·day.

8. The circuit board according to claim 7, wherein: The third water-blocking layer has a projection on the carrier board, the first water-blocking layer is located in the projection of the third water-blocking layer, and the third water-blocking layer completely covers the first water-blocking layer.

9. The circuit board according to claim 7, wherein: The thickness of the third water-blocking layer is no more than 50 μm.

10. The circuit board according to claim 7, wherein: It comprises an adhesive layer, and the third water-blocking layer is attached to the first water-blocking layer via the adhesive layer.

11. The circuit board according to claim 10, wherein: The water vapor transmission rate of the adhesive layer is not more than 10g / m 2 ·day.

12. The circuit board according to claim 11, wherein: The thickness of the adhesive layer is no more than 80 μm.