Detection circuit for measuring switch electric energy pulse terminal

Abstract

The utility model discloses a detection circuit for measuring an electric energy pulse terminal of a switch, which comprises a measuring switch, and the 12V output end of the measuring switch is electrically connected with a power conversion circuit; an active pulse terminal of the measuring switch is electrically connected with the first counter circuit, and a reactive pulse terminal of the measuring switch is electrically connected with the second counter circuit; the first counter circuit is electrically connected with the first output holding circuit, and the second counter circuit is electrically connected with the second output holding circuit. According to the utility model, the defect that the conventional power method detection circuit cannot test whether the pulse terminal is normal or not is overcome.

Description

Technical Field

[0001] The utility model relates to the field of electronic circuits, in particular to a detection circuit for measuring switch electric energy pulse terminals. Background Art

[0002] Currently, measuring switch accuracy is verified using two methods: pulse and power. The pulse method compares the energy pulses output by the measuring switch with those of the standard meter after the measured switch and the standard meter record the same voltage and current, calculating the error. The power method uses 485 communication to read the measured data from the measuring switch and the standard meter, respectively, after the measured switch and the standard meter record the same voltage and current. The error is then determined by comparing the data. A disadvantage of the pulse method is that when verifying low-current metering accuracy, the energy pulse interval is long, requiring a long wait before accuracy data is obtained.

[0003] The disadvantage of the power method is that it uses a pulse terminal to test the meter, but it cannot determine whether the pulse output is not normal or the measurement switch is not sending a pulse signal. Therefore, a new circuit is needed for relevant detection. Utility Model Content

[0004] In order to solve the above technical problems, the utility model proposes a detection circuit for measuring the switch power pulse terminal.

[0005] The purpose of the utility model is achieved through the following technical solutions:

[0006] A detection circuit for measuring the electric energy pulse terminal of a switch includes a measuring switch 5, wherein the 12V output terminal of the measuring switch 5 is electrically connected to a power conversion circuit 6; the active pulse terminal of the measuring switch 5 is electrically connected to a first counter circuit 1, and the reactive pulse terminal of the measuring switch 5 is electrically connected to a second counter circuit 2; the first counter circuit 1 is electrically connected to a first output holding circuit 3, and the second counter circuit 2 is electrically connected to a second output holding circuit 4.

[0007] A further improvement is that the first counter circuit 1 includes a second trigger U2, a third trigger U3 and a fourth trigger U4; the J port and the K port of the second trigger U2, the third trigger U3 and the fourth trigger U4 are electrically connected to one end of the second resistor R2, and the other end of the second resistor R2 is electrically connected to the output end of the power conversion circuit; the R ports of the second trigger U2, the third trigger U3 and the fourth trigger U4 are electrically connected to one end of the first resistor R1 and one end of the third capacitor C3; the other end of the first resistor R1 is electrically connected to the output end of the power conversion circuit, and the other end of the third capacitor C3 is grounded; the C port of the second trigger U2 is electrically connected to the active pulse terminal of the measurement switch 5, the Q port of the second trigger U2 is electrically connected to the C port of the third trigger U3, the Q port of the third trigger U3 is electrically connected to the C port of the fourth trigger U4, and the Q port of the fourth trigger U4 is electrically connected to the first output holding circuit 3.

[0008] As a further improvement, the first output holding circuit 3 includes a first MOS transistor V1, the gate of the first MOS transistor V1 is electrically connected to the Q port of the four-flip-flop U4, the source of the first MOS transistor V1 is grounded and electrically connected to one end of the switch of the relay K1, the drain of the first MOS transistor V1 is electrically connected to the other end of the switch of the relay K1 and one end of the iron core coil of the relay K1, the other end of the iron core coil of the relay K1 is electrically connected to the cathode of the first light-emitting diode D1, and the anode of the first light-emitting diode D1 is electrically connected to the output end of the power conversion circuit.

[0009] As a further improvement, the first counter circuit 1 is identical to the second counter circuit 2 , and the first output holding circuit 3 is identical to the second output holding circuit 4 .

[0010] As a further improvement, the power conversion circuit includes a power chip U1, the input end of the power chip U1 is electrically connected to one end of the second capacitor C2 and the 12V output end of the measuring switch 5; the output end of the power chip U1 is electrically connected to one end of the first capacitor C1 and outputs a 5V voltage; the other end of the first capacitor C1, the other end of the second capacitor C2 and the ground end of the power chip U1 are all grounded.

[0011] The beneficial effects of the present invention are:

[0012] The present invention solves the defect that the existing power detection circuit cannot test whether the pulse terminal is normal. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The present invention is further described with reference to the accompanying drawings, but the contents in the accompanying drawings do not constitute any limitation to the present invention.

[0014] Figure 1 This is a schematic diagram of the circuit structure of the utility model. DETAILED DESCRIPTION

[0015] In order to make the purpose, technical solutions and advantages of the utility model more clear, the utility model is further described in detail below with reference to the accompanying drawings and examples.

[0016] Example 1

[0017] like Figure 1 The circuit shown here is a detection circuit for the power energy pulse terminals of a measurement switch, comprising a measurement switch 5, the 12V output terminal of which is electrically connected to a power conversion circuit 6; the active pulse terminal of the measurement switch 5 is electrically connected to a first counter circuit 1, and the reactive pulse terminal of the measurement switch 5 is electrically connected to a second counter circuit 2; the first counter circuit 1 is electrically connected to a first output holding circuit 3, and the second counter circuit 2 is electrically connected to a second output holding circuit 4. The first counter circuit 1 and the second counter circuit 2 have identical circuit structures, and the first output holding circuit 3 and the second output holding circuit 4 have identical circuit structures.

[0018] The specific first counter circuit 1 includes a second trigger U2, a third trigger U3 and a fourth trigger U4; the J port and K port of the second trigger U2, the third trigger U3 and the fourth trigger U4 are electrically connected to one end of the second resistor R2, and the other end of the second resistor R2 is electrically connected to the output end of the power conversion circuit; the R port of the second trigger U2, the third trigger U3 and the fourth trigger U4 are electrically connected to one end of the first resistor R1 and one end of the third capacitor C3; the other end of the first resistor R1 is electrically connected to the output end of the power conversion circuit, and the other end of the third capacitor C3 is grounded; the C port of the second trigger U2 is electrically connected to the active pulse terminal of the measurement switch 5, the Q port of the second trigger U2 is electrically connected to the C port of the third trigger U3, the Q port of the third trigger U3 is electrically connected to the C port of the fourth trigger U4, and the Q port of the fourth trigger U4 is electrically connected to the first output holding circuit 3. The first output holding circuit 3 includes a first MOS transistor V1, the gate of the first MOS transistor V1 is electrically connected to the Q port of the quad-flip flop U4, the source of the first MOS transistor V1 is grounded and electrically connected to one end of the switch of the relay K1, the drain of the first MOS transistor V1 is electrically connected to the other end of the switch of the relay K1 and one end of the iron core coil of the relay K1, the other end of the iron core coil of the relay K1 is electrically connected to the cathode of the first light-emitting diode D1, and the anode of the first light-emitting diode D1 is electrically connected to the output end of the power conversion circuit.

[0019] The power conversion circuit includes a power chip U1, the input end of the power chip U1 is electrically connected to one end of the second capacitor C2 and the 12V output end of the measurement switch 5; the output end of the power chip U1 is electrically connected to one end of the first capacitor C1 and outputs a 5V voltage; the other end of the first capacitor C1, the other end of the second capacitor C2 and the ground end of the power chip U1 are all grounded.

[0020] Here’s how to use it:

[0021] 1. Utilize the 12V output of the measurement switch itself to provide 5V power through the power conversion circuit composed of the first and second capacitors C1, C2 and the power chip U1.

[0022] 2. The counter circuit is composed of the first, second and third resistors R1, R2 and R3, the third capacitor C3, and the second, third and fourth triggers U2, U3 and U4. When the input port of U2 detects 4 active energy pulses, U4 outputs a high level. Detecting multiple pulses can ensure the reliability of detection.

[0023] 3. The output holding circuit is composed of the first MOS tube V1, relay K1 and the first light-emitting diode D1. When U4 outputs a high level, the output holding circuit is self-locked through the relay to ensure that D1 continues to light up and output the detection result.

[0024] 4. During the power method meter verification process, at the small current meter verification point, the output pulse interval is long and the pulse output is slow. At the large current meter verification point, the output pulse interval is short and the pulse output is fast. However, the number of pulses output in a round of meter verification is much greater than 4. Therefore, 4 pulses are detected to ensure detection reliability. When the first light-emitting diode D1 lights up, it means that the test pulse terminal is not defective. When the first light-emitting diode D1 is not lit, it means that the test pulse terminal is defective. The number of input pulses can also be adjusted by adjusting the number of triggers.

[0025] 5. The same principle as above can be used to detect reactive pulse terminals.

[0026] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention and are not intended to limit the scope of protection of the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the essence and scope of the technical solution of the present invention.

Claims

1. A detection circuit for measuring a switch power pulse terminal, characterized in that: The invention comprises a measuring switch (5), wherein a 12V output terminal of the measuring switch (5) is electrically connected to a power conversion circuit (6); an active pulse terminal of the measuring switch (5) is electrically connected to a first counter circuit (1), and a reactive pulse terminal of the measuring switch (5) is electrically connected to a second counter circuit (2); the first counter circuit (1) is electrically connected to a first output holding circuit (3), and the second counter circuit (2) is electrically connected to a second output holding circuit (4).

2. The detection circuit for measuring the switch power pulse terminal according to claim 1, characterized in that: The first counter circuit (1) comprises a second trigger (U2), a third trigger (U3) and a fourth trigger (U4); the J port and the K port of the second trigger (U2), the third trigger (U3) and the fourth trigger (U4) are electrically connected to one end of the second resistor (R2), and the other end of the second resistor (R2) is electrically connected to the output end of the power conversion circuit; the R port of the second trigger (U2), the third trigger (U3) and the fourth trigger (U4) are electrically connected to one end of the first resistor (R1) and one end of the third capacitor (C3); the other end of the first resistor (R1) is electrically connected to the output end of the power conversion circuit, and the other end of the third capacitor (C3) is grounded; the C port of the second trigger (U2) is electrically connected to the active pulse terminal of the measurement switch (5), the Q port of the second trigger (U2) is electrically connected to the C port of the third trigger (U3), the Q port of the third trigger (U3) is electrically connected to the C port of the fourth trigger (U4), and the Q port of the fourth trigger (U4) is electrically connected to the first output holding circuit (3).

3. The detection circuit for measuring the switch power pulse terminal according to claim 2, characterized in that: The first output holding circuit (3) comprises a first MOS transistor (V1), the gate of the first MOS transistor (V1) is electrically connected to the Q port of the quad-flip flop (U4), the source of the first MOS transistor (V1) is grounded and electrically connected to one end of the switch of the relay (K1), the drain of the first MOS transistor (V1) is electrically connected to the other end of the switch of the relay (K1) and one end of the iron core coil of the relay (K1), the other end of the iron core coil of the relay (K1) is electrically connected to the negative electrode of the first light-emitting diode (D1), and the positive electrode of the first light-emitting diode (D1) is electrically connected to the output end of the power conversion circuit.

4. The detection circuit for measuring the switch power pulse terminal according to claim 1, wherein: The first counter circuit (1) is identical to the second counter circuit (2), and the first output holding circuit (3) is identical to the second output holding circuit (4).

5. The detection circuit for measuring the switch power pulse terminal according to claim 1, wherein: The power conversion circuit comprises a power chip (U1), wherein the input end of the power chip (U1) is electrically connected to one end of the second capacitor (C2) and the 12V output end of the measuring switch (5); the output end of the power chip (U1) is electrically connected to one end of the first capacitor (C1) and outputs a 5V voltage; the other end of the first capacitor (C1), the other end of the second capacitor (C2) and the ground end of the power chip (U1) are all grounded.

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