Input and output voltage sampling circuit

By introducing a differential operational amplifier and an isolated communication circuit into the voltage sampling circuit, the problem that the AD chip cannot filter out the common-mode signal after directly collecting the divided voltage is solved, achieving stronger anti-interference ability and cost reduction.

CN223471079UActive Publication Date: 2025-10-24SUZHOU WEICHUANG ELECTRICAL EQUIP TECH
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Patent Information

Application Number
CN202422346304.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-09-25
Publication Date
2025-10-24
Estimated Expiration
2034-09-25

AI Technical Summary

Technical Problem

In the prior art, AD chip sampling directly collects the voltage after voltage division, which cannot filter out the common mode signal, has weak anti-interference ability, and increases material costs.

Method used

An input and output voltage sampling circuit is used, including an input high-resistance voltage divider module, an input three-phase voltage sampling circuit, an output high-resistance voltage divider module, and an output three-phase voltage sampling circuit. A differential operational amplifier is used to filter out common-mode signals, and an isolated communication circuit is used to improve anti-interference ability and reduce costs.

Benefits of technology

It effectively filters out common-mode signals, improves anti-interference capability, reduces material costs, and achieves improvements in stability and anti-electromagnetic interference capability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses an input and output voltage sampling circuit, which comprises an input high-resistance voltage dividing module, an input three-phase voltage sampling circuit, an output high-resistance voltage dividing module, an output three-phase voltage sampling circuit, a digital conversion module, an isolation communication circuit and a main control board, the input high-resistance voltage division module is electrically connected with RST three-phase ends of the input ends of electrical components in the circuit, the output high-resistance voltage division module is electrically connected with UVW three-phase ends of the output ends of the electrical components in the circuit, and the input three-phase voltage sampling circuit is electrically connected with the input high-resistance voltage division module and the digital conversion module. The output three-phase voltage sampling circuit is electrically connected with the output high-resistance voltage dividing module and the digital conversion module. According to the utility model, the in-phase input ends of the first differential operational amplifier and the second differential operational amplifier in the input three-phase voltage sampling circuit are connected, and a one-phase high resistor is multiplexed, so that the cost is reduced, common-mode signals are effectively filtered out, and the anti-interference capability is improved.
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Description

TECHNICAL FIELD

[0001] The utility model relates to a voltage sampling structure especially relates to an input output voltage sampling circuit. BACKGROUND

[0002] Chinese utility model patent CN203965505U discloses a frequency converter voltage detection device based on optical fiber communication, and the voltage sampling circuit is composed of a resistor and a low-voltage resistor, the voltage after high resistance voltage division is directly sampled by an AD chip, and the signal is transmitted to a CPLD to communicate with a main control board through an optical fiber. The technical scheme has the following defects: 1. the AD chip directly samples the voltage after voltage division, without being subjected to an operational amplifier, so that common-mode signals cannot be filtered out, and the anti-interference capability is weak; and 2. the CPLD chip is added in the rear stage of the AD chip to communicate with the main control board, thereby increasing the material cost. UTILITY MODEL CONTENT

[0003] The utility model embodiment solves the technical problem that the device on the market directly samples the voltage after voltage division by an AD chip, without being subjected to an operational amplifier, so that common-mode signals cannot be filtered out, and the anti-interference capability is weak, and the material cost is increased.

[0004] To solve the above problems, the utility model embodiment provides an input output voltage sampling circuit, which comprises an input high resistance voltage division module, an input three-phase voltage sampling circuit, an output high resistance voltage division module and an output three-phase voltage sampling circuit.

[0005] Optionally, the input three-phase voltage sampling circuit comprises an input RS two-phase voltage sampling circuit and an input RT two-phase voltage sampling circuit, the input RS two-phase voltage sampling circuit is electrically connected with the input high resistance voltage division module, and is used for measuring the voltage of the RS two-phase end of the input end of the circuit electric element; and the input RT two-phase voltage sampling circuit is electrically connected with the input high resistance voltage division module, and is used for measuring the voltage of the RT two-phase end of the input end of the circuit electric element.

[0006] Optionally, the input RS two-phase voltage sampling circuit is electrically connected with the input RT two-phase voltage sampling circuit.

[0007] Optionally, the input RS two-phase voltage sampling circuit comprises a first differential operational amplifier, resistors R3, R4, R5, R6, R7, R8, R9, capacitors C1, C2, C3, one end of the resistor R3 is connected with the input high-resistance voltage dividing module, the other end of the resistor R3 is connected with one end of the resistor R5 and the inverting input terminal of the first differential operational amplifier respectively, one end of the resistor R4 is connected with the input high-resistance voltage dividing module, the other end of the resistor R4 is connected with one end of the resistor R6, the non-inverting input terminal of the first differential operational amplifier and the input RT two-phase voltage sampling circuit respectively, the other end of the resistor R5 is connected with the output terminal of the first differential operational amplifier and the resistor R7 respectively, the two ends of the resistor R9 are connected with the resistor R7, the resistor R8 and the capacitor C3 respectively, the other end of the resistor R8 is connected with a 5v power supply, the other end of the capacitor C3 is grounded, the capacitor C1 is connected across the resistor R5, and the capacitor C2 is connected across the resistor R6.

[0008] Optionally, the input RT two-phase voltage sampling circuit comprises resistors R11, R12, R13, R14, R15, capacitors C4, C5 and a second differential operational amplifier, one end of the resistor R11 is connected with the input high-resistance voltage dividing module, the other end of the resistor R11 is connected with one end of the resistor R12 and the inverting input terminal of the second differential operational amplifier respectively, the other end of the resistor R12 is connected with one end of the resistor R13 and the output terminal of the second differential operational amplifier respectively, the two ends of the resistor R15 are connected with the resistor R13, the resistor R14 and the capacitor C5 respectively, the other end of the resistor R14 is connected with a 5v power supply, the other end of the capacitor C5 is grounded, the non-inverting input terminal of the second differential operational amplifier is connected with the input RS two-phase voltage sampling circuit, and the capacitor C4 is connected across the resistor R12.

[0009] Optionally, a first input clamping diode is further connected between the resistor R3 and the first differential operational amplifier, pin 3 of the first input clamping diode is connected with the resistor R3 and the first differential operational amplifier respectively, pin 1 of the first input clamping diode is connected with a -15v power supply, and pin 2 of the first input clamping diode is connected with a +15v power supply.

[0010] Optionally, the input TVS protection circuit is electrically connected with the input high-resistance voltage dividing module and the input three-phase voltage sampling circuit respectively at one end and grounded at the other end, and is used for conducting when the voltage exceeds a threshold value.

[0011] Optionally, the input three-phase voltage sampling circuit and the output three-phase voltage sampling circuit have the same circuit structure.

[0012] Optionally, the input and output voltage sampling circuit further comprises a digital conversion module, an isolation communication circuit and a main control board, the input three-phase voltage sampling circuit is electrically connected with an input high-resistance voltage dividing module and the digital conversion module respectively, the output three-phase voltage sampling circuit is electrically connected with an output high-resistance voltage dividing module and the digital conversion module respectively, and the isolation communication circuit is electrically connected with the digital conversion module and the main control board respectively.

[0013] Optionally, the isolation communication circuit comprises a patch digital isolator, a noise reduction resistor R16, a low-pass filter circuit, decoupling capacitors C8 and C10, a VI1 pin of the patch digital isolator is connected with the digital conversion module through the noise reduction resistor R16, the digital conversion module is further connected with a VO2 pin of the patch digital isolator through the low-pass filter circuit, one end of the decoupling capacitor C8 is grounded, and the other end is connected with a VDDA end of the patch digital isolator and a 5v power supply respectively, one end of the decoupling capacitor C10 is grounded, and the other end is connected with a VDDB end of the patch digital isolator and the 5v power supply respectively.

[0014] Compared with the prior art, the technical effects that can be achieved by the embodiment of the utility model include:

[0015] The embodiment of the utility model has the advantages of strong anti-electromagnetic interference ability and good stability, the non-inverting input terminals of the first differential operational amplifier and the second differential operational amplifier in the input three-phase voltage sampling circuit are connected, one-phase high resistance is multiplexed, which is conducive to reducing the cost, the first differential operational amplifier and the second differential operational amplifier can effectively filter out common-mode signals and improve the anti-interference ability. BRIEF DESCRIPTION OF DRAWINGS

[0016] The drawings incorporated into the specification and forming a part thereof show embodiments consistent with the present utility model and together with the specification serve to explain the principles of the present utility model.

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced below, and obviously, other drawings can also be obtained by those skilled in the art without creative labor under the premise of not paying the creative labor.

[0018] One or more embodiments are exemplarily illustrated by the pictures in the drawings corresponding thereto, and these exemplary illustrations do not constitute a limitation on the embodiments, elements with the same reference numerals in the drawings represent similar elements, and the drawings do not constitute a proportional limitation unless specially stated.

[0019] Figure 1 The circuit diagram of the present utility model and the electric motor and the electric elements in the circuit.

[0020] Figure 2 The utility model inputs RS two -phase voltage sampling circuit connection part circuit diagram.

[0021] Figure 3 The utility model inputs RT two -phase voltage sampling circuit connection part circuit diagram.

[0022] Figure 4 The utility model digital conversion module and the circuit diagram of isolation communication circuit.

[0023] Reference numerals

[0024] 1, input high resistance voltage division module;2, input three -phase voltage sampling circuit;3, output high resistance voltage division module;4, output three -phase voltage sampling circuit;5, digital conversion module;6, isolation communication circuit;7, main control board;8, input RS two -phase voltage sampling circuit;9, input RT two -phase voltage sampling circuit;10, first differential operational amplifier;11, second differential operational amplifier;12, input TVS protection circuit;13, first input clamping diode;14, second input clamping diode;15, third input clamping diode;16, fourth input clamping diode;17, fifth input clamping diode;18, digital isolator. DETAILED DESCRIPTION

[0025] The technical solutions in the embodiments will be described clearly and completely below with reference to the drawings in the embodiments of the utility model. Obviously, the embodiments described below are only part of the embodiments of the utility model, not all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the utility model.

[0026] It should be understood that when used in the specification and the appended claims, the terms "comprise" and "include" indicate the presence of described features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0027] It should also be understood that the terms used in the specification of the embodiments of the utility model are only for the purpose of describing specific embodiments and are not intended to limit the embodiments of the utility model. As used in the specification of the embodiments of the utility model and the appended claims, unless otherwise clear from the context, the singular forms "a", "an" and "the" are intended to include the plural forms.

[0028] Please refer to Figures 1-4The utility model embodiment provides an input output voltage sampling circuit, it is used to the input output end voltage sampling of electric component in circuit, the electric component to be detected in the utility model is frequency converter main circuit, including but not limited to this, the specific electric component can be selected according to actual, including input high resistance voltage dividing module 1, input three phase voltage sampling circuit 2, output high resistance voltage dividing module 3, output three phase voltage sampling circuit 4, digital conversion module 5, isolation communication circuit 6 and main control board 7, input high resistance voltage dividing module 1 is electrically connected with the RST three phase end of electric component input end in circuit respectively, output three phase voltage sampling circuit 4 is electrically connected with the UVW three phase end of electric component output end in circuit, input three phase voltage sampling circuit 2 is electrically connected with input high resistance voltage dividing module 1 and digital conversion module 5 respectively, output three phase voltage sampling circuit 4 is electrically connected with output high resistance voltage dividing module 3 and digital conversion module 5 respectively, isolation communication circuit 6 is electrically connected with digital conversion module 5 and main control board 7 respectively.The utility model collects voltage signal respectively in the input and output of frequency converter main circuit, and signal conditioning is carried out through pull-up, filtering, and input output voltage signal is transmitted to digital conversion module 5 and carries out digital conversion processing, and through isolation communication circuit 6, it is transmitted to main control board 7 by isolated SCI communication, has the advantages of small size, low cost, high reliability.

[0029] Please refer to Figures 2-3 Input three phase voltage sampling circuit 2 includes input RS two phase voltage sampling circuit 8 and input RT two phase voltage sampling circuit 9, input RS two phase voltage sampling circuit 8 is electrically connected with input high resistance voltage dividing module 1 and digital conversion module 5 respectively, is used to measure the voltage of RS two phase end of electric component input end in circuit, input RT two phase voltage sampling circuit 9 is electrically connected with input high resistance voltage dividing module 1 and digital conversion module 5 respectively, is used to measure the voltage of RT two phase end of electric component input end in circuit.Input RS two phase voltage sampling circuit 8 is also electrically connected with input RT two phase voltage sampling circuit 9, because the three phase of three phase alternating current is 0, thus the voltage of ST two phases can be obtained by the voltage obtained at input RS two phase voltage sampling circuit 8 and input RT two phase voltage sampling circuit 9 in combination with main control board 7.

[0030] Please refer to Figure 2Further, the input RS two-phase voltage sampling circuit 8 of the utility model includes first differential operational amplifier 10, resistance R3, R4, R5, R6, R7, R8, R9, capacitor C1, C2, C3, one end of resistance R3 is connected with input high resistance voltage division module 1, the other end is connected with one end of resistance R5 and the inverting input terminal of first differential operational amplifier 10 respectively, one end of resistance R4 is connected with input high resistance voltage division module 1, the other end is connected with one end of resistance R6, the noninverting input terminal of first differential operational amplifier 10 and input RT two-phase voltage sampling circuit 9 respectively, the other end of resistance R5 is connected with the output terminal of first differential operational amplifier 10 and resistance R7 respectively, the two ends of resistance R9 are connected with resistance R7, resistance R8, capacitor C3 and digital conversion module 5 respectively, the other end of resistance R8 is connected with 5v power supply, the other end of capacitor C3 is grounded, capacitor C1 is connected in the two ends of resistance R5, capacitor C2 is connected in the two ends of resistance R6.The setting of first differential operational amplifier 10 effectively filters out common-mode signal, improves the anti-interference ability.

[0031] Please refer to Figure 3The input RT two-phase voltage sampling circuit 9 comprises resistors R11, R12, R13, R14, R15, capacitors C4 and C5, and a second differential operational amplifier 11, one end of the resistor R11 is connected with the input high resistance voltage dividing module 1, the other end of the resistor R11 is connected with one end of the resistor R12 and the inverting input end of the second differential operational amplifier 11 respectively, the other end of the resistor R12 is connected with one end of the resistor R13 and the output end of the second differential operational amplifier 11 respectively, the two ends of the resistor R15 are connected with the resistor R13, the resistor R14, the capacitor C5 and the digital conversion module 5 respectively, the other end of the resistor R14 is connected with a 5V power supply, the other end of the capacitor C5 is grounded, the non-inverting input end of the second differential operational amplifier 11 is connected with the input RS two-phase voltage sampling circuit 8, and the capacitor C4 is connected between the two ends of the resistor R12.

[0032] In the utility model, the first differential operational amplifier 10 outputs voltage is pulled up to 5V through resistors R7 and R8, because RST three-phase is alternating current, the output voltage of the first differential operational amplifier 10 is also alternating current, has positive and negative voltage, the maximum value is 5V, the minimum value is -5V, the digital conversion module 5 used is single power 5V power supply and cannot sample negative voltage, after the first differential operational amplifier 10 is pulled up to 5V through resistors, the maximum value is 5V, the minimum value is 0V, the voltage entering the digital conversion module 5 is all positive voltage, that is, normal sampling can be realized.

[0033] Please continue to refer to Figure 2The input-output voltage sampling circuit further comprises an input TVS protection circuit 12, one end of the input TVS protection circuit 12 is electrically connected with the input high-resistance voltage division module 1 and the input three-phase voltage sampling circuit 2 respectively, and the other end is grounded, and the input TVS protection circuit 12 is used for being turned on after voltage exceeds a threshold value, and preventing damage to a subsequent circuit.

[0034] Please continue to refer to Figure 2 The input-output voltage sampling circuit further comprises a first input clamping diode 13, a second input clamping diode 14, a third input clamping diode 15, a fourth input clamping diode 16 and a fifth input clamping diode 17, a pin 3 of the first input clamping diode 13 is connected with a resistor R3 and a first differential operational amplifier 10 respectively, a pin 1 of the first input clamping diode 13 is connected with a-15v power supply, and a pin 2 of the first input clamping diode 13 is connected with a +15v power supply, when an inverse input voltage of the first differential operational amplifier 10 exceeds +15V, a diode between the pin 3 and the pin 2 is turned on, and the inverse input voltage of the first differential operational amplifier 10 is clamped to +15V, when the inverse input voltage of the first differential operational amplifier 10 is less than-15V, a diode between the pin 1 and the pin 3 is turned on, and the inverse input voltage of the first differential operational amplifier 10 is clamped to-15V, so as to prevent damage to the first differential operational amplifier 10 when input voltage exceeds a threshold value of the first differential operational amplifier 10, and protection is realized. The second input clamping diode 14 is connected between a resistor R4 and a non-inverting input end of the first differential operational amplifier 10, the third input clamping diode 15 is connected between a resistor R9 and a digital conversion module 5, the fourth input clamping diode 16 is connected between a resistor R11 and an inverse input end of the first differential operational amplifier 10, and the fifth input clamping diode 17 is connected between a resistor R15 and the digital conversion module 5, the structures of the second input clamping diode 14, the third input clamping diode 15, the fourth input clamping diode 16 and the fifth input clamping diode 17 are consistent with the structure of the first input clamping diode 13, and details are not repeated here.

[0035] Please refer to Figure 4The utility model discloses a digital conversion module 5 is AD sampling chip, adopts 5v power supply, and its ADC-RS, ADC-RT, ADC-UV, ADC-UW are the line voltage signal of input RS, RT and output UV, UW that gathered, carry out digital quantity conversion processing to the four analog signal of ADC-RS, ADC-RT, ADC-UV, ADC-UW that gathered, isolation communication circuit 6 includes paster digital isolator 18, noise reduction resistance R16, low pass filter circuit, decoupling capacitor C8, C10, and paster digital isolator 18's VI1 pin is connected with digital conversion module 5 through noise reduction resistance R16, and digital conversion module 5 is also connected with paster digital isolator 18's VO2 pin through low pass filter circuit, and one end of decoupling capacitor C8 is grounded, and the other end is connected with paster digital isolator 18's VDDA end and 5v power supply respectively, and one end of decoupling capacitor C10 is grounded, and the other end is connected with paster digital isolator 18's VDDB end and 5v power supply respectively, wherein, low pass filter circuit includes resistance R17 and capacitor C9, and one end of resistance R17 is connected with one end of capacitor C9 and digital conversion module 5 respectively, and the other end is connected with paster digital isolator 18's VO2 pin, and the other end of capacitor C9 is connected with paster digital isolator 18's GNDA pin and grounded. Paster digital isolator 18 is divided into primary side and secondary side, and the primary side power supply is 5V / GND;The secondary side is powered by 5V1 / GND1, and it is isolated from the 5V / GND power supply, and the 5V1 / GND1 power supply is taken from the master control board 7;The SCI output signal SCI-TXD of AD sampling chip is connected in paster digital isolator 18's VI1 pin through noise reduction resistance R16, and noise reduction resistance R16 can suppress the high frequency noise of signal SCI-TXD in transmission, and its resistance value is generally small;The TXD-AD signal output by the VO1 pin of paster digital isolator 18 is sent to the master control board 7.

[0036] Compared with the prior art, the technical effects that the utility model embodiment can achieve include:

[0037] The utility model embodiment is through setting up isolation communication circuit, and the anti -electromagnetic interference ability is stronger, and the stability is good, and the first difference operational amplifier, the same phase input end of second difference operational amplifier in input three -phase voltage sampling circuit is connected, and multiplexing one phase high resistance is favorable for reducing cost, and the first difference operational amplifier, second difference operational amplifier can effectively filter out common mode signal, and improve anti -interference ability.

[0038] In the above embodiment, the description of each embodiment has its own emphasis, and the parts not described in detail in a certain embodiment can be referred to the related description of other embodiments.

[0039] In the description of the utility model, it is understood that the directions or positional relationships indicated by the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise" and the like are the directions or positional relationships shown based on the drawings, and are only for the convenience of describing the utility model and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the utility model.

[0040] In addition, the terms "first" and "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first" and "second" can explicitly or implicitly include one or more of the features. In the description of the utility model, the meaning of "multiple" is two or more than two, unless otherwise specifically limited.

[0041] In the utility model, unless otherwise specifically defined and limited, the terms "mounting", "connection", "connection", "fixing" and the like should be understood broadly, for example, it can be connected, or detachable, or integrated; it can be mechanical connection, or electrical connection; it can be directly connected, or indirectly connected through intermediate medium, or the communication or interaction relationship between two elements. For ordinary skilled in the art, the specific meaning of the above terms in the utility model can be understood according to the specific circumstances.

[0042] In the utility model, unless otherwise specifically defined and limited, the "upper" or "lower" of the first feature to the second feature can include the direct contact of the first and second features, or the contact of the first and second features through another feature between them. Moreover, the "upper", "upper" and "upper" of the first feature to the second feature include the vertical direction of the first feature above and oblique above the second feature, or only indicate that the horizontal height of the first feature is higher than that of the second feature. The "below", "below" and "below" of the first feature to the second feature include the vertical direction of the first feature below and oblique below the second feature, or only indicate that the horizontal height of the first feature is less than that of the second feature.

[0043] In the description of the present specification, the description referring to the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms should not be understood as necessarily referring to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in the present specification.

[0044] Obviously, those skilled in the art can make various modifications and variations to the present application without departing from the spirit and scope of the present application. Thus, these modifications and variations of the present application are intended to be included within the scope of the claims of the present application and equivalents thereof. Therefore, the present application is intended to include these modifications and variations.

[0045] The above is a specific embodiment of the present application, but the protection scope of the present application is not limited to this. Any skilled person in the art can easily think of various equivalent modifications or replacements within the technical range disclosed by the present application, and these modifications or replacements should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. An input and output voltage sampling circuit for sampling the input and output voltage of an electrical component in a circuit, characterized by: The input high resistance voltage dividing module is electrically connected with the RST three-phase terminal of the input end of the circuit component, and the output high resistance voltage dividing module is electrically connected with the UVW three-phase terminal of the output end of the circuit component.

2. The input-output voltage sampling circuit of claim 1, wherein: The input RS two-phase voltage sampling circuit is electrically connected with the input RT two-phase voltage sampling circuit.

3. The input-output voltage sampling circuit of claim 2, wherein: The input RS two-phase voltage sampling circuit comprises a first differential operational amplifier, resistors R3, R4, R5, R6, R7, R8, R9, capacitors C1, C2 and C3, one end of the resistor R3 is connected with the input high resistance voltage dividing module, the other end of the resistor R3 is connected with one end of the resistor R5 and the inverting input terminal of the first differential operational amplifier, one end of the resistor R4 is connected with the input high resistance voltage dividing module, the other end of the resistor R4 is connected with one end of the resistor R6, the non-inverting input terminal of the first differential operational amplifier and the input RT two-phase voltage sampling circuit, the other end of the resistor R5 is connected with the output terminal of the first differential operational amplifier and the resistor R7, the resistor R9 is connected with the resistor R7, the resistor R8 and the capacitor C3, the other end of the resistor R8 is connected with a 5v power supply, the other end of the capacitor C3 is grounded, the capacitor C1 is connected between the resistor R5, and the capacitor C2 is connected between the resistor R6.

4. The input-output voltage sampling circuit of claim 2, wherein: The input RS two-phase voltage sampling circuit comprises a first differential operational amplifier, resistors R3, R4, R5, R6, R7, R8, R9, capacitors C1, C2 and C3, one end of the resistor R3 is connected with the input high resistance voltage dividing module, the other end of the resistor R3 is connected with one end of the resistor R5 and the inverting input terminal of the first differential operational amplifier, one end of the resistor R4 is connected with the input high resistance voltage dividing module, the other end of the resistor R4 is connected with one end of the resistor R6, the non-inverting input terminal of the first differential operational amplifier and the input RT two-phase voltage sampling circuit, the other end of the resistor R5 is connected with the output terminal of the first differential operational amplifier and the resistor R7, the resistor R9 is connected with the resistor R7, the resistor R8 and the capacitor C3, the other end of the resistor R8 is connected with a 5v power supply, the other end of the capacitor C3 is grounded, the capacitor C1 is connected between the resistor R5, and the capacitor C2 is connected between the resistor R6.

5. The input-output voltage sampling circuit of claim 2, wherein: A first input clamping diode is further connected between the resistor R3 and the first differential operational amplifier, pin 3 of the first input clamping diode is connected with the resistor R3 and the first differential operational amplifier, pin 1 of the first input clamping diode is connected with a-15v power supply, and pin 2 of the first input clamping diode is connected with a+15v power supply.

6. The input-output voltage sampling circuit of claim 4, wherein: ​ 7. The input-output voltage sampling circuit of claim 1, wherein: The input-output voltage sampling circuit further comprises an input TVS protection circuit, one end of the input TVS protection circuit is electrically connected with the input high-resistance voltage dividing module and the input three-phase voltage sampling circuit respectively, and the other end is connected with a ground wire, and the input TVS protection circuit is used for conducting when the voltage exceeds a threshold value.

8. The input-output voltage sampling circuit of claim 1, wherein: The input three-phase voltage sampling circuit is consistent with the circuit structure of the output three-phase voltage sampling circuit.

9. The input-output voltage sampling circuit of claim 1, wherein: The input-output voltage sampling circuit further comprises a digital conversion module, an isolation communication circuit and a main control board, the input three-phase voltage sampling circuit is electrically connected with the input high-resistance voltage dividing module and the digital conversion module respectively, the output three-phase voltage sampling circuit is electrically connected with the output high-resistance voltage dividing module and the digital conversion module respectively, and the isolation communication circuit is electrically connected with the digital conversion module and the main control board respectively.

10. The input-output voltage sampling circuit of claim 9, wherein: The isolation communication circuit comprises a patch digital isolator, a noise reduction resistor R16, a low-pass filter circuit, decoupling capacitors C8 and C10, a VI1 pin of the patch digital isolator is connected with the digital conversion module through the noise reduction resistor R16, the digital conversion module is further connected with a VO2 pin of the patch digital isolator through the low-pass filter circuit, one end of the decoupling capacitor C8 is grounded, the other end is connected with a VDDA end of the patch digital isolator and a 5v power supply respectively, one end of the decoupling capacitor C10 is grounded, and the other end is connected with a VDDB end of the patch digital isolator and the 5v power supply respectively.

Citation Information

Patent Citations

  • Optical fiber communication-based voltage detection device for high-voltage frequency converter

    CN203965505U