Incremental encoder signal preprocessing circuit

Abstract

The utility model provides a signal preprocessing circuit of an incremental encoder, which comprises a preprocessing circuit arranged between the incremental encoder and a rear-end processing circuit, and the incremental encoder comprises a first output mode and a second output mode. The preprocessing circuit comprises a first resistance processing module connected with the first output mode and a second resistance processing module connected with the second output mode, and voltage released by the first output mode forms first preprocessing voltage through the first resistance processing module. Voltage released in the second output mode forms second preprocessing voltage through the second resistance processing module, and the preprocessing circuit further comprises a voltage processing module connected with the first preprocessing voltage and the second preprocessing voltage and an output resistance processing module arranged behind the voltage processing module. The second pre-processing voltage forms a third pre-processing voltage through the voltage processing module, the third pre-processing voltage forms an output voltage through the output resistance processing module, and the front-end signal can be converted into a unified output signal.

Description

Technical Field

[0001] This utility model relates to the field of circuit control technology, and in particular to an incremental encoder signal preprocessing circuit. Background Technology

[0002] In the existing technology, the various output forms of incremental encoders are inconsistent (e.g., single-ended output signals and differential output signals). Due to the different electrical output forms of incremental encoders, the robustness and flexibility of various back-end application circuit system designs are restricted. Therefore, it is urgent to design a preprocessing circuit to convert various front-end signals into a unified output signal. Utility Model Content

[0003] In view of the shortcomings of the prior art, the purpose of this utility model is to provide an incremental encoder signal preprocessing circuit, which aims to solve the technical problems mentioned in the background art.

[0004] To achieve the above objectives, this utility model is implemented through the following technical solution:

[0005] An incremental encoder signal preprocessing circuit includes a preprocessing circuit disposed between an incremental encoder and a back-end processing circuit. The incremental encoder includes a first output mode and a second output mode. The preprocessing circuit includes a first resistor processing module connected to the first output mode and a second resistor processing module connected to the second output mode. The voltage released by the first output mode is processed by the first resistor processing module to form a first preprocessed voltage, and the voltage released by the second output mode is processed by the second resistor processing module to form a second preprocessed voltage. The preprocessing circuit also includes a voltage processing module connected to the first preprocessed voltage and the second preprocessed voltage, and an output resistor processing module disposed after the voltage processing module. The second preprocessed voltage is processed by the voltage processing module to form a third preprocessed voltage, and the third preprocessed voltage is processed by the output resistor processing module to form an output voltage.

[0006] According to one aspect of the above technical solution, the first output mode includes a first signal line terminal one and a voltage reference point one, and the second output mode includes a first signal line terminal two and a voltage reference point two.

[0007] According to one aspect of the above technical solution, the first resistor processing module includes a first processing unit connected to the first signal line terminal and a second processing unit connected to the voltage reference point. The first processing unit includes a first conductive line and resistors one and three disposed on the first conductive line. One end of the first conductive line is supplied with voltage and the other end is grounded. The second processing unit includes a second conductive line and resistors two and four disposed on the second conductive line. One end of the second conductive line is supplied with voltage and the other end is grounded.

[0008] According to one aspect of the above technical solution, the second resistor processing module includes a third processing unit connected to the first signal line terminal two and a fourth processing unit connected to the voltage reference point two. The third processing unit includes a third conductive line and resistors six and eight disposed on the third conductive line. One end of the third conductive line is supplied with voltage and the other end is grounded. The fourth processing unit includes a fourth conductive line and resistors seven and nine disposed on the fourth conductive line. One end of the fourth conductive line is supplied with voltage and the other end is grounded.

[0009] According to one aspect of the above technical solution, the first output mode includes a second signal line terminal one and a third signal line terminal one, and the second output mode includes a second signal line terminal two and a third signal line terminal two.

[0010] According to one aspect of the above technical solution, the first resistor processing module includes a first processing unit connected to the second signal line terminal and a second processing unit connected to the third signal line terminal. The first processing unit includes a first conductive line and resistors one and three disposed on the first conductive line. One end of the first conductive line is supplied with voltage and the other end is grounded. The second processing unit includes a second conductive line and resistors two and four disposed on the second conductive line. One end of the second conductive line is supplied with voltage and the other end is grounded.

[0011] According to one aspect of the above technical solution, the second resistor processing module includes a third processing unit connected to the second signal line terminal two and a fourth processing unit connected to the third signal line terminal two. The third processing unit includes a third conductive line and resistors six and eight disposed on the third conductive line. One end of the third conductive line is supplied with voltage and the other end is grounded. The fourth processing unit includes a fourth conductive line and resistors seven and nine disposed on the fourth conductive line. One end of the fourth conductive line is supplied with voltage and the other end is grounded.

[0012] According to one aspect of the above technical solution, the voltage processing module includes a first voltage comparator connected to the first signal line terminal one and the voltage reference point one, and a second voltage comparator connected to the first signal line terminal two and the voltage reference point two, wherein one end of the first voltage comparator is supplied with voltage and the other end is grounded.

[0013] According to one aspect of the above technical solution, the voltage processing module includes a first voltage comparator connected to the second signal line terminal one and the third signal line terminal one, and a second voltage comparator connected to the second signal line terminal two and the third signal line terminal two, wherein one end of the first voltage comparator is supplied with voltage and the other end is grounded.

[0014] According to one aspect of the above technical solution, the output resistance processing module includes a fifth conductive line disposed after the first voltage comparator and a sixth conductive line disposed after the second voltage comparator. The fifth conductive line is provided with a resistor five, and the sixth conductive line is provided with a resistor ten. Both the fifth conductive line and the sixth conductive line are supplied with voltage at one end and connected to a wire at the other end.

[0015] Compared with the prior art, the beneficial effects of this utility model are as follows:

[0016] First, the first resistor processing module controls the resistance value of the voltage released by the first output mode within a certain range. Then, the second resistor processing module controls the resistance value of the voltage released by the second output mode within a certain range, thus limiting the voltages released by the first and second output modes and keeping them both within a small range to achieve first-level control. Next, the voltage processing module compares the first and second pre-processed voltages and controls them within a small range again to achieve second-level control. Since they have undergone two control processes, their voltages are very similar. Finally, the output resistor processing module limits the current of the third pre-processed voltage to a 5V output, thereby unifying the output form and ensuring that the output of the incremental encoder can be well adapted to the back-end processing circuit. Attached Figure Description

[0017] Figure 1 This is a structural block diagram of the incremental encoder signal preprocessing circuit in the first embodiment of this utility model;

[0018] Figure 2 This is a structural block diagram of the preprocessing circuit in the first embodiment of this utility model;

[0019] Figure 3 This is a structural block diagram of the preprocessing circuit in the second embodiment of this utility model;

[0020] Explanation of key component symbols:

[0021]

[0022]

[0023] The following detailed description, in conjunction with the accompanying drawings, will further illustrate this utility model. Detailed Implementation

[0024] To facilitate understanding of this utility model, a more complete description will be given below with reference to the accompanying drawings. Several embodiments of this utility model are shown in the drawings. However, this utility model can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this utility model will be more thorough and complete.

[0025] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0027] Please see Figures 1 to 2 The diagram shows a signal preprocessing circuit for an incremental encoder according to a first embodiment of the present invention. It includes a preprocessing circuit 20 disposed between an incremental encoder 10 and a back-end processing circuit 30. The incremental encoder 10 includes a first output mode and a second output mode. The preprocessing circuit 20 includes a first resistor processing module connected to the first output mode and a second resistor processing module connected to the second output mode. The voltage released by the first output mode is processed by the first resistor processing module to form a first preprocessed voltage, and the voltage released by the second output mode is processed by the second resistor processing module to form a second preprocessed voltage. The preprocessing circuit 20 also includes a voltage processing module connected to the first and second preprocessed voltages, and an output resistor processing module disposed after the voltage processing module. The second preprocessed voltage is processed by the voltage processing module to form a third preprocessed voltage, and the third preprocessed voltage is processed by the output resistor processing module to form an output voltage.

[0028] Understandably, this utility model first controls the resistance value of the voltage released by the first output mode within a certain range through the first resistor processing module, and then controls the resistance value of the voltage released by the second output mode within a certain range through the second resistor processing module, so as to limit the voltage released by the first output mode and the voltage released by the second output mode, and control both within a small range to achieve first-level control. Then, the voltage processing module compares the first pre-processed voltage and the second pre-processed voltage and controls the two voltages within a small range again to achieve second-level control. Since they have been controlled twice, the two voltages are very similar. Finally, the output resistor processing module limits the current output of the third pre-processed voltage to 5V, thereby unifying the output form and making the output of the incremental encoder 10 well compatible with the back-end processing circuit 30.

[0029] Specifically, the first output mode includes a first signal line terminal 41 and a voltage reference point 42, and the second output mode includes a first signal line terminal 42 and a voltage reference point 43.

[0030] Understandably, this structural form indicates that the incremental encoder 10 outputs a single-ended signal.

[0031] Furthermore, the first resistor processing module includes a first processing unit connected to the first signal line terminal and a second processing unit connected to the voltage reference point 41. The first processing unit includes a first conductive line 44 and resistors 45 and 48 disposed on the first conductive line 44. One end of the first conductive line 44 is supplied with voltage and the other end is grounded. The second processing unit includes a second conductive line 46 and resistors 47 and 49 disposed on the second conductive line 46. One end of the second conductive line 46 is supplied with voltage and the other end is grounded.

[0032] The second resistor processing module includes a third processing unit connected to the first signal line terminal 42 and a fourth processing unit connected to the voltage reference point 43. The third processing unit includes a third conductive line 53 and resistors 54 and 57 disposed on the third conductive line 53. One end of the third conductive line 53 is supplied with voltage and the other end is grounded. The fourth processing unit includes a fourth conductive line 55 and resistors 56 and 58 disposed on the fourth conductive line 55. One end of the fourth conductive line 55 is supplied with voltage and the other end is grounded.

[0033] Understandably, the first signal line terminal 1 and voltage reference point 1 41 are grouped together, and the first signal line terminal 2 42 and voltage reference point 2 43 are grouped together. First, the voltage released from the first signal line terminal 1 reaches the first conductive line 44, and after passing through resistor 1 45 and resistor 3 48, it is output as the first pre-processed voltage. The voltage released from voltage reference point 1 41 reaches the second conductive line 46, and after passing through resistor 2 47 and resistor 49, it is output as the first pre-processed voltage. At the same time, the voltage released from the first signal line terminal 2 42 reaches the third conductive line 53, and after passing through resistor 6 54 and resistor 8 57, it is output as the second pre-processed voltage. The voltage released from voltage reference point 2 43 reaches the fourth conductive line 55, and after passing through resistor 7 56 and resistor 9 58, it is output as the second pre-processed voltage.

[0034] Furthermore, the voltage processing module includes a first voltage comparator 50 connected to the first signal line terminal 1 and the voltage reference point 41, and a second voltage comparator 59 connected to the first signal line terminal 2 42 and the voltage reference point 2 43. One end of the first voltage comparator 50 is supplied with voltage and the other end is grounded.

[0035] Understandably, the first pre-processed voltages of the first signal line terminal 1 and the first voltage reference point 41 are already closer after processing. Then, the first voltage comparator 50 further optimizes the two, making them even closer, and then outputs the third pre-processed voltage. Similarly, the second pre-processed voltages of the first signal line terminal 2 42 and the second voltage reference point 2 43 are also already closer after processing. Then, the second voltage comparator 59 further optimizes the two, making them even closer, and then outputs the third pre-processed voltage.

[0036] Furthermore, the output resistance processing module includes a fifth conductive line 51 located after the first voltage comparator 50 and a sixth conductive line 60 located after the second voltage comparator 59. The fifth conductive line 51 is provided with a resistor 52, and the sixth conductive line 60 is provided with a resistor 61. Both the fifth conductive line 51 and the sixth conductive line 60 are connected to the power supply at one end and connected to the power supply at the other end.

[0037] Understandably, after two levels of control, the output can be converted to 5V through resistor 52 on the fifth conductive line 51 and resistor 61 on the sixth conductive line 60, respectively.

[0038] Preferably, this utility model provides a ratio of values ​​between the resistors and an embodiment of each resistor in this application:

[0039] Resistor 1: Resistor 3 = 100: 47; Resistor 2: Resistor 4 = 100: 10; Resistor 6: Resistor 8 = 100: 47; Resistor 7: Resistor 9 = 100: 10.

[0040] The values ​​of resistors three and eight are 320kΩ to 560kΩ.

[0041] In this embodiment, resistor 1: 10k; resistor 3: 470k; resistor 2: 10k; resistor 4: 1k; resistor 5: 10k; resistor 6: 10k; resistor 8: 470k; resistor 7: 10k; resistor 9: 1k; resistor 10: 10k.

[0042] In summary, the incremental encoder signal preprocessing circuit in the above embodiments of this utility model can output a 5V output form through the preprocessing circuit 20, thereby unifying the output form and making the output of the incremental encoder 10 well compatible with the back-end processing circuit 30.

[0043] Please refer to Figure 3 The diagram shows the incremental encoder signal preprocessing circuit 20 in the second embodiment of this utility model. The difference between this embodiment and the first embodiment is that:

[0044] The first output mode includes a second signal line terminal 70 and a third signal line terminal 71, and the second output mode includes a second signal line terminal 72 and a third signal line terminal 73.

[0045] Understandably, this structural form indicates that the incremental encoder 10 outputs a differential signal.

[0046] Furthermore, the first resistor processing module includes a first processing unit connected to the second signal line terminal 70 and a second processing unit connected to the third signal line terminal 71. The first processing unit includes a first conductive line 44 and resistors 45 and 48 disposed on the first conductive line 44. One end of the first conductive line 44 is supplied with voltage and the other end is grounded. The second processing unit includes a second conductive line 46 and resistors 47 and 49 disposed on the second conductive line 46. One end of the second conductive line 46 is supplied with voltage and the other end is grounded. Grounded; the second resistor processing module includes a third processing unit connected to the second signal line terminal 72 and a fourth processing unit connected to the third signal line terminal 73. The third processing unit includes a third conductive line 53 and resistors 54 and 57 disposed on the third conductive line 53. One end of the third conductive line 53 is supplied with voltage and the other end is grounded. The fourth processing unit includes a fourth conductive line 55 and resistors 56 and 58 disposed on the fourth conductive line 55. One end of the fourth conductive line 55 is supplied with voltage and the other end is grounded.

[0047] Understandably, the second signal line terminal 70 and the third signal line terminal 71 form one group, and the second signal line terminal 72 and the third signal line terminal 73 form another group. First, the voltage released from the second signal line terminal 70 reaches the first conductive line 44, and after passing through resistor 1 45 and resistor 3 48, it is output as the first pre-processing voltage. The voltage released from the third signal line terminal 71 reaches the second conductive line 46, and after passing through resistor 2 47 and resistor 49, it is output as the first pre-processing voltage. At the same time, the voltage released from the second signal line terminal 72 reaches the third conductive line 53, and after passing through resistor 6 54 and resistor 8 57, it is output as the second pre-processing voltage. The voltage released from the third signal line terminal 73 reaches the fourth conductive line 55, and after passing through resistor 7 56 and resistor 9 58, it is output as the second pre-processing voltage.

[0048] Furthermore, the voltage processing module includes a first voltage comparator 50 connected to the second signal line terminal 70 and the third signal line terminal 71, and a second voltage comparator 59 connected to the second signal line terminal 72 and the third signal line terminal 73. One end of the first voltage comparator 50 is supplied with voltage and the other end is grounded.

[0049] Understandably, the first preprocessed voltages of the second signal line terminal 70 and the third signal line terminal 71 are already closer after processing. Then, the first voltage comparator 50 further optimizes them to make them even closer, thus outputting the third preprocessed voltage. Similarly, the second preprocessed voltages of the second signal line terminal 72 and the third signal line terminal 73 are also already closer after processing. Then, the second voltage comparator 59 further optimizes them to make them even closer, thus outputting the third preprocessed voltage.

[0050] Apart from the differences mentioned above, the rest of the structure in this embodiment is the same as that in the first embodiment, and the ratio and value of each resistor are also the same as those in the first embodiment.

[0051] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0052] The embodiments described above are merely illustrative of several implementations of this utility model, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of this utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these all fall within the protection scope of this utility model. Therefore, the protection scope of this utility model patent should be determined by the appended claims.

Claims

1. A signal preprocessing circuit for an incremental encoder, characterized in that, The system includes a preprocessing circuit located between an incremental encoder and a back-end processing circuit. The incremental encoder includes a first output mode and a second output mode. The preprocessing circuit includes a first resistor processing module connected to the first output mode and a second resistor processing module connected to the second output mode. The voltage released by the first output mode is processed by the first resistor processing module to form a first preprocessed voltage, and the voltage released by the second output mode is processed by the second resistor processing module to form a second preprocessed voltage. The preprocessing circuit also includes a voltage processing module connected to the first preprocessed voltage and the second preprocessed voltage, and an output resistor processing module located after the voltage processing module. The second preprocessed voltage is processed by the voltage processing module to form a third preprocessed voltage, and the third preprocessed voltage is processed by the output resistor processing module to form an output voltage.

2. The incremental encoder signal preprocessing circuit according to claim 1, characterized in that, The first output mode includes a first signal line terminal one and a voltage reference point one, and the second output mode includes a first signal line terminal two and a voltage reference point two.

3. The incremental encoder signal preprocessing circuit according to claim 2, characterized in that, The first resistor processing module includes a first processing unit connected to the first signal line terminal and a second processing unit connected to the voltage reference point. The first processing unit includes a first conductive line and resistors 1 and 3 disposed on the first conductive line. One end of the first conductive line is supplied with voltage and the other end is grounded. The second processing unit includes a second conductive line and resistors 2 and 4 disposed on the second conductive line. One end of the second conductive line is supplied with voltage and the other end is grounded.

4. The incremental encoder signal preprocessing circuit according to claim 3, characterized in that, The second resistor processing module includes a third processing unit connected to the first signal line terminal two and a fourth processing unit connected to the voltage reference point two. The third processing unit includes a third conductive line and resistors six and eight disposed on the third conductive line. One end of the third conductive line is supplied with voltage and the other end is grounded. The fourth processing unit includes a fourth conductive line and resistors seven and nine disposed on the fourth conductive line. One end of the fourth conductive line is supplied with voltage and the other end is grounded.

5. The incremental encoder signal preprocessing circuit according to claim 1, characterized in that, The first output mode includes a second signal line terminal one and a third signal line terminal one, and the second output mode includes a second signal line terminal two and a third signal line terminal two.

6. The incremental encoder signal preprocessing circuit according to claim 5, characterized in that, The first resistor processing module includes a first processing unit connected to the second signal line terminal and a second processing unit connected to the third signal line terminal. The first processing unit includes a first conductive line and resistors one and three disposed on the first conductive line. One end of the first conductive line is supplied with voltage and the other end is grounded. The second processing unit includes a second conductive line and resistors two and four disposed on the second conductive line. One end of the second conductive line is supplied with voltage and the other end is grounded.

7. The incremental encoder signal preprocessing circuit according to claim 6, characterized in that, The second resistor processing module includes a third processing unit connected to the second signal line terminal two and a fourth processing unit connected to the third signal line terminal two. The third processing unit includes a third conductive line and resistors six and eight disposed on the third conductive line. One end of the third conductive line is supplied with voltage and the other end is grounded. The fourth processing unit includes a fourth conductive line and resistors seven and nine disposed on the fourth conductive line. One end of the fourth conductive line is supplied with voltage and the other end is grounded.

8. The incremental encoder signal preprocessing circuit according to claim 4, characterized in that, The voltage processing module includes a first voltage comparator connected to the first signal line terminal one and the first voltage reference point one, and a second voltage comparator connected to the first signal line terminal two and the second voltage reference point two. One end of the first voltage comparator is supplied with voltage and the other end is grounded.

9. The incremental encoder signal preprocessing circuit according to claim 7, characterized in that, The voltage processing module includes a first voltage comparator connected to the first terminal of the second signal line and the first terminal of the third signal line, and a second voltage comparator connected to the second terminal of the second signal line and the second terminal of the third signal line. One end of the first voltage comparator is supplied with voltage and the other end is grounded.

10. The incremental encoder signal preprocessing circuit according to claim 8 or 9, characterized in that, The output resistance processing module includes a fifth conductive line located after the first voltage comparator and a sixth conductive line located after the second voltage comparator. The fifth conductive line is provided with a resistor five, and the sixth conductive line is provided with a resistor ten. Both the fifth and sixth conductive lines are supplied with voltage at one end and connected to a wire at the other end.

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