Wave trap circuit, digital-analog hybrid board card and test machine

Abstract

The utility model relates to a wave trap circuit, a digital-analog hybrid board card and a test machine, and the wave trap circuit comprises an LC assembly which is connected with a main link of a transmission signal; and the controller is connected with the LC component, and the controller adjusts device parameters in the LC component according to the target frequency so as to suppress the target frequency signal transmitted in the main link. Signals of different frequencies of a main link can be suppressed according to actual needs, different filtering scenes are adapted, and the application range is widened.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor testing, in particular to a wave trap circuit, a digital-analog hybrid board card and a test machine. BACKGROUND

[0002] In the digital-analog hybrid board card of the test machine, a wave trap is often needed to filter and process signals. The wave trap is an electronic filter device for suppressing or attenuating a specific frequency signal. It can selectively suppress a certain frequency signal in the input signal to achieve a filtering effect and reduce the impact of the frequency signal. By setting the corresponding filter parameters of the wave trap, the specified frequency signal can be filtered out, and a stopband attenuation region within a frequency range is formed near the frequency. The wave trap attenuates the signal at the selected center frequency to a minimum value, while the signals outside the frequency band can pass through with unchanged gain.

[0003] When the parameter values of the related electronic components in the wave trap are fixed, the key parameters such as the center frequency, bandwidth and attenuation suppression degree of the wave trap are also fixed. At this time, only the application demand of a specific frequency point can be met. How to improve the application range of the wave trap is a problem to be solved. CONTENT OF THE INVENTION

[0004] Therefore, it is necessary to provide a wave trap circuit, a digital-analog hybrid board card and a test machine with improved application range to solve the above problems.

[0005] The first aspect of the present application provides a wave trap circuit, comprising:

[0006] An LC component connected to a main link for transmitting signals;

[0007] A controller connected to the LC component, the controller adjusts the device parameters in the LC component according to a target frequency to suppress the target frequency signal transmitted in the main link.

[0008] In one embodiment, the wave trap circuit further comprises a switching switch, the LC component is connected to the main link through the switching switch, and the controller is connected to the switching switch.

[0009] In one embodiment, the wave trap circuit further comprises a grounding resistor, the switching switch is a radio frequency single-pole double-throw switch, a control end of the switching switch is connected to a control pin of the controller, an input end of the switching switch is connected to the main link, a first output end of the switching switch is connected to a ground end through the grounding resistor, and a second output end of the switching switch is connected to the LC component.

[0010] In one of the embodiments, the LC circuit comprises an inductor and a plurality of adjustable capacitors, a first end of the inductor is connected to the switching switch, a second end of the inductor is connected to a first end of the adjustable capacitors, a second end of the adjustable capacitors is connected to a ground terminal, and a control terminal of the adjustable capacitors is connected to a corresponding control pin of the controller.

[0011] In one of the embodiments, the number of the adjustable capacitors is more than two.

[0012] In one of the embodiments, the adjustable capacitors comprise an adjustable capacitor VC1, an adjustable capacitor VC2, and an adjustable capacitor VC3, a control terminal of the adjustable capacitor VC1, a control terminal of the adjustable capacitor VC2, and a control terminal of the adjustable capacitor VC3 are respectively connected to a corresponding control pin of the controller, a first end of the adjustable capacitor VC1, a first end of the adjustable capacitor VC2, and a first end of the adjustable capacitor VC3 are all connected to a second end of the inductor, and a second end of the adjustable capacitor VC1, a second end of the adjustable capacitor VC2, and a second end of the adjustable capacitor VC3 are all connected to a ground terminal.

[0013] In one of the embodiments, the controller is an FPGA, a CPU, or an MCU.

[0014] The second aspect of the application provides a digital-analog hybrid board card, comprising a signal source port, a signal load port, a main link, and the above-mentioned wave trap circuit, the signal source port is connected to the signal load port through the main link, and the wave trap circuit is connected to the main link.

[0015] In one of the embodiments, the digital-analog hybrid board card further comprises a signal source connected to the signal source port.

[0016] The third aspect of the application provides a test machine comprising the above-mentioned digital-analog hybrid board card.

[0017] The above-mentioned wave trap circuit, digital-analog hybrid board card, and test machine, the controller adjusts the parameters of the devices in the LC assembly according to the target frequency to suppress the target frequency signal transmitted in the main link, can suppress the signals of different frequencies in the main link according to actual needs, adapts to different filtering scenarios, and improves the application range. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 It is a structure principle diagram of the wave trap circuit in one of the embodiments.

[0019] Figure 2 It is a signal flow diagram of the wave trap circuit in one of the embodiments.

[0020] Figure 3 It is a wave trap simulation diagram of different target frequency points in one of the embodiments. DETAILED DESCRIPTION

[0021] For the purpose of the present application, technical solutions and advantages, the following will be further described in detail in combination with the drawings and examples. It should be understood that the specific examples described herein are only used to explain the present application, and are not intended to limit the present application.

[0022] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application.

[0023] It can be understood that, in the following embodiments, “connection” should be understood as “electrical connection”, “communication connection” and the like if the circuits, modules, units and the like connected with each other have transmission of electrical signals or data.

[0024] As used herein, the singular forms “a”, “an” and “the” can also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms “comprise / comprising”, “have / having” and the like specify the presence of stated features, integers, operations, components, parts and / or combinations thereof, but do not exclude the presence or addition of one or more other features, integers, operations, components, parts and / or combinations thereof.

[0025] In one embodiment, as shown in Figure 1 A wave trap circuit 100 is provided, including an LC (inductor-capacitor) component 110 and a controller 120, the LC component 110 is connected to a main link transmitting a signal, the controller 120 is connected to the LC component 110, and the controller 120 adjusts the device parameters in the LC component 110 according to a target frequency to suppress the target frequency signal transmitted in the main link. Wherein, the main link connects a signal source port Source and a signal load port Load, for transmitting the signal accessed by the signal source port Source to the signal load port Load, Rs represents the source end impedance, and RL represents the load end impedance.

[0026] The LC component 110 can be directly or indirectly connected with the main link, and the controller 120 can be a device such as an FPGA (Field Programmable Gate Array), a CPU (Central Processing Unit), or an MCU (Microcontroller Unit). According to the THD (Total Harmonic Distortion) index of the actual transmission signal of the main link, one or more target frequency signals that need to be filtered can be determined, and the controller 120 adjusts the parameters of the inductance and / or capacitance in the LC component 110 according to the set target frequency, thereby suppressing the corresponding target frequency signal transmitted in the main link. Specifically, the controller 120 can call the control code value corresponding to the target frequency, adjust the capacitance value of the capacitance, form a band-stop filter of the target frequency, and complete the harmonic suppression of the target frequency.

[0027] With reference to the foregoing Figure 1 , the trap circuit 100 can include a switching switch RFC, the LC component 110 is connected with the main link through the switching switch RFC, and the controller 120 is connected with the switching switch RFC. Whether the LC component 110 is in communication with the main link can be controlled by adjusting the on-off of the switching switch RFC, that is, whether the trap function is turned on or off. Further, the trap circuit 100 can further include a grounding resistor R, and the switching switch RFC is a radio frequency single-pole double-throw switch. The control end Ctrl of the switching switch RFC is connected with the control pin Ctrl3 of the controller 120, the input end RFin of the switching switch RFC is connected with the main link, the first output end RF1 of the switching switch RFC is connected with the ground end through the grounding resistor R, and the second output end RF2 of the switching switch RFC is connected with the LC component 110. Specifically, the grounding resistor R can be selected as a 1MΩ resistor. According to actual needs, the switching switch RFC can be switched between the trap and non-trap states by sending a switching instruction from the controller 120 to the radio frequency single-pole double-throw switch.

[0028] In the embodiment, the switching switch RFC is arranged between the LC component 110 and the main link, and the switching switch RFC is arranged close to the main link and away from the ground end, which can reduce the influence of stub line effect and avoid the phenomenon that the main link signal is abnormally attenuated when the test machine is applied at a high frequency.

[0029] The specific structure of the LC circuit 110 is not unique. In one embodiment, as shown in FIG. 2, the LC component 110 can include an inductor L and a capacitor C. The inductor L is connected with the main link, and the capacitor C is connected with the inductor L. The controller 120 is connected with the capacitor C. Figure 1As shown, the LC circuit 110 includes an inductor L and several adjustable capacitors. The first end of the inductor L is connected to a switching switch RFC, specifically to the second output terminal RF2 of the switching switch RFC. The second end of the inductor L is connected to the first end of the adjustable capacitors, and the second end of the adjustable capacitors is connected to ground. The control terminal of the adjustable capacitors is connected to the corresponding control pin of the controller 120. The number of adjustable capacitors can be one or more. When notch filtering is required, the capacitance value of the adjustable capacitors is adjusted by the controller 120 to adapt to different notch filtering frequencies. Furthermore, by setting multiple adjustable capacitors, the capacitance value can be adjusted more conveniently to adapt to different notch filtering frequencies.

[0030] Furthermore, the adjustable capacitors include adjustable capacitors VC1, VC2, and VC3. The control terminals of adjustable capacitors VC1, VC2, and VC3 are respectively connected to the corresponding control pins (Ctrl0, Ctrl1, and Ctrl2 pins) of controller 120. The first terminals of adjustable capacitors VC1, VC2, and VC3 are all connected to the second terminal of inductor L. The second terminals of adjustable capacitors VC1, VC2, and VC3 are all connected to the ground terminal.

[0031] Specifically, when it is necessary to suppress the harmonic energy of the target frequency signal, the switch RFC is switched to the RF2 path, maintaining an attenuation region centered on the harmonic frequency in the notch filter circuit 100, thereby effectively suppressing the interference signal. The specific signal flow is as follows: Figure 2 As shown by the blue line in the diagram; when no signal processing of the main link is required, the switch RFC is switched to the RF1 path, and its signal flow is as follows. Figure 2 As shown by the red line in the image.

[0032] When suppressing signals at different frequencies, different capacitor values ​​need to be selected according to different frequencies. The main steps are as follows:

[0033] (1) Select the switch RFC to switch to the RF1 path, that is, do not suppress the signal of the main link, and measure the THD index value of all frequency points within the output bandwidth of the signal source port Source, and record the harmonic frequency points with poor THD index values.

[0034] (2) Select the switching switch RFC to switch to the RF2 path, and adjust the adjustable capacitors VC1, VC2 and VC3 according to the harmonic frequency point recorded in step 1. Select different capacitor values ​​so that the center frequency of the notch filter circuit 100 is the harmonic frequency point, and record and save the control code value of the controller 120 at this time.

[0035] (3) When a certain frequency signal output by the signal source port Source needs to be filtered, the target frequency can be sent to the controller 120, the controller 120 calls the control code value corresponding to the target frequency, and adjusts the capacitance values of the adjustable capacitors VC1, VC2 and VC3, that is, a band-stop filter with a different center frequency is formed, at this time, the harmonic frequency point (target frequency) is suppressed, thereby optimizing and improving the THD index value of the frequency point, such as Figure 3 The notch simulation is performed for different target frequency points.

[0036] The notch filter circuit described above avoids the shortcoming that the center frequency point of the notch filter is fixed when the hardware matching value is fixed, thereby meeting the adaptive notch filtering requirement when outputting different frequency points. In addition, the switch RFC is arranged between the LC component 110 and the main link, away from the ground end, effectively reducing the stub line effect and avoiding the phenomenon that the main link signal is abnormally attenuated when the tester is applied at high frequency.

[0037] In one embodiment, as shown in Figure 1 A digital-analog hybrid board card is also provided, including a signal source port Source, a signal load port Load, a main link and the notch filter circuit 100 described above, the signal source port Source is connected to the signal load port Load through the main link, and the notch filter circuit 100 is connected to the main link. Further, the digital-analog hybrid board card further includes a signal source connected to the signal source port Source, and a signal is generated through the signal source and sent to the signal source port Source.

[0038] In one embodiment, a tester is also provided, including the digital-analog hybrid board card described above.

[0039] The technical features of the above-described embodiments can be combined in any manner. To make the description concise, all possible combinations of the technical features in the above-described embodiments are not described, however, as long as the combinations of the technical features do not contradict, they should be considered as the scope of the present disclosure.

[0040] The above-described embodiments only express several embodiments of the present application, and the description is more specific and detailed, but it should not be understood as limiting the scope of the utility model patent. It should be noted that for ordinary skilled persons in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which are within the scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A notch filter circuit, characterized in that, include: LC components connect to the main link for transmitting signals; A controller, connected to the LC component, adjusts the device parameters in the LC component according to the target frequency to suppress the target frequency signal transmitted in the main link; The notch filter circuit also includes a switching switch, through which the LC component is connected to the main link, and the controller is connected to the switching switch.

2. The circuit according to claim 1, characterized in that, The switching switch is located between the LC component and the main link, and the switching switch is located close to the main link and far away from the grounding terminal.

3. The circuit according to claim 1, characterized in that, It also includes a grounding resistor, and the switching switch is an RF single-pole double-throw switch; the control terminal of the switching switch is connected to the control pin of the controller, the input terminal of the switching switch is connected to the main link, the first output terminal of the switching switch is connected to the ground terminal through the grounding resistor, and the second output terminal of the switching switch is connected to the LC component.

4. The circuit according to claim 2, characterized in that, The LC component includes an inductor and several adjustable capacitors. The first end of the inductor is connected to the switching switch, the second end of the inductor is connected to the first end of the adjustable capacitor, the second end of the adjustable capacitor is connected to the ground terminal, and the control terminal of the adjustable capacitor is connected to the corresponding control pin of the controller.

5. The circuit according to claim 4, characterized in that, The number of adjustable capacitors is two or more.

6. The circuit according to claim 5, characterized in that, The adjustable capacitors include adjustable capacitors VC1, VC2, and VC3. The control terminals of adjustable capacitors VC1, VC2, and VC3 are respectively connected to the corresponding control pins of the controller. The first terminals of adjustable capacitors VC1, VC2, and VC3 are all connected to the second terminals of the inductor. The second terminals of adjustable capacitors VC1, VC2, and VC3 are all connected to the ground terminal.

7. The circuit according to any one of claims 1-6, characterized in that, The controller is an FPGA, CPU, or MCU.

8. A mixed-signal board, characterized in that, It includes a signal source port, a signal load port, a main link, and a notch filter circuit as described in any one of claims 1-7, wherein the signal source port is connected to the signal load port through the main link, and the notch filter circuit is connected to the main link.

9. The mixed-signal board according to claim 8, characterized in that, It also includes a signal source connected to the signal source port.

10. A testing machine, characterized in that, Includes the mixed-signal board as described in claim 8 or 9.

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