Package structure of power IC device

Abstract

The application relates to a packaging structure of a power IC device, which comprises a heat sink, a substrate, a chip, a packaging layer and two or more spring screws; the substrate is arranged on the top surface of the heat sink, and the chip is arranged on the top surface of the substrate; the packaging layer is arranged on the substrate and wraps the chip, a preset distance is arranged between the packaging layer and the heat sink to form a deformation accommodating area; one surface of the substrate connected with the heat sink is provided with a connecting part, and the contact area of the connecting part with the heat sink is smaller than the contact area of the connecting part with the substrate; and the packaging layer is fixedly connected with the heat sink through the two or more spring screws. The preset distance is arranged between the packaging layer and the heat sink to form the deformation accommodating area; when the packaging layer expands due to temperature rise, the deformation accommodating area can provide sufficient deformation space for the packaging layer, so that the packaging layer is prevented from pulling apart the heat sink and the substrate when the packaging layer expands and directly contacts the heat sink.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of chip packaging, in particular to a packaging structure of a power IC device. BACKGROUND

[0002] The power IC device mainly uses a chip made of silicon or other semiconductor materials as the main body, has necessary electrical pins and a substrate extending outward from the chip, and is also provided with a packaging layer wrapping the chip and the substrate. When the power IC device is working, the chip will generate heat, so a heat sink is usually directly connected to the substrate below the chip to reduce the temperature of the device. However, under the action of temperature rise, the packaging layer will expand outward, and the expanded packaging layer will push the substrate and the heat sink apart, so that the substrate is separated from the heat sink, which reduces the heat dissipation efficiency or causes heat dissipation failure, greatly affecting the service life of the power IC device. SUMMARY

[0003] Therefore, the present application provides a packaging structure of a power IC device.

[0004] According to an aspect of the present application, a packaging structure of a power IC device is provided, characterized in that it comprises a heat sink, a substrate, a chip, a packaging layer, and two or more spring screws.

[0005] The substrate is arranged on the top surface of the heat sink, and the chip is arranged on the top surface of the substrate.

[0006] The packaging layer is arranged on the substrate and wraps the chip, and a preset distance is provided between the packaging layer and the heat sink to form a deformation accommodation area.

[0007] One side of the substrate connected to the heat sink is provided with a connecting part, and the contact area of the connecting part with the heat sink is smaller than the contact area of the connecting part with the substrate.

[0008] The packaging layer is fixedly connected to the heat sink by the two or more spring screws.

[0009] In a possible implementation, the preset distance is in the range of 0.10 to 0.30 mm.

[0010] In a possible implementation, the height of the connecting part is the same as the preset distance between the packaging layer and the heat sink.

[0011] In a possible implementation, the chip is provided with two or more leads, the two or more leads are electrically connected to the chip by wires, and the two or more leads penetrate through opposite sides of the packaging layer.

[0012] In a possible implementation, the main body of the packaging layer is in a cuboid structure.

[0013] In a possible implementation, the spring screw is provided with two.

[0014] Two spring screws are arranged at the two ends of the body length of the packaging layer respectively.

[0015] In a possible implementation, the material of the packaging layer is molding compound.

[0016] In a possible implementation, the heat sink is a fin heat sink.

[0017] Beneficial effects: the substrate is suitable for placing the chip, and conducts the heat emitted by the chip to the heat sink below the substrate as a heat conduction bridge; the heat sink is suitable for increasing the heat dissipation area, and transmits the heat emitted by the chip to the outside, so as to realize the heat dissipation of the chip. The packaging layer is suitable for isolating the chip from the outside, so as to prevent the corrosion of impurities in the air to the chip circuit and cause the electrical performance to decrease. A preset distance is arranged between the packaging layer and the heat sink to form a deformation accommodating area. When the packaging layer appears the expansion phenomenon due to the temperature rise, the deformation accommodating area can provide sufficient deformation space for the packaging layer, so as to avoid the packaging layer pulling away the heat sink and the substrate when the packaging layer expands. At the same time, the connecting part at the bottom surface of the substrate realizes the connection between the substrate and the heat sink, and since the contact area of the connecting part and the heat sink is smaller than the contact area of the connecting part and the substrate, the packaging layer can be further provided with deformation space in multiple directions.

[0018] Other features and aspects of the present application will become apparent from the following detailed description of exemplary embodiments, taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0019] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the present application and serve to explain the principles of the present application.

[0020] Figure 1 A cross-sectional view of a packaging structure of a power IC device according to an embodiment of the present application is shown;

[0021] Figure 2 A front view of a packaging structure of a power IC device according to an embodiment of the present application is shown;

[0022] Figure 3 A top view of a packaging structure of a power IC device according to an embodiment of the present application is shown;

[0023] Figure 4 A side view of a packaging structure of a power IC device according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0024] Various exemplary embodiments, features, and aspects of the present application will be described in detail below with reference to the accompanying drawings. The same reference numbers in different drawings represent the same or similar elements. Although various aspects of embodiments are illustrated in the drawings, the drawings are not necessarily drawn to scale unless specifically noted.

[0025] It should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate relative or positional relationships based on the orientation or position shown in the drawings, and are used only for convenience of description of the present application or simplification of description, and do not indicate or imply that the indicated device or element must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0026] In addition, the terms "first", "second", "third", etc. are used only for descriptive purposes and should not be construed as indicating or implying relative importance or an indicated number of technical features. Therefore, features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise specifically limited.

[0027] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any implementation described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other implementations.

[0028] In addition, in order to better illustrate the present application, a large number of specific details are given in the specific embodiments below. Those skilled in the art should understand that the present application can also be implemented without some specific details. In some examples, methods, means, elements and circuits well known to those skilled in the art are not described in detail, in order to highlight the main idea of the present application.

[0029] Figure 1 A cross-sectional view of a package structure of a power IC device according to an embodiment of the present application is shown; Figure 2 A front view of a package structure of a power IC device according to an embodiment of the present application is shown; Figure 3 A top view of a package structure of a power IC device according to an embodiment of the present application is shown; Figure 4 A side view of a package structure of a power IC device according to an embodiment of the present application is shown. As Figure 1As shown, the packaging structure of the power IC device comprises a heat sink 400, a substrate 100, a chip 200, a packaging layer 300, and two or more spring screws 500. The substrate 100 is arranged on the top surface of the heat sink 400, and the chip 200 is arranged on the top surface of the substrate 100. The packaging layer 300 is arranged on the substrate 100 and wraps the chip 200. A preset distance is provided between the packaging layer 300 and the heat sink 400 to form a deformation accommodating area 600. One surface of the substrate 100 connected to the heat sink 400 is provided with a connecting portion 110, and the contact area of the connecting portion 110 with the heat sink 400 is smaller than the contact area of the connecting portion 110 with the substrate 100. The packaging layer 300 is fixedly connected to the heat sink 400 by the two or more spring screws 500.

[0030] Here, it should be noted that the substrate 100 is suitable for placing the chip 200 and conducting the heat emitted by the chip 200 to the heat sink 400 below the substrate 100 as a heat conduction bridge. The heat sink 400 is suitable for increasing the heat dissipation area and transmitting the heat emitted by the chip 200 to the outside, thereby achieving heat dissipation of the chip 200. The packaging layer 300 of the chip 200 is suitable for isolating the chip 200 from the outside to prevent impurities in the air from corroding the circuit of the chip 200 and causing electrical performance degradation. The packaged chip 200 is also more convenient for installation and transportation. A preset distance is provided between the packaging layer 300 and the heat sink 400 to form a deformation accommodating area. When the packaging layer 300 expands due to heating, the deformation accommodating area can provide sufficient deformation space for the packaging layer 300, avoiding direct contact between the packaging layer 300 and the heat sink 400 and preventing the packaging layer 300 from lifting the heat sink 400 and the substrate 100 when expanding. The connecting portion 110 on the bottom surface of the substrate 100 realizes the connection between the substrate 100 and the heat sink 400. Since the contact area of the connecting portion 110 with the heat sink 400 is smaller than the contact area of the connecting portion 110 with the substrate 100, the connecting portion 110 can further provide multiple directions of deformation space for the packaging layer 300 to correct the contact failure caused by the deformation of the packaging layer 300. Under the elastic fastening effect of the spring screws 500, the substrate 100 is always tightly attached to the heat sink 400, ensuring the heat dissipation effect.

[0031] Further, the preset distance is in the range of 0.10 to 0.30 mm.

[0032] The main body of the substrate 100 is in a plate structure, and the size of the substrate 100 is larger than the size of the chip 200.

[0033] In a possible implementation, the main body of the substrate 100 is in a cuboid plate structure. The bottom of the substrate 100 is provided with a connecting portion 110. The main body of the connecting portion 110 is in an inverted quadrangular pyramid structure. The bottom surface of the quadrangular pyramid structure is matched with and fixedly connected to the substrate 100. The top surface of the quadrangular pyramid structure is connected to the heat sink 400.

[0034] In another possible implementation, the main body of the substrate 100 is in a circular plate structure, the bottom of the substrate 100 is provided with a connecting part 110, the main body of the connecting part 110 is in an inverted circular truncated cone structure, the bottom surface of the circular truncated cone structure matches and is fixedly connected with the substrate 100, and the top surface of the circular truncated cone structure is connected with the heat sink 400.

[0035] It should be noted that the substrate 100 is integrally formed with the connecting part 110.

[0036] Further, the height of the connecting part 110 is the same as the preset distance between the packaging layer 300 and the heat sink 400.

[0037] Preferably, the contact area of the connecting part 110 with the heat sink 400 is 5 / 6 of the contact area of the connecting part 110 with the substrate 100.

[0038] In a possible implementation, the chip 200 is provided with two or more leads 700, the two or more leads 700 are electrically connected with the chip 200 through wires 710, and the two or more leads 700 penetrate through opposite sides of the packaging layer 300. Figure 1 As shown in Figure 3 , the six leads 700 are parallel to each other in the length direction, each lead 700 is electrically connected with the chip 200 through a wire 710, the packaging layer 300 wraps the six wires 710 and the six leads 700, the six leads 700 penetrate through the packaging layer 300, and the two ends of the six leads 700 in the length direction are located outside the packaging layer 300, so that the chip 200 is electrically connected with external devices through the six leads 700.

[0039] In a possible implementation, the main body of the packaging layer 300 is in a cuboid structure. As shown in Figure 3 , in order to avoid the packaging layer 300 from being knocked, the four side edges of the packaging layer 300 are provided in a cut surface structure.

[0040] In a possible implementation, the spring screw 500 is provided with two; the two spring screws 500 are respectively arranged at the two ends of the packaging layer 300 in the length direction. The two ends of the packaging layer 300 are provided with screw holes, the top surface of the heat sink 400 is provided with two screw holes, and the spring screws 500 are sequentially screwed into the screw holes of the packaging layer 300 and the screw holes of the heat sink 400, so that the heat sink 400 cannot be separated from the substrate 100. The spring screw 500 not only realizes the reinforced connection of the packaging layer 300 and the heat sink 400, but also does not hinder the thermal expansion and contraction of the packaging layer 300, and further ensures that the position of the packaging layer 300 cannot be changed.

[0041] In a possible implementation, the material of the packaging layer 300 is molding compound.

[0042] In one possible implementation, the heat sink 400 is a finned heat sink 400. As shown in the figure, the main body of the heat sink 400 is in a rectangular plate structure, and the bottom surface of the heat sink 400 is provided with two or more heat dissipation fins 410, which are arranged in parallel with each other and sequentially along the length direction of the heat sink 400. Preferably, the size of the heat sink 400 is larger than that of the packaging layer 300, so as to achieve a large heat dissipation of the chip 200. Figure 1

[0043] The above has described the embodiments of the present application, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes are obvious to those skilled in the art without departing from the scope and spirit of the described embodiments. The selection of the terms used herein is intended to best explain the principles of the embodiments, practical application, or improvement of the technology in the market, or to enable other ordinary skilled in the art to understand the embodiments disclosed herein.​

Claims

1. A package structure of a power IC device, characterized by, The application relates to a heat dissipation device. The heat dissipation device comprises a heat dissipation device, a substrate, a chip, a packaging layer and two or more spring screws. The substrate is arranged on the top surface of the heat dissipation device, and the chip is arranged on the top surface of the substrate. The packaging layer is arranged on the substrate and wraps the chip, and a preset distance is arranged between the packaging layer and the heat dissipation device to form a deformation accommodating area. One surface of the substrate connected with the heat dissipation device is provided with a connecting part, and the contact area of the connecting part with the heat dissipation device is smaller than the contact area of the connecting part with the substrate. The packaging layer is fixedly connected with the heat dissipation device through the two or more spring screws.

2. The package structure of a power IC device according to claim 1, wherein, The preset distance ranges from 0.10 to 0.30 mm.

3. The package structure of a power IC device according to claim 2, wherein, The height of the connecting part is the same as the preset distance between the packaging layer and the heat dissipation device.

4. The package structure of a power IC device according to claim 1, wherein, The chip is provided with two or more lead wires, the two or more lead wires are electrically connected with the chip through wires, and the two or more lead wires penetrate through opposite sides of the packaging layer.

5. The package structure of a power IC device according to claim 1, wherein, The main body of the packaging layer is in a cuboid structure.

6. The package structure of a power IC device according to claim 5, wherein, The spring screw is provided with two. The two spring screws are arranged at the two ends of the body of the packaging layer.

7. The package structure of a power IC device according to claim 1, wherein, The material of the packaging layer is molding compound.

8. The package structure of a power IC device according to claim 1, wherein, The heat dissipation device adopts a finned heat dissipation device.

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