Plasma etching equipment

Abstract

The utility model discloses plasma etching equipment, and relates to the field of plasma processing, and the plasma etching equipment comprises a plasma reaction chamber, a radio frequency assembly and a bias electrode assembly. The bias electrode assembly comprises an electrostatic chuck, the electrostatic chuck comprises a first composition structure and a second composition structure which are stacked, the wafer is placed on the side, away from the first composition structure, of the second composition structure, the first composition structure provides a bias electric field, and the second composition structure provides a bias electric field. The process gas moves towards the wafer under the action of the bias electric field, the first composition structure comprises at least two supporting structures, the supporting structures are conductive structures, and insulating separation structures are arranged between different supporting structures; and the voltage control assembly comprises at least two output ends, and different supporting structures provide bias voltage signals through different output ends. The plasma etching equipment can improve the etching uniformity.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of plasma processing, and in particular to a plasma etching device. BACKGROUND

[0002] Inductively Coupled Plasma Etch (ICPE) is a result of the combined action of chemical and physical processes. The basic principle is that, under vacuum low pressure, the radio frequency output of an ICP (Inductively Coupled Plasma) radio frequency power supply is output to a ring-shaped coupling coil, so that the mixed etching gas in a certain proportion is subjected to coupling glow discharge to generate high-density plasma. Under the action of the RF radio frequency of the lower electrode, these plasmas bombard the surface of the substrate, so that the chemical bonds of the semiconductor material in the patterned region of the substrate are broken, and volatile substances are generated with the etching gas to be removed from the substrate in the form of gas through a vacuum pipeline.

[0003] It should be noted that the device for patterning the substrate by using inductively coupled plasma etching is a plasma etching machine, which is also called a plasma planar etching machine, a plasma etching machine, a plasma surface treatment instrument, a plasma cleaning system, etc., and is widely used in the semiconductor industry. However, the etching uniformity of the existing plasma etching machine needs to be improved when etching a wafer. CONTENT OF THE INVENTION

[0004] In view of the above problems, the present application provides a plasma etching device to achieve the purpose of improving the etching uniformity of a wafer. The specific scheme is as follows:

[0005] A plasma etching device, comprising:

[0006] a plasma reaction chamber;

[0007] a radio frequency assembly capable of generating a radio frequency electric field, and a process gas introduced into the plasma reaction chamber is ionized into plasma under the action of the radio frequency electric field;

[0008] a bias electrode assembly located in the plasma reaction chamber;

[0009] The bias electrode assembly comprises:

[0010] An electrostatic chuck comprises a first component structure and a second component structure, the second component structure is arranged away from the side of the first component structure where the wafer is placed, the first component structure provides a bias electric field, the process gas moves to the wafer under the action of the bias electric field, the first component structure comprises at least two support structures, the support structures are conductive structures, and insulating separation structures are arranged between different support structures.

[0011] A voltage control component, the voltage control component comprises at least two output terminals, and different support structures provide bias signals through different output terminals.

[0012] Optionally, the voltage control component comprises:

[0013] A bias RF power supply;

[0014] A bias matching network, an input terminal of the bias matching network is electrically connected with an output terminal of the bias RF power supply;

[0015] A power distributor, an input terminal of the power distributor is electrically connected with the bias matching network, and the power distributor comprises at least two output terminals, and different support structures provide bias signals through different output terminals.

[0016] Optionally, in a plane parallel to the plane where the electrostatic chuck is arranged, the at least two support structures are arranged around the center of the electrostatic chuck, and different support structures are located on different sides of the center of the electrostatic chuck.

[0017] Optionally, in a plane parallel to the plane where the electrostatic chuck is arranged, the at least two support structures comprise a first support structure, the first support structure is a circular support structure, and other support structures in the at least two support structures except the first support structure are annular support structures, and the centers of the annular support structures and the circular support structure are the same position.

[0018] Optionally, the support structures comprise a plurality of sub-support structures, different sub-support structures in the same support structure are arranged around the center of the electrostatic chuck, and different support structures are located on different sides of the center of the electrostatic chuck.

[0019] Optionally, the second component structure comprises: an insulating medium layer, a first surface of the insulating medium layer is used for placing the wafer; an electrostatic adsorption plate in the insulating medium layer, the electrostatic adsorption plate provides adsorption force for the wafer under the action of a power supply;

[0020] A cooling structure at least partially located in the insulating medium layer, the cooling structure cools the wafer.

[0021] Optionally, the cooling structure comprises: a helium groove in the insulating medium layer; and a helium source in communication with the helium groove and supplying helium to the helium groove.

[0022] Optionally, the bias electrode assembly further comprises:

[0023] A temperature control assembly, the temperature control assembly comprising at least two temperature control structures, different temperature control structures controlling the temperature of different support structures.

[0024] Optionally, the temperature control structure comprises:

[0025] A heating layer in the insulating medium layer; and a temperature controller in electrical connection with the heating layer and controlling the temperature of the heating layer.

[0026] Optionally, the bias electrode assembly further comprises: a cover member, the cover member being annularly arranged around the electrostatic chuck and protecting the electrostatic chuck.

[0027] A limiting ring, the limiting ring being on the surface of the cover member and limiting the placement position of the wafer.

[0028] In the plasma etching device provided by the embodiments, the bias electrode assembly is located in the plasma reaction chamber and comprises an electrostatic chuck and a voltage control assembly. The electrostatic chuck comprises a first component structure and a second component structure stacked together. The second component structure is away from the first component structure and is used for placing a wafer. The first component structure provides a bias electric field and controls the movement of plasma in the plasma reaction chamber to the wafer placed on the surface of the second component structure, so as to realize the etching of the wafer. In the embodiments, the first component structure comprises at least two support structures. The support structures are conductive structures. Insulating separation structures are arranged between different support structures to realize the electrical insulation between different support structures. In the embodiments, the voltage control assembly comprises at least two output terminals. Different support structures are provided with bias voltage signals through different output terminals, so that the bias electrode assembly provides a bias electric field. When the plasma moves to the wafer, the voltage signals output by different output terminals of the voltage control assembly can be controlled to control the moving speed of the plasma corresponding to the region where different support structures are located, to further adjust the etching speed of the etching region of the wafer corresponding to the region where different support structures are located, to improve the uniformity of different etching regions of the wafer, and to improve the phenomenon of etching abnormality in some regions or edge bias in the wafer etching process. BRIEF DESCRIPTION OF DRAWINGS

[0029] The above and other features, advantages, and aspects of the present disclosure will become more apparent by describing in detail the following specific embodiments in conjunction with the accompanying drawings. Throughout the drawings, the same or similar reference numerals can refer to the same or similar elements. It should be understood that the drawings are schematic and elements and features are not necessarily to scale.

[0030] Figure 1 Fig. 1 is a schematic view of a conventional plasma etching machine;

[0031] Figure 2 Fig. 2 is a schematic view of an etching pattern when a wafer is etched and a Map edge is offset or an abnormality occurs in a certain area;

[0032] Figure 3 Another example of etching patterns when Map edge deviation occurs or when an abnormality occurs in a certain area of a wafer Figure

[0033] Figure 4 Fig. 3 is another schematic view of an etching pattern when a wafer is etched and a Map edge is offset or an abnormality occurs in a certain area;

[0034] Figure 5 Fig. 4 is a schematic view of a plasma etching machine according to an embodiment of the present disclosure;

[0035] Figure 6 Fig. 5 is a schematic view of a bias electrode assembly in a plasma etching machine according to an embodiment of the present disclosure;

[0036] Figure 7 Fig. 6 is a top view of an electrostatic chuck in a plasma etching machine according to an embodiment of the present disclosure;

[0037] Figure 8 Fig. 7 is another top view of an electrostatic chuck in a plasma etching machine according to an embodiment of the present disclosure;

[0038] Figure 9 Fig. 8 is a schematic view of a bias electrode assembly in a plasma etching machine according to another embodiment of the present disclosure;

[0039] Figure 10 Fig. 9 is another top view of an electrostatic chuck in a plasma etching machine according to another embodiment of the present disclosure;

[0040] Figure 11 Fig. 10 is another top view of an electrostatic chuck in a plasma etching machine according to another embodiment of the present disclosure;

[0041] Figure 12 Fig. 11 is a schematic view of an etching effect of a wafer etched by a plasma etching machine according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0042] The embodiments of the present application will be described below in detail with the accompanying drawings. It is obvious that the described embodiments are only a part of the embodiments of the present application, but not all the embodiments. Based on the embodiments of the present application, all the other embodiments obtained by those skilled in the art without creative efforts fall within the scope of the present application.

[0043] Various modifications and changes can be made to the present application without departing from the spirit and scope of the present application. It is therefore intended that the present application cover all modifications and changes as fall within the scope of the claims (technical solutions claimed for protection) and their equivalents. It should be noted that the embodiments provided by the present application can be combined with each other without contradiction, if possible.

[0044] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the present application will be further described in detail below with the accompanying drawings and specific embodiments.

[0045] As described in the background section, the etching uniformity of the existing plasma etching machine needs to be improved when etching the wafer.

[0046] As shown in Figure 1 The etching cavity of the plasma etching machine mainly includes a plasma reaction chamber 001, a ceramic dielectric window 002, a gas inlet nozzle 003, a shielding cover 004, a radio frequency coil 005, a gas source 006, an excitation radio frequency power supply 011, a matching network 010, a bias electrode assembly 020, a bias radio frequency power supply 021, a matching network 025, a pressure control valve 023, a vacuum pump 024, etc. Among them, the gas source 006 is used to provide process gas, which is sprayed into the plasma reaction chamber 001 through the gas inlet nozzle 003, and generates plasma under the action of the radio frequency coil 005, and provides a bias voltage using the bias electrode assembly 020 to accelerate the plasma to bombard the substrate sheet 022, and to perform plasma treatment on the substrate sheet 022.

[0047] It should be noted that etching is the most important process in the manufacturing process of semiconductor integrated circuits. In the specific etching process, the radio frequency coil generates a high-frequency alternating electromagnetic field by exciting the excitation radio frequency power supply to make the process gas enter the plasma state. The strength of the electromagnetic field is different, the degree of ionization of the process gas is different, and the plasma density is also different; the bias electrode assembly provides a bias voltage and temperature control to improve the plasma energy, so that the plasma acts vertically on the wafer, thereby realizing etching.

[0048] However, in the current plasma etching machine, the shape of the radio frequency coil is fixed, the bias electrode assembly is single temperature control and single bias control, and the electromagnetic field is perpendicular to the wafer surface. Therefore, when the wafer etching appears edge or some area etching abnormal (fast or slow etching rate), the current plasma etching machine cannot be adjusted, resulting in the need to improve the etching uniformity. For example, Figures 2-4 As shown in Figures 2-4 The schematic diagram of part of the etching pattern when the wafer etching appears Map edge or some area abnormal is shown.

[0049] Therefore, the embodiments of the present application provide a plasma etching equipment, as shown in Figure 5 The plasma etching equipment comprises:

[0050] A plasma reaction chamber 100;

[0051] A radio frequency assembly 200 capable of generating a radio frequency electric field, the process gas entering the plasma reaction chamber is ionized into plasma under the action of the radio frequency electric field;

[0052] A bias electrode assembly located in the plasma reaction chamber;

[0053] The bias electrode assembly comprises:

[0054] An electrostatic chuck 101 comprising a first component structure and a second component structure, the second component structure is placed away from the wafer 111, the first component structure provides a bias electric field, the process gas moves to the wafer 111 under the action of the bias electric field, the first component structure comprises at least two support structures, the support structure is a conductive structure, and an insulating separation structure is arranged between different support structures;

[0055] A voltage control assembly comprising at least two output terminals, and different support structures provide bias signals through different output terminals.

[0056] Optionally, in an embodiment of the present application, the support structure is a metal structure, which has conductive performance on the basis of providing a certain support strength, but the present application does not limit this, which is determined according to the situation.

[0057] Optionally, in an embodiment of the present application, the radio frequency assembly 200 comprises an excitation radio frequency power supply 201, an excitation source matching network 202 and a radio frequency coil 203; wherein the radio frequency coil 203 is used to generate a radio frequency field under the signal of the excitation radio frequency power supply 201, so that the process gas enters the plasma state; the excitation source matching network 202 is used to realize the signal transmission between the excitation radio frequency power supply 201 and the radio frequency coil 203, and adjust the radio frequency signal output by the excitation radio frequency source 201, so as to provide the radio frequency coil 203 with the required power of the radio frequency signal.

[0058] It should be noted that in the present embodiment, the excitation source matching network can not only ensure that the excitation radio frequency power supply can effectively transmit energy to the radio frequency coil to provide maximum power transmission and improve system efficiency. Moreover, the excitation source matching network can also change the impedance matching between the excitation radio frequency power supply and the radio frequency coil by adjusting the electrical elements inside, such as inductance, capacitance and transformer, etc., so as to realize the best energy transmission and reduce the reflection loss.

[0059] Optionally, in an embodiment of the present application, continuing as shown in Figure 5 The plasma etching device further comprises a shielding cover 300, and a dielectric window 301 is arranged between the shielding cover 300 and the plasma reaction chamber 100, which is used to separate the accommodation space of the shielding cover 300 and the accommodation space of the plasma reaction chamber 100. It should be noted that in the present embodiment, the radio frequency coil 203 in the radio frequency assembly 200 is located in the shielding cover 300. Specifically, the dielectric window 301 can be a ceramic dielectric window, which is not limited in the present application, and can be determined according to the specific situation.

[0060] Specifically, in an embodiment of the present application, continuing as shown in Figure 5 The dielectric window 301 has a process gas inlet 302, which is connected with a gas source 303, and the process gas in the gas source 303 enters the plasma reaction chamber 100 through the process gas inlet 302.

[0061] On the basis of any of the above embodiments, in an embodiment of the present application, the bias electrode assembly further comprises:

[0062] A cladding member 102 is arranged around the electrostatic chuck 101, which is used to protect the electrostatic chuck 101;

[0063] A limiting ring 103 is arranged on the surface of the cladding member 102, which is used to limit the placement position of the wafer 111.

[0064] The plasma etching device provided by the embodiment of the present application comprises a bias electrode assembly in the plasma reaction chamber, which comprises an electrostatic chuck and a voltage control assembly, wherein the electrostatic chuck comprises a first component structure and a second component structure stacked together, the second component structure is used for placing a wafer away from one side of the first component structure, and the first component structure provides a bias electric field to control the movement of plasma in the plasma reaction chamber to the wafer placed on the surface of the second component structure, so as to realize the etching of the wafer.

[0065] It should be noted that, in the embodiment, the first component structure comprises at least two support structures, the support structures are conductive structures, and an insulating separation structure is arranged between different support structures to realize the electrical insulation between different support structures. In the embodiment, the voltage control assembly comprises at least two output terminals, and different support structures are provided with bias signals through different output terminals, so that the bias electrode assembly provides a bias electric field to control the movement of plasma to the wafer. When the voltage signals output by different output terminals of the voltage control assembly are controlled, the movement speed of the plasma corresponding to the region where the different support structures are located can be controlled, and then the etching speed of the etching region of the wafer corresponding to the region where the different support structures are located can be adjusted, the uniformity of different etching regions of the wafer is improved, and the phenomenon of etching abnormality of the wafer in the etching process is improved.

[0066] Optionally, in one embodiment of the present application, as shown in Figure 5 and Figure 6 the voltage control assembly comprises:

[0067] a bias RF power supply 104;

[0068] a bias matching network 105, an input end of the bias matching network 105 is electrically connected with an output end of the bias RF power supply 104;

[0069] a power distributor 106, an input end of the power distributor 106 is electrically connected with the bias matching network 105, and the power distributor 106 comprises at least two output terminals, and different support structures are provided with bias signals through different output terminals.

[0070] It should be noted that in the embodiment, the bias RF power supply 104 is configured to output a bias signal, and the bias matching network 105 is configured to provide the electrostatic chuck 101 with a bias signal with a required size and stability based on the bias signal output by the bias RF power supply 104; and the power distributor 106 is configured to adjust the voltage signal applied to different support structures to adjust the etching rate of the etching area of the wafer corresponding to the different support structures, so as to improve the uniformity of etching of different areas of the wafer. For example, a larger power bias signal is set in an area with slower etching, and a smaller power bias signal is set in an area with faster etching, so that the etching rates of different areas of the wafer tend to be consistent, and the uniformity of etching of different areas of the wafer is improved.

[0071] Optionally, in an embodiment of the present application, the power distributor 106 adjusts the size of the bias signal applied to different support structures by controlling the proportion of the bias signal applied to different support structures. However, the present application does not make any limitation in this regard, and the specific implementation is subject to the actual situation.

[0072] In other embodiments of the present application, the voltage control assembly can also not be provided with the power distributor 106, but is provided with at least two groups of bias RF power supplies 104 and bias matching networks 105 to provide bias signals to the at least two support structures. Specifically, different support structures are provided with bias signals by different bias RF power supplies 104 and bias matching networks 105, so as to adjust the etching rate of different areas of the wafer. The present application does not make any limitation in this regard, and the specific implementation is subject to the actual situation.

[0073] It should be noted that in the embodiment, in a plane parallel to the plane in which the electrostatic chuck 101 is located, the shape of the electrostatic chuck 101 can be circular, square, rectangular or other shapes, and the present application does not make any limitation in this regard, and the specific implementation is subject to the actual situation.

[0074] Hereinafter, the plasma etching equipment provided by the embodiment of the present application is described by taking the shape of the electrostatic chuck 101 as circular in a plane parallel to the plane in which the electrostatic chuck 101 is located.

[0075] Optionally, in an embodiment of the present application, in a plane parallel to the plane in which the electrostatic chuck 101 is located, the at least two support structures are arranged around the center of the electrostatic chuck 101, and different support structures are located on different sides of the center of the electrostatic chuck 101. For example, when the shape of the electrostatic chuck 101 is circular, and the first group of structures includes two support structures, each support structure is semicircular, and an insulating separation structure is arranged between different support structures, as shown in Figure 6 and Figure 7 , and Figure 7 ​Figure 6 A top view shows that the at least two support structures include a first support structure 101a and a second support structure 101b, with an insulating separation structure 101d provided between the first support structure 101a and the second support structure 101b; as Figure 8 and Figure 9 As shown, Figure 9 for Figure 8 In the top view, when the first component structure includes four support structures, each support structure is a quarter circle, and an insulating partition structure is provided between different support structures; if the first component structure includes other numbers of support structures, the same applies.

[0076] In another embodiment of this application, in a plane parallel to the plane where the electrostatic chuck 101 is located, the at least two support structures include a first support structure, which is a circular support structure, and the other support structures among the at least two support structures excluding the first support structure are annular support structures, and the centers of the annular support structure and the circular support structure are at the same position.

[0077] Taking a plane parallel to the plane where the electrostatic chuck 101 is located, and the shape of the electrostatic chuck 101 is circular, as an example, if the at least two support structures include a first support structure and a second support structure, the first support structure is a circular support structure, and the second support structure is an annular support structure surrounding the first support structure; for example... Figure 9 and Figure 10 As shown, Figure 10 for Figure 9 The top view shows that if the at least two support structures include three support structures: a first support structure 101a, a second support structure 101b, and a third support structure 101m, wherein the first support structure 101a is a circular support structure, the second support structure 101b is an annular support structure surrounding the first support structure 101a, and the third support structure 101m is an annular support structure surrounding the second support structure 101b. If the at least two support structures include other numbers, the same principle applies.

[0078] It should be noted that in the above embodiment, in the plane parallel to the plane where the electrostatic chuck 101 is located, the at least two support structures include a first support structure, the first support structure is a circular support structure, and other support structures in the at least two support structures are annular support structures. When the centers of the annular support structures and the circular support structure are the same position, the bias signals applied by different parts in the same support structure can be the same bias signal to reduce the control complexity, or can be different bias signals to improve the adjustment accuracy of the etching uniformity of different regions of the wafer. The present application does not make any limitation in this regard.

[0079] Optionally, in the above embodiment, in an embodiment of the present application, the bias signals applied by different parts in the same support structure are different, as shown in the following table: Figure 11 The support structure includes a plurality of sub-support structures, different sub-support structures in the same support structure are arranged around the center of the electrostatic chuck, and different support structures are located on different sides of the center of the electrostatic chuck, that is, the support structure is divided into at least two sub-support structures along the circumferential direction of the support structure, so as to adjust the etching uniformity of different positions at the same radius from the center of the electrostatic chuck, thereby further improving the etching uniformity of different regions of the wafer.

[0080] In other embodiments of the present application, the first component structure can also adopt other division methods, that is, the plurality of support structures can adopt other arrangement methods, which are determined according to the use requirements.

[0081] It should be noted that in actual application, the voltage signals and temperatures on each support structure can be set to the same value first, a wafer is etched, the etching conditions of different regions of the wafer are obtained based on the wafer, and then the voltage signals and temperatures corresponding to each support structure are adjusted based on the etching conditions, so as to adjust the etching uniformity of the wafer.

[0082] In any of the above embodiments, in an embodiment of the present application, as shown in the following table: Figure 6As shown, the second component structure comprises: an insulating medium layer 101e, a first surface of the insulating medium layer 101e is used to place a wafer 111; an electrostatic adsorption plate 101c located in the insulating medium layer 101e, the electrostatic adsorption plate 101c provides adsorption force to the wafer under the action of a power supply, and fixes the wafer; and a cooling structure located at least partially in the insulating medium layer 101e, which cools the wafer. It should be noted that in the embodiment, the insulating medium layer 101e is provided to place the wafer, and the electrostatic adsorption plate 101c is located in the insulating medium layer 101e in order to avoid that the electrical signal on the electrostatic adsorption plate 101c is applied to the wafer on the basis of ensuring that the electrostatic adsorption plate 101c can provide adsorption force to the wafer and fix the position of the wafer. Optionally, in an embodiment of the present application, the electrostatic adsorption plate 101c is a metal electrostatic adsorption plate, and the present application does not limit this, which is determined according to the situation.

[0083] Optionally, on the basis of the above-mentioned embodiments, in an embodiment of the present application, the cooling structure comprises: a helium groove 101h located in the insulating medium layer 101e; and a helium source 110 in communication with the helium groove 101h and supplying helium into the helium groove 101h. However, the present application does not limit this, and in other embodiments of the present application, the cooling structure can also use other structures, which is determined according to the situation.

[0084] On the basis of the above-mentioned embodiments, in an embodiment of the present application, the electrostatic assembly further comprises: a high-voltage power supply 109 electrically connected to the electrostatic adsorption plate 101c, so as to provide a voltage signal to the electrostatic adsorption plate 101c, so that the electrostatic adsorption plate 101c can adsorb the wafer to the first surface of the medium layer.

[0085] It should be noted that when the wafer is etched by using the plasma, in addition to adjusting the power on the electrostatic chuck 101 to adjust the etching rate on the wafer, adjusting the temperature on the wafer can also adjust the etching rate on the wafer. Therefore, on the basis of any of the above-mentioned embodiments, in an embodiment of the present application, the bias electrode assembly further comprises: a temperature control assembly, the temperature control assembly comprises at least two temperature control structures, different temperature control structures control the temperature of different support structures, so as to adjust the etching rate of the part of the wafer corresponding to the different support structures, thereby improving the uniformity of wafer etching.

[0086] Specifically, the plasma etching device provided by the embodiment of the present application can raise the temperature of the support structure corresponding to the area where the wafer has a low etching rate, so as to increase the etching rate of the area; and can lower the temperature of the support structure corresponding to the area where the wafer has a high etching rate, so as to decrease the etching rate of the area, thereby making the etching rates of different areas of the wafer consistent.

[0087] It should be noted that, in the embodiment of the present application, the temperature control structure can be an electric heating temperature control structure or a liquid temperature control system, and the present application does not make any limitation in this regard, which is determined according to the actual situation.

[0088] Optionally, in one embodiment of the present application, the temperature control structure comprises a temperature control layer, such as a heating layer, located in the insulating medium layer; and a temperature controller electrically connected with the temperature control layer and configured to control the temperature of the heating layer.

[0089] Specifically, in one embodiment of the present application, as shown in Figure 6 The electrostatic chuck 101 comprises a first support structure 101a and a second support structure 101b, and the temperature control assembly comprises a first temperature control structure and a second temperature control structure. The first temperature control structure comprises a first temperature control layer 101f located in the first support structure 101a and a first temperature controller 107 located outside the first support structure 101a and configured to provide a control signal to the first temperature control layer 101f. The second temperature control structure comprises a second temperature control layer 101g located in the second support structure 101b and a second temperature controller 108 located outside the second support structure 101b and configured to provide a control signal to the second temperature control layer 101g.

[0090] In another embodiment of the present application, as shown in Figure 9As shown, the electrostatic chuck 101 comprises a first support structure 101a, a second support structure 101b and a third support structure 101m, and the temperature control assembly comprises a first temperature control structure, a second temperature control structure and a third temperature control structure, wherein the first temperature control structure comprises a first temperature control layer 101f in the first support structure 101a and a first temperature controller 107 outside the first support structure 101a for providing a control signal to the first temperature control layer 101f; the second temperature control structure comprises a second temperature control layer 101g in the second support structure 101b and a second temperature controller 108 outside the second support structure 101b for providing a control signal to the second temperature control layer 101g; and the third temperature control structure comprises a third temperature control layer 101n in the third support structure 101m and a third temperature controller 109 outside the third support structure 101m for providing a control signal to the third temperature control layer 101n. 101n provides a third temperature controller 112, i.e. temperature controller three, for controlling the control signal 112). Wherein, A first insulating separation structure 101d1 is arranged between the first support structure 101a and the second support structure 101b, and a second insulating separation structure 101d2 is arranged between the third support structure 101m and the second support structure 101b.

[0091] Optionally, in an embodiment of the present application, the electrostatic chuck comprises the same number of support structures as the temperature control assembly comprises of temperature control structures, and each temperature control structure comprises a temperature control layer in the electrostatic chuck and a temperature controller outside the electrostatic chuck; for example, Figure 7 As shown, when the electrostatic chuck comprises two support structures, the temperature control assembly comprises two temperature control layers in the two support structures of the electrostatic chuck and a temperature controller one and a temperature controller two outside the electrostatic chuck; for example, Figure 8 As shown, when the electrostatic chuck comprises four support structures, the temperature control assembly comprises four temperature control layers in the four support structures and a temperature controller one, a temperature controller two, a temperature controller three and a temperature controller four outside the electrostatic chuck; for example, Figure 10 As shown, when the electrostatic chuck comprises three support structures, the temperature control assembly comprises three temperature control layers in the three support structures and a temperature controller one, a temperature controller two and a temperature controller three outside the electrostatic chuck.

[0092] It should be noted that in the embodiment, the plasma etching device controls the bias voltage signals applied to the different support structures in the electrostatic chuck through the voltage control component to achieve the main adjustment of the etching rate, controls the temperature of the different support structures in the electrostatic chuck through the temperature control component to achieve the fine adjustment of the etching rate, and thus the uniformity of the etching of the wafer is improved through the combination of the bias voltage adjustment and the temperature adjustment. As shown in Figure 11 Figure 11 An etching pattern after the wafer is etched by the plasma etching device provided in the embodiment of the application is shown in FIG. 4. As can be seen from the figure, after the wafer is etched by the plasma etching device provided in the embodiment of the application, the etching pattern formed is a regular concentric circle pattern, and the etching uniformity is good.

[0093] Optionally, in an embodiment of the application, the insulating separation structure is also a heat insulation structure to reduce the heat conduction between the different support structures, but the application is not limited in this regard. As can be seen from the above, in the embodiment, since the temperature control component is used to achieve the fine adjustment of the etching rate, the temperature difference between the different support structures is small, so that the plasma etching device provided in the embodiment of the application has a lower requirement on the insulating performance of the insulating separation structure.

[0094] Optionally, in an embodiment of the application, the insulating separation structure is alumina ceramic or aluminum nitride ceramic, etc., but the application is not limited in this regard, and the specific selection is subject to the actual situation.

[0095] On the basis of any of the above embodiments, in an embodiment of the application, the insulating separation structure and the support structure can be fixed together by sintering, welding or adhesive bonding, etc.; similarly, the insulating separation structure and the dielectric layer can also be fixed together by sintering, welding or adhesive bonding, etc.; and the support structure and the dielectric layer can also be fixed together by sintering, welding or adhesive bonding, etc.; the application is not limited in this regard, and the specific selection is subject to the actual situation.

[0096] On the basis of any of the above embodiments, as shown in Figure 5 In an embodiment of the application, the plasma etching device further comprises a vacuum pump 400 and a pressure control valve 401 connected between the vacuum pump 400 and the plasma reaction chamber. The pressure control valve 401 is used to control the conduction and shutdown of the passage between the vacuum pump 400 and the plasma reaction chamber, that is, when the plasma reaction chamber needs to be vacuumized, the passage between the vacuum pump and the plasma reaction chamber is turned on, and when the plasma reaction chamber is not vacuumized, the passage between the vacuum pump and the plasma reaction chamber is turned off.

[0097] ​In summary, in the plasma etching device provided by the embodiments of the present application, the bias electrode assembly is located in the plasma reaction chamber and comprises an electrostatic chuck and a voltage control assembly. The electrostatic chuck comprises a first component structure and a second component structure stacked together. The second component structure is located away from the first component structure and is used to place a wafer. The first component structure provides a bias electric field to control the movement of plasma in the plasma reaction chamber to the wafer placed on the surface of the second component structure, so as to realize etching of the wafer. In the embodiment, the first component structure comprises at least two support structures. The support structures are conductive structures, and an insulating separation structure is arranged between different support structures to realize electrical insulation between different support structures. In the embodiment, the voltage control assembly comprises at least two output terminals. Different support structures are provided with bias voltage signals through different output terminals, so that the bias electrode assembly provides a bias electric field. When the plasma moves to the wafer, the movement speed of the plasma corresponding to the region where the different support structures are located can be controlled by controlling the voltage signals output by the different output terminals of the voltage control assembly, and then the etching speed of the etching region of the wafer corresponding to the region where the different support structures are located can be adjusted, the uniformity of different etching regions of the wafer is improved, and the phenomenon of etching abnormality in some regions or edge bias during wafer etching is improved.

[0098] The various embodiments in the specification are described in a progressive or parallel or progressive and parallel manner, and each embodiment focuses on the difference from other embodiments. The same or similar parts between the various embodiments can be referred to each other. It should be noted that in the description of the present application, it should be understood that the drawings and the description of the embodiments are illustrative but not limiting. It should be noted that in this paper, relationship terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between the entities or operations.

[0099] The above description of the disclosed embodiments enables a person skilled in the art to implement or use the present application. Various modifications to the embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A plasma etching apparatus, characterized by, The application relates to a plasma reaction chamber, a radio frequency assembly, a bias electrode assembly and a voltage control assembly. The application relates to a plasma reaction chamber, a radio frequency assembly, a bias electrode assembly and a voltage control assembly. The bias electrode assembly comprises an electrostatic chuck, a voltage control assembly and a temperature control assembly. The electrostatic chuck comprises a first component structure and a second component structure, the second component structure is used for placing a wafer, the first component structure provides a bias electric field, the process gas moves to the wafer under the action of the bias electric field, the first component structure comprises at least two support structures, the support structures are conductive structures, and insulating separation structures are arranged between different support structures. The voltage control assembly comprises at least two output ends, and different support structures are provided with bias signals through different output ends. The voltage control assembly comprises a bias radio frequency power supply, a bias matching network, a power divider and at least two output ends. The at least two support structures are arranged around the center of the electrostatic chuck in a plane parallel to the plane where the electrostatic chuck is located, and different support structures are located on different sides of the center of the electrostatic chuck.

2. The plasma etching apparatus of claim 1, wherein, The at least two support structures comprise a first support structure which is a circular support structure, and other support structures which are annular support structures. The support structures comprise a plurality of sub-support structures, different sub-support structures in the same support structure are arranged around the center of the electrostatic chuck, and different support structures are located on different sides of the center of the electrostatic chuck. The second component structure comprises an insulating medium layer, an electrostatic adsorption plate in the insulating medium layer, and a cooling structure in the insulating medium layer. The cooling structure comprises a helium groove in the insulating medium layer and a helium source in communication with the helium groove.

3. The plasma etching apparatus of claim 1, wherein, The temperature control assembly comprises at least two temperature control structures, and different temperature control structures control the temperature of different support structures.

4. The plasma etching apparatus of claim 1, wherein, The temperature control structure comprises a heating layer in the insulating medium layer and a temperature controller in electrical connection with the heating layer.

5. The plasma etching apparatus of claim 4, wherein, The bias electrode assembly further comprises a cladding member which is arranged around the electrostatic chuck and protects the electrostatic chuck.

6. The plasma etching apparatus of claim 1, wherein, ​ ​ 7. The plasma etching apparatus of claim 6, wherein, ​ 8. The plasma etching apparatus of claim 6, wherein, ​ ​ 9. The plasma etching apparatus of claim 8, wherein, ​ ​ 10. The plasma etching apparatus of claim 1, wherein, ​ ​ A limiting ring is arranged on the surface of the cover for limiting the placement position of the wafer.

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