LED packaging structure
By employing a chip stacking structure in the LED packaging structure, the problems of low display density and image offset in display devices are solved, achieving the effect of high-definition image display.
Patent Information
- Application Number
- CN202423122137.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-17
- Publication Date
- 2025-12-09
- Estimated Expiration
- 2034-12-17
AI Technical Summary
Conventional LED packaging structures result in low display density, image offset, and low display accuracy due to the flat arrangement of chips, which cannot meet the requirements for high-definition image display.
The chip stacking structure includes a first chip, a second chip, and a third chip stacked vertically in sequence. The first and second chips are flip-chips, and the third chip is a regular chip. They are connected by soldering and adhesive layers to ensure electrical connection between the chips and the substrate, while reducing the size of the substrate.
This technology achieves a good connection between the chip and the substrate while reducing the substrate size, avoiding image shift, and increasing display density, making it suitable for high-definition image display.
Smart Images
Figure CN223652651U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of LED packaging technology, and in particular to an LED packaging structure. Background Technology
[0002] Conventional LED packaging structures typically involve laying out different colored LED chips flat on a support frame. A certain spacing needs to be maintained between the chips, and sufficient space must be reserved for wiring and pads. The overall area of the LED packaging structure is relatively large, resulting in a reduced display density in the display device. Furthermore, in the vertical direction, the light-emitting centers of different chips do not coincide, causing image shift and low display accuracy, making it unsuitable for high-definition image display. Utility Model Content
[0003] The technical problem to be solved by this utility model is to provide an LED packaging structure that can improve the display effect of the LED packaging structure.
[0004] To address the aforementioned problems, this utility model discloses an LED packaging structure, comprising:
[0005] substrate;
[0006] A chip stacking structure, comprising at least a first chip, a second chip, and a third chip stacked sequentially in a vertical direction, wherein the first chip, the second chip, and the third chip are all electrically connected to a substrate; the first chip and the second chip are flip-chips, and the third chip is a standard-mount chip; the first chip is at least partially disposed between the second chip and the substrate.
[0007] An encapsulating colloid that at least covers the chip stack structure.
[0008] As an improvement to the above technical solution, the centers of the first chip, the second chip, and the third chip are located on the same vertical line.
[0009] As an improvement to the above technical solution, the substrate is provided with a first pad, a second pad, and a third pad;
[0010] The electrodes of the first chip are soldered to the first pad;
[0011] The electrodes of the second chip are soldered to the second pad via soldering pillars;
[0012] The electrodes of the third chip are electrically connected to the third pad via wires.
[0013] As an improvement to the above technical solution, the welding column has a preset height so that the lower surface of the second chip after welding contacts the upper surface of the first chip.
[0014] As an improvement to the above technical solution, the welding pillars are disposed between the electrodes of the second chip and the substrate, and the number of welding pillars is the same as the number of electrodes of the second chip;
[0015] The second chip has at least two sets of heterogeneous electrodes, each set of heterogeneous electrodes including an N electrode and a P electrode disposed in the length direction of the second chip.
[0016] As an improvement to the above technical solution, a first adhesive layer is provided between the upper surface of the second chip and the lower surface of the third chip, and the second chip and the third chip are connected through the first adhesive layer.
[0017] As an improvement to the above technical solution, a second adhesive layer is provided between the upper surface of the first chip and the lower surface of the second chip, and the first chip and the second chip are connected through the second adhesive layer.
[0018] As an improvement to the above technical solution, the length of the first chip is less than the distance between the two opposite electrodes of the second chip.
[0019] As an improvement to the above technical solution, the first chip, the second chip, and the third chip emit light of different colors; the first chip, the second chip, and the third chip are respectively one of blue light chip, green light chip, and red light chip.
[0020] As an improvement to the above technical solution, both the first chip and the third chip are disposed within the projection area of the second chip in the vertical direction.
[0021] The present invention has the following advantages: By setting multiple light-emitting chips stacked in the vertical direction, the present invention avoids problems such as image offset and low display accuracy caused by flat setting, and is suitable for high-definition image display; in addition, the first chip and the second chip are both flip chips, and the third chip is a standard chip, which can further reduce the size of the substrate while ensuring the connection performance between the chip and the substrate, and meet the miniaturization requirements of display devices. Attached Figure Description
[0022] Figure 1 This is a schematic diagram of the LED packaging structure provided in this embodiment of the utility model. Detailed Implementation
[0023] To make the objectives, technical solutions and advantages of this utility model clearer, the utility model will be described in further detail below.
[0024] See Figure 1This invention provides an LED packaging structure, including a substrate 1, a chip stacking structure 2, and an encapsulating colloid 3. The chip stacking structure 2 includes at least a first chip 21, a second chip 22, and a third chip 23 stacked sequentially in a vertical direction, all of which are electrically connected to the substrate 1. The first chip 21 and the second chip 22 are both flip chips, with the first chip 21 at least partially disposed between the second chip 22 and the substrate 1. The encapsulating colloid 3 at least covers the chip stacking structure 2.
[0025] This invention avoids problems such as image offset and low display accuracy caused by flat chip arrangements by vertically stacking a first chip 21, a second chip 22, and a third chip 23 with overlapping light-emitting centers, making it suitable for high-definition image display. Furthermore, the first chip 21 and the second chip 22 are flip-chips, while the third chip 23 is a standard-mount chip. This allows for further reduction of the substrate size while maintaining chip-substrate connection performance, meeting the miniaturization requirements of display devices. It is understood that when multiple chips are of either a standard-mount or flip-chip structure, they are generally arranged in a stepped configuration. A standard-mount structure requires electrical connection between the chip and the substrate via wires; correspondingly, the pads on the substrate for conductive connection need to be located outside the vertical projection area of the chip. A flip-chip structure electrically connects the chip to the substrate via soldering; the solder pads on the substrate for soldering the chip need to be located within the vertical projection area of the chip. Therefore, the chip with the largest area among the stacked chips needs to be sufficiently large to ensure overall light-emitting effect. This invention stacks upright and flip-chips. It only requires that the first chip 21 be at least partially placed between the second chip 22 and the substrate 1, without limiting the size of the second chip 22 and the third chip 23. This can achieve a good connection between the first chip 21, the second chip 22 and the third chip 23 and the substrate 1, and the area of the substrate 1 can be further reduced, thereby realizing high-density display of the display device.
[0026] It is understandable that the chip stacking structure 2 may also include a fourth chip stacked on the surface of the third chip 23. The fourth chip is a standard chip, and the color purity and color gamut saturation are further improved by setting up four color chips.
[0027] In one embodiment, a first pad 11, a second pad 12, and a third pad 13 are provided on a substrate 1. It is understood that each of the first pad 11, second pad 12, and third pad 13 includes a pair of positive and negative pads. The electrode of the first chip 21 is soldered to the first pad 11; the electrode of the second chip 22 is soldered to the second pad 12 via a soldering post 4, and light emitted from inside the second chip can be emitted through the gap between the top of the chip and the soldering post; the electrode of the third chip 23 is electrically connected to the third pad 13 via a wire 5.
[0028] Specifically, in one embodiment, the length of the first chip 21 is less than the distance between the two opposite electrodes of the second chip 22, thereby ensuring that the first chip 21 is at least partially disposed between the second chip 22 and the substrate 1. Correspondingly, the width relationship between the first chip 21 and the second chip 22 is not specifically limited. Specifically, the width of the first chip 21 can be less than or equal to the width of the second chip 22, meaning the first chip 21 is completely disposed within the vertical projection area of the second chip 22. Alternatively, the width of the first chip 21 can be greater than the width of the second chip 22, meaning that in the width direction, the edge of the first chip 21 is disposed outside the vertical projection area of the second chip 22, ensuring that the soldering of the second chip 22 to the substrate 1 is not affected by the first chip 21.
[0029] In a preferred embodiment, both the first chip 21 and the third chip 23 are disposed in the projection area of the second chip 22 in the vertical direction, thereby miniaturizing the packaging structure while ensuring light efficiency and improving the display density of the display device.
[0030] To achieve high-quality soldering between the second chip 22 and the substrate 1, the soldering post 4 has a preset height so that the lower surface of the soldered second chip 22 contacts the upper surface of the first chip 21. In a preferred embodiment, to improve the connection stability of the first chip 21 and the second chip 22, a second adhesive layer is provided between the upper surface of the first chip 21 and the lower surface of the second chip 22, and the first chip 21 and the second chip 22 are connected through the second adhesive layer. The material of the second adhesive layer can be a transparent, highly thermally conductive insulating adhesive layer, an insulating film, or an insulating and heat-dissipating adhesive, etc., but is not limited to these.
[0031] Specifically, the welding posts 4 are disposed between the electrodes of the second chip 22 and the substrate 1. The number of welding posts 4 is the same as the number of electrodes of the second chip 22, that is, the welding posts 4 correspond one-to-one with the electrodes of the second chip 22.
[0032] Specifically, the second chip 22 has at least two sets of heterogeneous electrodes, each set including an N-electrode and a P-electrode along the length of the second chip 22. In a preferred embodiment, the second chip 22 has four electrodes, namely two N-electrodes and two P-electrodes, and the lines connecting the four electrodes form a rectangle similar in shape to the second chip 22. Light emitted from the first chip 21 can exit from the top and sides of the chip. Four rectangularly distributed solder pillars are provided at the bottom of the second chip 22 to ensure that the light from the first chip 21 exits through the gaps between the solder pillars. The arrangement of the four electrodes ensures soldering stability and improves the light efficiency of the packaged chip.
[0033] In a preferred embodiment, the first chip 21 is also provided with four electrodes, namely two N electrodes and two P electrodes, and the connection of the four electrodes forms a rectangle similar in shape to the first chip 21.
[0034] To prevent the third chip 23 from moving during the packaging process, in a preferred embodiment, a first adhesive layer is provided between the upper surface of the second chip 22 and the lower surface of the third chip 23, and the second chip 22 and the third chip 23 are connected by the first adhesive layer. The material of the first adhesive layer can be a transparent, highly thermally conductive insulating layer, an insulating film, or an insulating and heat-dissipating adhesive, but is not limited to these.
[0035] It is understood that the emitted light colors of the first chip 21, the second chip 22, and the third chip 23 are different. Specifically, the first chip 21, the second chip 22, and the third chip 23 are respectively one of a blue light chip, a green light chip, and a red light chip. The vertical arrangement of the three colors of chips can be adjusted according to LED design requirements, and different light-emitting effects can be achieved by individually controlling the light emitted by the first chip 21, the second chip 22, and the third chip 23. In a preferred embodiment, the centers of the first chip 21, the second chip 22, and the third chip 23 are located on the same vertical line, thereby further improving the display effect after the three colors are mixed.
[0036] Accordingly, the LED packaging structure of this utility model can be obtained by the following LED packaging method, which includes the following steps:
[0037] S1. Provide a substrate;
[0038] Specifically, a copper substrate is formed by etching, and then epoxy resin or other resins are injected into the gaps of the copper substrate using a mold to obtain the substrate.
[0039] S2. Solder the first chip to the substrate;
[0040] Specifically, a soldering material is coated on the first pad of the substrate, and a first chip is placed on the soldering material, so that the electrodes of the first chip come into contact with the soldering material on the first pad. Then, the soldering material is heated to melt and then solidify. The heating temperature is 230℃~260℃, and the heating time is 25s~35s, so that the electrodes of the first chip and the first pad are soldered together. Optionally, the soldering material is solder paste or silver paste, but it is not limited to these.
[0041] S3. A second chip is disposed on the upper surface of the first chip, and the second chip is soldered to the substrate;
[0042] Specifically, in one embodiment, the bonding of the second chip to the substrate includes the following steps:
[0043] S31. Set welding posts on the substrate where the first chip has been welded, and weld the welding posts to the substrate; the positions of the welding posts correspond one-to-one with the electrodes of the second chip.
[0044] Specifically, a soldering material is coated onto the second pad of the substrate, and a soldering post is placed on the soldering material so that it contacts the soldering material on the second pad. The soldering material is then heated to melt and solidify, with a heating temperature of 230℃~260℃ and a heating time of 25s~35s, causing the soldering post to bond with the second pad. Optionally, the soldering material can be solder paste or silver paste, but is not limited to these.
[0045] S32. Place a second chip on the welding post and weld the electrodes of the second chip to the welding post.
[0046] Specifically, a welding material is coated onto a welding pillar, and a second chip is placed on the welding material, so that the electrodes of the second chip come into contact with the welding material on the welding pillar. Then, the welding material is heated to melt and then solidify. The heating temperature is 230℃~260℃, and the heating time is 25s~35s, so that the electrodes of the second chip and the welding pillar are welded together. Optionally, the welding material can be solder paste or silver paste, but it is not limited to these.
[0047] S4. A third chip is placed on the upper surface of the second chip, and the third chip is electrically connected to the substrate through wires to obtain a chip stacking structure.
[0048] Specifically, in one embodiment, an adhesive is coated on the upper surface of the second chip to form a second adhesive layer, and a third chip is placed on the second adhesive layer. The adhesive is then heated to solidify at a temperature of 150°C to 170°C for 1.5 to 2 hours. Wires are then soldered between the electrodes of the third chip and the third pads of the substrate to form a conductive connection.
[0049] S5. After molding the encapsulating colloid onto the chip stack structure, cut it to obtain the LED encapsulation structure.
[0050] In a preferred embodiment, the encapsulating colloid is made of transparent silicone.
[0051] The present invention will be further described below with reference to specific embodiments:
[0052] Example 1
[0053] This embodiment provides an LED packaging structure, including a substrate, a chip stacking structure, and an encapsulating colloid.
[0054] The substrate has a first pad, a second pad, and a third pad.
[0055] The chip stacking structure comprises blue, green, and red LED chips stacked vertically in sequence. The blue and green LED chips are flip-chips, while the red LED chip is a regular-mount chip. The electrodes of the blue LED chip are soldered to the first pad; the electrodes of the green LED chip are soldered to the second pad via two solder posts; the electrodes of the red LED chip are electrically connected to the third pad via wires. The length of the blue LED chip is less than the distance between the two oppositely shaped electrodes of the green LED chip.
[0056] Encapsulating colloid covering chip stacking structure.
[0057] Example 2
[0058] This embodiment provides an LED packaging structure, including a substrate, a chip stacking structure, and an encapsulating colloid.
[0059] The substrate has a first pad, a second pad, and a third pad.
[0060] The chip stacking structure includes blue, green, and red LED chips stacked vertically in sequence. The blue and green chips are flip-chips, while the red chip is a regular-mount chip. The electrodes of the blue chip are soldered to a first pad; the electrodes of the green chip are soldered to a second pad via solder posts. The green chip has four electrodes: two N-electrodes and two P-electrodes. The two N-electrodes are located on one side of the green chip's length, and the two P-electrodes are located on the other side. There are four solder posts. The electrodes of the red chip are electrically connected to a third pad via wires. The length of the blue chip is less than the distance between the two opposite-shaped electrodes of the green chip.
[0061] Encapsulating colloid covering chip stacking structure.
[0062] Comparative Example 1
[0063] This comparative example provides an LED packaging structure, including a substrate, a chip stack structure, and an encapsulating colloid.
[0064] The substrate has a first pad, a second pad, and a third pad.
[0065] The chip stacking structure includes blue, green, and red LED chips stacked vertically in sequence. The blue, green, and red LED chips are upright. The electrodes of the blue LED chip are soldered to the first pad via wires; the electrodes of the green LED chip are soldered to the second pad via wires; and the electrodes of the red LED chip are electrically connected to the third pad via wires. The blue, green, and red LED chips are arranged in a stepped configuration.
[0066] Encapsulating colloid covering chip stacking structure.
[0067] The LED packaging structures of Examples 1, 2, and Comparative Example 1 were tested, and the luminous efficacy improvement rates of Examples 1 and 2 relative to Comparative Example 1 were calculated. The results showed that the luminous efficacy improvement rates of Examples 1 and 2 relative to Comparative Example 1 were 1.85% and 2.47%, respectively. The LED packaging structure provided by the present invention can improve the display effect of the display device.
[0068] The above description is a preferred embodiment of the utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the utility model, and these improvements and modifications are also considered to be within the protection scope of the utility model.
Claims
1. An LED packaging structure, characterized in that, include: substrate; A chip stacking structure, comprising at least a first chip, a second chip, and a third chip stacked sequentially in a vertical direction, wherein the first chip, the second chip, and the third chip are all electrically connected to a substrate; the first chip and the second chip are flip-chips, and the third chip is a standard-mount chip; the first chip is at least partially disposed between the second chip and the substrate. An encapsulating colloid that at least covers the chip stack structure.
2. The LED packaging structure as described in claim 1, characterized in that, The centers of the first chip, the second chip, and the third chip are located on the same vertical line.
3. The LED packaging structure as described in claim 1, characterized in that, The substrate is provided with a first pad, a second pad, and a third pad; The electrodes of the first chip are soldered to the first pad; The electrodes of the second chip are soldered to the second pad via soldering pillars; The electrodes of the third chip are electrically connected to the third pad via wires.
4. The LED packaging structure as described in claim 3, characterized in that, The welding post has a preset height so that the lower surface of the second chip after welding contacts the upper surface of the first chip.
5. The LED packaging structure as described in claim 3, characterized in that, The welding posts are disposed between the electrodes of the second chip and the substrate, and the number of welding posts is the same as the number of electrodes of the second chip; The second chip has at least two sets of heterogeneous electrodes, each set of heterogeneous electrodes including an N electrode and a P electrode disposed in the length direction of the second chip.
6. The LED packaging structure as described in claim 1, characterized in that, A first adhesive layer is provided between the upper surface of the second chip and the lower surface of the third chip, and the second chip and the third chip are connected through the first adhesive layer.
7. The LED packaging structure as described in claim 1, characterized in that, A second adhesive layer is provided between the upper surface of the first chip and the lower surface of the second chip, and the first chip and the second chip are connected through the second adhesive layer.
8. The LED packaging structure as described in claim 1, characterized in that, The length of the first chip is less than the distance between the two opposite electrodes of the second chip.
9. The LED packaging structure as described in claim 1, characterized in that, The first chip, the second chip, and the third chip emit light of different colors; the first chip, the second chip, and the third chip are respectively one of blue light chip, green light chip, and red light chip.
10. The LED packaging structure as described in claim 1, characterized in that, Both the first chip and the third chip are located within the vertical projection area of the second chip.