Test circuit and chip test system
By employing a test circuit that detects sudden current changes in battery protection chip testing, the test delay problem is solved, and the test efficiency is improved. This method is applicable to the testing of wafers and chips.
Patent Information
- Application Number
- CN202422962620.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-29
- Publication Date
- 2025-12-16
- Estimated Expiration
- 2034-11-29
AI Technical Summary
The existing battery protection chip testing process suffers from delays, resulting in low production efficiency and an inability to effectively screen out chips that meet expectations.
A test circuit including a first resistor, a first comparison module, a first switching transistor, and a current detection module is adopted. The actual threshold of the power parameters is determined by detecting sudden changes in current, thereby reducing test delay.
It effectively reduces test latency and improves test efficiency, and can be widely used in wafer and chip testing scenarios.
Smart Images

Figure CN223679299U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to integrated circuit technical field, concretely relates to a test circuit and chip test system. BACKGROUND
[0002] At present, the application scene and demand of battery are increasing, usually need to set battery protection chip for battery, prevent battery from overcharge, overdischarge, overtemperature and other faults. In the prior art, the actual parameter of battery protection chip does not conform to the theoretical parameter in production process, therefore, the actual parameter of battery protection chip needs to be detected to screen out the chip meeting the expectation. In the existing test, after the given test voltage / current, the circuit in battery protection chip processes to produce corresponding result, and the test equipment judges whether the result meets the expectation, in the process, in order to prevent the detection result from being interfered, usually adds the circuit of filtering interference, shielding and the like, and this leads to that the test result will exist a delay, and this delay will increase the time length of test, reduces production efficiency. UTILITARIAN CONTENT
[0003] The utility model embodiment is aimed at providing a test circuit and chip test system to solve the above problems. The utility model embodiment realizes the above purpose through the following technical scheme.
[0004] The utility model embodiment provides a test circuit, the test circuit includes: test end with test voltage;First resistance, be connected between test end and reference ground terminal;The first input end of first comparison module is connected with the first detection end, and the second input end is connected with the first reference terminal;The first switch tube and the second resistance that are connected in series are connected between test end and reference ground terminal, and the controlled end of first switch tube is connected with the output end of first comparison module, and the current of test end is suddenly changed under the power parameter abnormal condition of first detection end;Current detection module is connected with test end, detects the current mutation condition of test end to obtain the actual threshold value corresponding to power parameter.
[0005] In some embodiments, the test circuit further includes: an enabling module, the input end of which is connected with the test end, and the input end voltage is the test voltage, and the output disabling signal is output when the input end voltage is the test voltage;Battery charge and discharge power tube, the controlled end of which is connected with the output end of the enabling module, and the controlled end of the battery charge and discharge power tube receives the disabling signal to cut off to shut down the charge and discharge loop.
[0006] In some embodiments, the test circuit further includes: a voltage dividing module, which is connected between the battery voltage end and the reference ground end, and the voltage dividing node of the voltage dividing module is connected with the first detection end.
[0007] In some embodiments, the test circuit further includes: a first voltage supply module, which is connected with the battery voltage end, and provides gradually increasing voltage to the battery voltage end.
[0008] In some embodiments, the battery voltage terminal is connected with the test terminal.
[0009] In some embodiments, the test circuit further comprises: a first switch, a first end of which is connected with the first input terminal of the first comparison module, and a second end of which is connected with the first detection terminal, the power parameter of the first detection terminal representing the actual voltage size; a second switch, a first end of which is connected with the first input terminal of the first comparison module, and a second end of which is connected with the second detection terminal, the power parameter of the second detection terminal representing the actual current size; a third switch, a first end of which is connected with the second input terminal of the first comparison module, and a second end of which is connected with the first reference terminal; and a fourth switch, a first end of which is connected with the second input terminal of the first comparison module, and a second end of which is connected with the second reference terminal.
[0010] In some embodiments, the test circuit further comprises: a second comparison module, a first input terminal of which is connected with the second detection terminal, and a second input terminal of which is connected with the second reference terminal, the power parameter of the second detection terminal representing the actual current size; and a second switch tube and a third resistor connected in series, connected between the test terminal and the reference ground terminal, a controlled end of the second switch tube being connected with the output terminal of the second comparison module, the current of the test terminal being suddenly changed under the abnormal condition of the current of the second detection terminal.
[0011] In some embodiments, the second detection terminal is connected with the negative terminal of the load or the charger.
[0012] In some embodiments, the test circuit further comprises: a second voltage supply module, connected with the negative terminal of the load or the charger, and providing a voltage representing a gradual change of the test current to the negative terminal of the load or the charger.
[0013] The utility model embodiment further provides a chip test system, including the test circuit of any one of above-mentioned embodiments, wherein, the first resistance, the first comparison module, the first switch tube, the second resistance are placed in the same wafer.
[0014] In the test circuit and the chip test system provided in the embodiment, the test circuit comprising the first resistance, the second resistance, the first switch tube, the first comparison module and the current detection module can detect the sudden change of the current of the test terminal when the power parameter of the first detection terminal is abnormal, effectively determine the actual threshold corresponding to the power parameter in the wafer or the chip, reduce the test delay, improve the test efficiency, and can also be widely applied to various wafer test and chip test scenes. BRIEF DESCRIPTION OF DRAWINGS
[0015] In order to more clearly illustrate the technical scheme of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the description of the embodiments of the present application. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor.
[0016] Figure 1 is a circuit structure schematic diagram of the test circuit provided by the present embodiment;
[0017] Figure 2 is a schematic diagram of an application scenario of the test circuit provided by the present embodiment;
[0018] Figure 3 is a current schematic diagram of the test circuit provided by the present embodiment;
[0019] Figure 4 is another circuit structure schematic diagram of the test circuit provided by the present embodiment;
[0020] Figure 5 is still another circuit structure schematic diagram of the test circuit provided by the present embodiment. DETAILED DESCRIPTION
[0021] The technical scheme in the embodiments of the present application will be described clearly and completely in the following by combining the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the protection scope of the present application.
[0022] As shown in Figure 1 , the present embodiment provides a test circuit, comprising: a test end C with a test voltage; a first resistor R1 connected between the test end C and a reference ground end GND; a first comparison module 11, a first input end of which is connected with a first detection end A1, and a second input end of which is connected with a first reference end B1; a first switch tube M1 and a second resistor R2 connected in series, which are connected between the test end C and the reference ground end GND, and a controlled end of the first switch tube M1 is connected with an output end of the first comparison module 11, under the condition that the power parameter of the first detection end A1 is abnormal, the current of the test end C is suddenly changed; a current detection module 12 connected with the test end C, which detects the current mutation of the test end C to obtain the actual threshold value corresponding to the power parameter.
[0023] In the present embodiment, the test end C can be a preset test area on a wafer, or a preset test pin on a chip, and the specific presentation form of the test end C is not limited here.
[0024] In the embodiment, when the wafer or chip needs to be tested, the voltage of the test terminal C is set as a test voltage, and the size of the test voltage can be set based on actual conditions. Therefore, when the wafer or chip is in the test mode, if the first switch tube M1 is off, the current of the test terminal C is V(C) / R1; if the first switch tube M1 is on, the voltage of the test terminal C is V(C) / R1+V(C) / R2.
[0025] In the embodiment, the power parameter of the first detection terminal A1 can include voltage and current. The power parameter of the first detection terminal A1 can represent battery charging voltage, battery charging current, battery discharging current, etc. Specifically, in the test mode, if the overcharge voltage threshold of the wafer or chip needs to be obtained, the power parameter of the first detection terminal A1 can be voltage, and the voltage can represent the size of the battery charging voltage. The power parameter of the first reference terminal B1 used for comparison with the power parameter of the first detection terminal A1 is also voltage. If the overdischarge current threshold of the wafer or chip needs to be obtained, the power parameter of the first detection terminal A1 can be current, and the current can represent the size of the battery charging current. The power parameter of the first reference terminal B1 used for comparison with the power parameter of the first detection terminal A1 is also current.
[0026] It should be noted that the voltage can also represent the size of the current. For example, when the overdischarge current threshold needs to be detected in the test mode, the current battery discharging current can be converted into a voltage signal and compared with the corresponding overdischarge current threshold.
[0027] In the embodiment, the first comparison module 11 can be a voltage comparator or a current comparator, and the type of the specific comparator can be set according to actual selection requirements. For example, when the power parameter of the first detection terminal A1 and the power parameter of the first reference terminal B1 are voltage, the first comparison module 11 can be a voltage comparator; when the power parameter of the first detection terminal A1 and the power parameter of the first reference terminal B1 are current, the first comparison module 11 can be a current comparator.
[0028] In the embodiment, in the test mode, if the power parameter of the first detection terminal A1 is normal, the output end of the first comparison module 11 controls the first switch tube M1 to be cut off through the controlled end of the first switch tube M1, and the current of the test terminal C is V(C) / R1; if the power parameter of the first detection terminal A1 is abnormal, the output end of the first comparison module 11 controls the first switch tube M1 to be turned on through the controlled end of the first switch tube M1, and the current of the test terminal C is V(C) / R1+V(C) / R2, at this time, the current of the test terminal C can be detected by the current detection module 12 to determine whether the power parameter is abnormal. Alternatively, in the test mode, if the power parameter of the first detection terminal A1 is normal, the output end of the first comparison module 11 controls the first switch tube M1 to be turned on through the controlled end of the first switch tube M1, and the current of the test terminal C is V(C) / R1+V(C) / R2; if the power parameter of the first detection terminal A1 is abnormal, the output end of the first comparison module 11 controls the first switch tube M1 to be cut off through the controlled end of the first switch tube M1, and the current of the test terminal C is V(C) / R1, at this time, the current of the test terminal C can also be detected by the current detection module 12 to determine whether the power parameter is abnormal.
[0029] In the embodiment, if the current of the test terminal C is detected to be mutated by the current detection module 12, it indicates that the electrical signal represented by the given power parameter of the first detection terminal A1 is the actual threshold value of the current wafer or chip, and the threshold value represented by the power parameter can be obtained.
[0030] In addition, in the embodiment, the test terminal C, the second resistance R2, the first switch tube M1 and the reference ground terminal GND are connected in sequence, or the test terminal C, the first switch tube M1, the second resistance R2 and the reference ground terminal GND are connected in sequence, and the specific connection mode of the second resistance R2 and the first switch tube M1 is not limited.
[0031] In the embodiment, by adopting the test circuit including the first resistance R1, the second resistance R2, the first switch tube M1, the first comparison module 11 and the current detection module 12, the current mutation of the test terminal C can be detected when the power parameter of the first detection terminal A1 is abnormal, the actual threshold value corresponding to the power parameter in the wafer or chip can be effectively determined, the test delay is reduced, the test efficiency is improved, and the test circuit can also be widely applied to various wafer test and chip test scenes.
[0032] Further, in some embodiments, as shown in Figure 1 the test circuit can further include an enabling module 13, the input end of which is connected with the test terminal C, and the enabling module 13 outputs a disable signal when the input end voltage is the test voltage; and a charge-discharge power tube 14, the controlled end of which is connected with the output end of the enabling module 13, and the controlled end of the charge-discharge power tube 14 is cut off to shut down the charge-discharge circuit when receiving the disable signal.
[0033] In the embodiment, the test circuit can be applied to the battery protection circuit scenario, as shown in Figure 2 The first end of the charge-discharge power tube 14 can be connected with the reference ground end GND, the second end of the charge-discharge power tube 14 can be connected with the negative end VM of the load or charger, and the controlled end of the charge-discharge power tube 14 is connected with the output end of the enable module 13.
[0034] In the embodiment, when entering the test mode, the enable module 13 can output the disable signal through the output end to control the charge-discharge power tube 14 to be cut off, so as to protect the charge-discharge power tube 14 and the circuit in the wafer or chip when the voltage of the test end C is the test voltage. When the charge-discharge power tube 14 is the power tube composed of NMOS, the enable module 13 can be an inverter or a device similar to the inverter function, so as to realize that when the test voltage is a high voltage, the low voltage is output through the output end of the enable module 13 to control the charge-discharge power tube 14 to be cut off, and the charge-discharge power tube 14 is prevented from being damaged. In addition, the charge-discharge power tube 14 can include the charge power tube and the discharge power tube, and can also include the power tube with the substrate switching diode function, and the specific type and structure of the charge-discharge power tube 14 are not limited here.
[0035] Further, in some embodiments, the test circuit can further include a voltage division module connected between the battery voltage end VDD and the reference ground end GND, and the voltage division node of the voltage division module is connected with the first detection end A1.
[0036] In the embodiment, the voltage division module can include at least two series resistors, and the node between the resistors is used as the voltage division node of the voltage division module. It should be noted that in the test mode, in order to simulate the scenario of the battery protection chip under normal working condition, the voltage is stably provided to the battery voltage end VDD, and the power parameters of the voltage division node of the voltage division module and the first detection end A1 can represent the size of the battery voltage end VDD. When the output end of the first comparison module 11 is reversed and the current detection module 12 detects the current mutation of the test end C, it indicates that the voltage of the currently given battery voltage end VDD reaches the battery charging overvoltage threshold.
[0037] Further, in some embodiments, the test circuit can further include a first voltage supply module connected with the battery voltage end VDD, which provides the gradually increasing voltage to the battery voltage end VDD.
[0038] In the embodiment, through the first power supply module, the voltage of the battery voltage end VDD will gradually increase, and when the current detection module 12 detects the current mutation of the test end C, it indicates that the voltage of the currently given battery voltage end VDD reaches the battery charging overvoltage threshold, and the first power supply module can stop providing the gradually increasing voltage to the battery voltage end VDD.
[0039] Further, in some embodiments, the test voltage of the test terminal C is a fixed value. At this time, as shown in Figure 3 (a) is the current schematic diagram of the test terminal C under the condition that the power parameter of the first detection terminal A1 is normal and the first switch tube M1 is off. It can be found that, in the case that the test voltage of the test terminal C is a fixed value, if the power parameter of the first detection terminal A1 is normal, the current of the test terminal C is V(C) / R1, and if the power parameter of the first detection terminal A1 is abnormal, the current of the test terminal C is V(C) / R1+V(C) / R2, which can reduce the difficulty of the current detection module 12 in detecting the current mutation of the test terminal C.
[0040] Further, in some embodiments, the battery voltage terminal VDD can be connected with the test terminal C. At this time, as shown in Figure 3 (a) is the current schematic diagram of the test terminal C under the condition that the power parameter of the first detection terminal A1 is normal and the first switch tube M1 is off. It can be found that, in the case that the test voltage of the test terminal C is a fixed value, if the power parameter of the first detection terminal A1 is normal, the current of the test terminal C is V(C) / R1, and if the power parameter of the first detection terminal A1 is abnormal, the current of the test terminal C is V(C) / R1+V(C) / R2, since the voltage of the test terminal C follows the voltage change of the battery voltage terminal VDD, the current of the test terminal C will also gradually increase. The method of connecting the battery voltage terminal VDD with the test terminal C can omit one detection port in the actual application process, and reduce the number of detection ports required by the test equipment.
[0041] Further, in some embodiments, as shown in Figure 4 The test circuit can further include: a first switch K1, a first end of which is connected with the first input end of the first comparison module 11, and a second end of which is connected with the first detection terminal A1, the power parameter of the first detection terminal A1 representing the actual voltage size; a second switch K2, a first end of which is connected with the first input end of the first comparison module 11, and a second end of which is connected with the second detection terminal A2, the power parameter of the second detection terminal A2 representing the actual current size; a third switch K3, a first end of which is connected with the second input end of the first comparison module 11, and a second end of which is connected with the first reference terminal B1; and a fourth switch K4, a first end of which is connected with the second input end of the first comparison module 11, and a second end of which is connected with the second reference terminal B2.
[0042] In the embodiment, when the power parameter of the first detection terminal A1 needs to be compared with the power parameter of the first reference terminal B1, the first switch K1 and the third switch K3 can be controlled to be turned on, and the second switch K2 and the fourth switch K4 can be controlled to be turned off; when the power parameter of the second detection terminal A2 needs to be compared with the power parameter of the second reference terminal B2, the second switch K2 and the fourth switch K4 can be controlled to be turned on, and the first switch K1 and the third switch K3 can be controlled to be turned off. Thus, in the embodiment, the first comparison module 11 can be used in time, and the actual threshold corresponding to different power parameters can be obtained by testing, thereby saving the wafer area.
[0043] Further, in some embodiments, as shown in Figure 5 The test circuit can further include a second comparison module 15, a first input terminal of the second comparison module 15 being connected with the second detection terminal A2, a second input terminal of the second comparison module 15 being connected with the second reference terminal B2, the power parameter of the second detection terminal A2 representing the actual current; a second switch tube M2 and a third resistor R3 connected in series between the test terminal C and the reference ground terminal GND, a controlled terminal of the second switch tube M2 being connected with an output terminal of the second comparison module 15, the current of the test terminal C being suddenly changed under the abnormal condition of the current of the second detection terminal A2.
[0044] In the embodiment, the actual current represented by the power parameter of the second detection terminal A2 can be the discharge current under the discharge condition of the battery, or can be the charging current under the charging condition of the battery.
[0045] In the embodiment, the test terminal C, the third resistor R3, the second switch tube M2 and the reference ground terminal GND are connected in sequence, or the test terminal C, the second switch tube M2, the third resistor R3 and the reference ground terminal GND are connected in sequence, and the specific connection mode of the third resistor R3 and the second switch tube M2 is not limited here.
[0046] Further, in some embodiments, the second detection terminal A2 can be connected with the negative terminal VM of the load or the charger.
[0047] In the embodiment, the power parameter representing the actual current size can be provided to the negative terminal VM of the load or charger. It should be noted that the actual current represented by the power parameter of the second detection terminal A2 is usually very small and inconvenient to obtain directly in wafer testing, and therefore the actual current can be converted into a voltage signal representing the size of the actual current. When the output terminal of the second comparison module 15 is reversed and the current detection module 12 detects the current mutation of the test terminal C, the corresponding current threshold can be obtained by the current voltage of the negative terminal VM of the load or charger and the impedance of the charge-discharge power tube 14. For example, in the test mode, the battery over-discharge current threshold needs to be detected, and when the current detection module 12 detects the current mutation of the test terminal C, the voltage of the negative terminal VM of the load or charger is VM', and the battery over-discharge current threshold is VM' / Rds(on), wherein Rds(on) is the on-resistance of the charge-discharge power tube 14.
[0048] Further, in some embodiments, the test circuit can further include a second voltage supply module connected to the negative terminal VM of the load or charger, which provides a voltage representing the step change of the test current to the negative terminal VM of the load or charger.
[0049] In the embodiment, the test circuit can be used to test the battery charging current threshold or the battery discharging current threshold, and therefore the second voltage supply module can correspondingly provide a voltage representing the step increase or decrease of the test current to the negative terminal VM of the load or charger.
[0050] The embodiment also provides a chip test system including the test circuit of any of the above embodiments, wherein the first resistor R1, the first comparison module 11, the first switch tube M1, and the second resistor R2 are placed in the same wafer. Since the circuit structure and working mode of the test circuit in the chip test system of the embodiment are the same as those of the test circuit of the above embodiments, details are not repeated here.
[0051] The above-described embodiments are only used to illustrate the technical solutions of the present application, but not limit it; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can be modified, or some technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.
Claims
1. A test circuit, characterized by The test circuit comprises: a test terminal with a test voltage; a first resistor connected between the test terminal and a reference ground terminal; a first comparison module, a first input terminal of which is connected to a first detection terminal, and a second input terminal of which is connected to a first reference terminal; a first switch tube and a second resistor connected in series between the test terminal and the reference ground terminal, a controlled terminal of the first switch tube being connected to an output terminal of the first comparison module, and a current of the test terminal being suddenly changed under an abnormal condition of a power parameter of the first detection terminal; a current detection module connected to the test terminal, which detects a sudden change of the current of the test terminal to obtain an actual threshold value corresponding to the power parameter.
2. The test circuit of claim 1, wherein, Further comprising: an enabling module, an input terminal of which is connected to the test terminal, and the enabling module outputting a disable signal when an input voltage of the input terminal is the test voltage; a battery charging and discharging power tube, a controlled terminal of which is connected to an output terminal of the enabling module, and the battery charging and discharging power tube being cut off to shut down a charging and discharging loop when the controlled terminal receives the disable signal.
3. The test circuit of claim 1, wherein, Further comprising: a voltage division module connected between a battery voltage terminal and the reference ground terminal, and a voltage division node of the voltage division module being connected to the first detection terminal.
4. The test circuit of claim 3, wherein, Further comprising: a first voltage supply module connected to the battery voltage terminal, which provides a voltage gradually increasing to the battery voltage terminal.
5. The test circuit of claim 4, wherein, The battery voltage terminal is connected to the test terminal.
6. The test circuit of claim 1, wherein, Further comprising: a first switch, a first terminal of which is connected to the first input terminal of the first comparison module, and a second terminal of which is connected to the first detection terminal, and a power parameter of the first detection terminal representing an actual voltage; a second switch, a first terminal of which is connected to the first input terminal of the first comparison module, and a second terminal of which is connected to a second detection terminal, and a power parameter of the second detection terminal representing an actual current; a third switch, a first terminal of which is connected to the second input terminal of the first comparison module, and a second terminal of which is connected to the first reference terminal; a fourth switch, a first terminal of which is connected to the second input terminal of the first comparison module, and a second terminal of which is connected to a second reference terminal.
7. The test circuit of claim 2, wherein, Further comprising: a second comparison module, a first input terminal of which is connected to the second detection terminal, and a second input terminal of which is connected to the second reference terminal, and a power parameter of the second detection terminal representing an actual current; a second switch tube and a third resistor connected in series between the test terminal and the reference ground terminal, a controlled terminal of the second switch tube being connected to an output terminal of the second comparison module, and a current of the test terminal being suddenly changed under an abnormal condition of the current of the second detection terminal.
8. The test circuit of claim 7, wherein, The second detection terminal is connected to a negative terminal of a load or a charger.
9. The test circuit of claim 8, wherein, Further comprising: a second voltage supply module connected to the negative terminal of the load or the charger, which provides a voltage representing a gradual change of a test current to the negative terminal of the load or the charger.
10. A chip testing system, characterized by comprising: The test circuit comprises any one of the test circuits according to claims 1 to 9, wherein the first resistor, the first comparison module, the first switch tube, and the second resistor are disposed on the same wafer.