Novel system external watchdog control circuit

By using a novel external watchdog control circuit, which utilizes a tri-state buffer and DIP switches to control the watchdog signal, the chip reset problem caused by the hardware watchdog during program updates and debugging is solved, thus improving the reliability of programming and debugging.

CN223679635UActive Publication Date: 2025-12-16ZHUHAI VIRTUAL POWER PLANT TECH CO LTD
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Patent Information

Application Number
CN202423147764.1
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-12-19
Publication Date
2025-12-16
Estimated Expiration
2034-12-19

AI Technical Summary

Technical Problem

Hardware watchdogs can easily cause chip resets during program updates and debugging, affecting the failure rate and debugging difficulty during programming.

Method used

A novel external watchdog control circuit is adopted, which controls the transmission of watchdog signals through a combination of tri-state buffer and DIP switch to ensure that no reset occurs during program burning or debugging.

Benefits of technology

This ensures that the normal process and quality are not affected during program burning and debugging, reducing the defect rate and debugging difficulty.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model aims to provide the novel system external watchdog management and control circuit which is simple in structure and does not influence the burning process and quality during program burning. The circuit comprises a watchdog (1), the watchdog (1) is connected with a reset pin (2) of an MCU, a WDI pin of the watchdog (1) is connected with a three-state buffer (3), an A pin of the three-state buffer (3) is connected with an external watchdog feeding signal (WDI), an OE pin of the three-state buffer (3) is connected with a dial switch (4), the other end of the dial switch (4) is connected with a negative electrode of a direct-current power supply (E), and the other end of the direct-current power supply (E) is connected with a positive electrode of the MCU. The dial switch (4) and the negative electrode of the direct-current power supply (E) are grounded, the positive electrode of the direct-current power supply (E) is connected with an OE pin of the three-state buffer (3) through a resistor (R), and a switch button (5) is arranged at the grounding end of the watchdog (1). The utility model relates to the technical field of chip burning.
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Description

TECHNICAL FIELD

[0001] The utility model relates to chip burning technology field, concretely, a new type system external watchdog control circuit is related. BACKGROUND

[0002] Hardware watchdog as the guarantee of MCU system stable operation, can reset MCU when bottom code runs away and dies, but, hardware watchdog as the function of system active reset chip when program runs away or dies, also extremely easy to reset in program update and debugging process, influence the bad rate of burning time and the difficulty of debugging time. CONTENT OF UTILITY MODEL

[0003] In view of the deficiency in prior art, the utility model provides a new type system external watchdog control circuit which is simple in structure and does not affect the burning process and quality when burning program.

[0004] In order to realize the above-mentioned purpose, the technical scheme that the utility model adopts is: a new type system external watchdog control circuit, including watchdog, the reset pin of MCU is connected with the watchdog, the WDI pin of the watchdog is connected with tri-state buffer, the A pin of tri-state buffer is connected with external watchdog feeding signal, the OE pin of tri-state buffer is connected with dial switch, the other end of dial switch is connected with the negative pole of DC power supply, dial switch and the negative pole of DC power supply are grounded, the positive pole of DC power supply is connected with the OE pin of tri-state buffer through resistance, and the grounding end of watchdog is provided with switch button.

[0005] The above-mentioned scheme can see that the utility model circuit setting structure is simple, and external watchdog feeding signal WDI passes through tri-state buffer, according to the truth table of tri-state buffer, obtains when dial switch is pulled to ground, tri-state buffer follows A phase input, at this time, system can normally operate, when MCU is in debugging or burning, resets dial switch, OE pin potential is pulled high, tri-state buffer output high impedance, at this time, watchdog detects that tri-state buffer output is high resistance, then does not reset, at this time, watchdog signal is disconnected, and MCU program burning or debugging can normally proceed, can see that the utility model can conveniently update system program and debug. BRIEF DESCRIPTION OF DRAWINGS

[0006] Figure 1 It is the principle diagram of the utility model;

[0007] Figure 2 It is the truth table of tri-state buffer. CONCRETE EMBODIMENT

[0008] As Figure 1 And Figure 2As shown, the utility model discloses watchdog 1, watchdog 1 is connected with the reset pin 2 of MCU. The WDI pin of watchdog 1 is connected with tri-state buffer 3, the A pin of tri-state buffer 3 is accessed external watchdog feeding dog signal WDI, the OE pin of tri-state buffer 3 is connected with dial switch 4, the other end of dial switch 4 is connected with the negative pole of DC power supply E, dial switch 4 and the negative pole of DC power supply E are grounded, the positive pole of DC power supply E is connected with the OE pin of tri-state buffer 3 through setting resistance R, and the grounding end of watchdog 1 is provided with switch button 5. Here resistance R is used as pull-up resistance. As Figure 2 As shown, when dial switch is not connected with GND, pull-up resistance can guarantee tri-state buffer OE pin level to be in " H", and corresponding logic output is high resistance state, and watchdog is disabled at this time. When dial switch is connected with GND, because GND is directly connected, so tri-state buffer OE is " L", and corresponding logic output is followed A, and watchdog is enabled at this time.

[0009] In the utility model, through the introduction of tri-state buffer, the external watchdog is flexibly applied in combination with the characteristics of watchdog itself, and then the system online debugging and program upgrading are facilitated.

[0010] The above only is the optimal solution embodiment of the utility model, and is not used to limit the utility model, and the various modifications or replacements of the utility model made by the person skilled in the art without departing from the essence and protection scope of the utility model should be in the protection scope of the utility model.

Claims

1. A new system external watchdog management circuit, comprising a watchdog (1), the watchdog (1) is connected with the reset pin (2) of MCU, characterized in that: The WDI pin of the watchdog (1) is connected with a tri-state buffer (3), the A pin of the tri-state buffer (3) is connected with an external watchdog feeding signal (WDI), the OE pin of the tri-state buffer (3) is connected with a DIP switch (4), the other end of the DIP switch (4) is connected with the negative pole of a DC power supply (E), the DIP switch (4) and the negative pole of the DC power supply (E) are connected with the ground, the positive pole of the DC power supply (E) is connected with the OE pin of the tri-state buffer (3) through a resistor (R), and the ground end of the watchdog (1) is provided with a switch button (5).

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