IO port level conversion circuit and electronic equipment

By using cascaded control of switching circuit design, the problem of level conversion of IO port with pull-down resistor output is solved, achieving a combination of stability and economy. This avoids the problem of the pull-down resistor affecting the circuit driving capability, enhances signal stability, and reduces costs.

CN223681055UActive Publication Date: 2025-12-16HUAQIN TECH CO LTD
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Patent Information

Application Number
CN202423177001.1
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-12-23
Publication Date
2025-12-16
Estimated Expiration
2034-12-23

AI Technical Summary

Technical Problem

Existing I/O port level conversion solutions cannot achieve stable level conversion when dealing with outputs with pull-down resistors. Furthermore, integrated IC chips are expensive, and single MOSFET circuit designs are not suitable, leading to economic and reliability issues in specific application scenarios.

Method used

The circuit design employs a switching circuit, including a first switching transistor and a second switching transistor. Stable level conversion is achieved through cascading control, avoiding the influence of pull-down resistors. Discrete component design is used to meet the single-channel level conversion requirements, thus avoiding increased costs.

Benefits of technology

Achieving stable level conversion with pull-down resistors at the output enhances signal stability, reduces costs, avoids the impact of pull-down resistors on circuit driving capability, and ensures circuit reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses an IO port level conversion circuit and an electronic device. The conversion circuit comprises an input port, an output port and a switching circuit. The input port is used for inputting a received first level signal into the switching circuit; the output port is provided with a pull-down resistor and outputs a second level signal based on the control of the switching circuit; the switching circuit comprises a first switching tube, a second switching tube and a conversion power supply; the first switch tube comprises a first control end, a first injection end and a first collection end; the second switch tube comprises a second control end, a second injection end and a second collection end; the first collection end and the second collection end are connected with the conversion power supply; the first control end is connected with the input port, and the first injection end is grounded; the second control end is connected with the first collection end, and the second injection end is connected with the output port. According to the conversion circuit, stable level conversion can still be realized under the condition that the output end is provided with an internal pull-down resistor, and the cost increase caused by multi-channel integration is also avoided.
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Description

TECHNICAL FIELD

[0001] The utility model relates to the technical field of level signal processing circuit, especially IO port level conversion circuit and electronic equipment. BACKGROUND

[0002] In modern electronic circuit design, IO port level conversion is the key link of realizing the transformation between different level signals. The current common level conversion scheme mainly includes the following two kinds:

[0003] 1. Use integrated IC chip to carry out level conversion. This kind of chip can usually integrate multiple signal conversion, such as two-way, four-way, etc., has the advantages of small size, high integration, is suitable for multi-channel application scene. However, when only single level conversion is needed, the cost of using integrated IC chip is relatively high, and it does not have economic advantage.

[0004] 2. The common single MOS tube circuit design is also a kind of commonly used level conversion method. This kind of design structure is simple, and the cost is low, and is suitable for single or small amount of level conversion demand. However, the single MOS tube circuit cannot effectively realize stable level conversion when processing the output end with internal pull-down resistance, which limits its application range.

[0005] In some specific circuit design, for example, the signal line of the scan head reset, enable of some manufacturers, usually integrates the pull-down resistance. When this kind of signal line carries out level conversion, the traditional integrated IC chip scheme is difficult to meet the economic requirement due to high cost, and the single MOS tube circuit design cannot realize reliable level conversion because it cannot process the output end with pull-down resistance. Therefore, the existing level conversion scheme has certain limitations in specific application scene. UTILITY MODEL CONTENTS

[0006] The utility model aims at solving above-mentioned technical problem and provides IO port level conversion circuit and electronic equipment that give consideration to cost benefit and effectively process the output end with pull-down resistance.

[0007] In order to realize the above-mentioned purpose, the utility model provides an IO port level conversion circuit, characterized by including input port, output port and switch circuit arranged between the input port and the output port;The input port is used to input the received first level signal to the switch circuit;The output port is provided with pull-down resistance, and the second level signal is outputted based on the control of the switch circuit;

[0008] The switch circuit includes first switch tube, second switch tube and conversion power supply;

[0009] The first switch tube comprises a first control end, a first injection end and a first collection end connected or disconnected based on the first control end; and the second switch tube comprises a second control end, a second injection end and a second collection end connected or disconnected based on the second control end.

[0010] The first collection end and the second collection end are connected with the conversion power supply.

[0011] The first control end is connected with the input port, and the first injection end is grounded.

[0012] The second control end is connected with the first collection end, and the second injection end is connected with the output port.

[0013] The first switch tube is used for controlling the working state of the second switch tube.

[0014] Preferably, when the first level signal received by the input port is high, the first switch tube is turned on, and the second switch tube is turned on; when the first level signal received by the input port is low, the first switch tube is turned off, and the second switch tube is turned off.

[0015] Preferably, the first switch tube is an NMOS tube, and the second switch tube is a PMOS tube.

[0016] Preferably, the first injection end is further connected with the first control end through a first resistor; and the second control end and the first collection end are connected with the second collection end through a second resistor.

[0017] Preferably, the input port is further provided with a first filter circuit connected in parallel with the first control end, and the second injection end is further provided with a second filter circuit connected in parallel with the output port.

[0018] The utility model further provides an electronic equipment, it includes control circuit, execution circuit and IO port level conversion circuit being arranged between the control circuit and the execution circuit;

[0019] The IO port level conversion circuit comprises an input port, an output port, and a switch circuit arranged between the input port and the output port.

[0020] The input port is connected with the control circuit to receive a first level signal of the control circuit.

[0021] The output port is connected with the execution circuit, and the execution circuit operates based on a second level signal output by the output port; and the output port is further provided with a pull-down resistor.

[0022] The switch circuit comprises a first switch tube, a second switch tube and a conversion power supply;

[0023] The first switch tube comprises a first control end and a first injection end and a first collection end connected or disconnected based on the first control end; the second switch tube comprises a second control end and a second injection end and a second collection end connected or disconnected based on the second control end;

[0024] The first collection end and the second collection end are connected with the conversion power supply;

[0025] The first control end is connected with the input port, and the first injection end is grounded;

[0026] The second control end is connected with the first collection end, and the second injection end is connected with the output port;

[0027] The first switch tube is used for controlling the working state of the second switch tube.

[0028] Preferably, when the first level signal received by the input port is a high level, the first switch tube is turned on, and the second switch tube is turned on; when the first level signal received by the input port is a low level, the first switch tube is turned off, and the second switch tube is turned off.

[0029] Preferably, the first switch tube is an NMOS tube, and the second switch tube is a PMOS tube.

[0030] Preferably, the first injection end is further connected with the first control end through a first resistor; and the second control end and the first collection end are connected with the second collection end through a second resistor.

[0031] Preferably, the input port is further provided with a first filter circuit connected in parallel with the first control end, and the second injection end is further provided with a second filter circuit connected in parallel with the output port.

[0032] Compared with the prior art, the IO port level conversion circuit provided by the above technical scheme of the utility model can control the on-off state of the second switch tube through the first switch tube, and then make the output port output the second level signal based on the first level signal, so that the circuit can still realize stable level conversion in the case that the output end has an internal pull-down resistor. The scheme avoids the problem of affecting the driving capacity of the circuit caused by the pull-down resistor through cascade control, and enhances the stability of the output signal. In addition, compared with the integrated IO conversion IC, the scheme adopts discrete component design, can meet the single-channel level conversion demand, and avoids the cost increase caused by multi-channel integration. BRIEF DESCRIPTION OF DRAWINGS

[0033] Figure 1The utility model discloses an electronic equipment's working principle diagram for the embodiment of the utility model.

[0034] Figure 2 The utility model discloses a circuit principle diagram of conversion circuit for one of the embodiments of the utility model.

[0035] Figure 3 The utility model discloses a circuit principle diagram of conversion circuit for another embodiment of the utility model. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical scheme and beneficial effect of the utility model clearer, the following will be described in detail in connection with the drawings.

[0037] The embodiment discloses an electronic equipment to solve the level conversion under the condition that the output IO port has internal pull-down resistance, and save cost. Figure 1 The electronic equipment includes a control circuit C1, an execution circuit C3 and an IO port level conversion circuit C2 arranged between the control circuit C1 and the execution circuit C3. The control circuit C1 outputs a first level signal, and outputs a second level signal to the execution circuit C3 through the conversion circuit C2, so that the execution circuit C3 performs corresponding actions according to the indication of the control circuit C1.

[0038] As shown in the figure, Figure 2 The IO port level conversion circuit C2 includes an input port DIN, an output port DOUT and a switch circuit arranged between the input port DIN and the output port DOUT.

[0039] The input port DIN is connected with the control circuit C1 to receive the first level signal of the control circuit C1.

[0040] The output port DOUT is connected with the execution circuit C3, and the execution circuit C3 works based on the second level signal output by the output port DOUT.

[0041] The switch circuit includes a first switch tube Q1, a second switch tube Q2 and a conversion power supply VCC.

[0042] The first switch tube Q1 includes a first control end G1 and a first injection end S1 and a first collection end D1 connected or disconnected based on the first control end G1. The second switch tube Q2 includes a second control end G2 and a second injection end S2 and a second collection end D2 connected or disconnected based on the second control end G2.

[0043] The first collection end D1 and the second collection end D2 are connected with the conversion power supply VCC.

[0044] The first control end G1 is connected with the input port DIN, and the first injection end S1 is grounded.

[0045] The second control end G2 is connected with the first collection end D1, and the second injection end S2 is connected with the output port DOUT.

[0046] The first switch tube Q1 is used for controlling the working state of the second switch tube Q2.

[0047] It is worth mentioning that the semiconductor switch tube includes three electrode ends, which are a control end, an injection end and a collection end. The control end is used for adjusting the conduction state of the switch tube, the injection end is responsible for the injection of carriers, and the collection end is used for the collection of carriers and the output of current.

[0048] In the embodiment, when the control circuit C1 needs to start the execution circuit C3, a first level signal is output to the conversion circuit C2. The first level signal controls the on-off state of the second switch tube Q2 through the first switch tube Q1, so that the output port DOUT outputs a second level signal, and the execution circuit C3 starts to work after receiving the second level signal. The IO port level conversion circuit C2 can still realize stable level conversion in the case that the output end has an internal pull-down resistor R0. The conversion circuit C2 avoids the problem of affecting the driving capability of the circuit caused by the pull-down resistor R0 through cascading control, and enhances the stability of the output signal.

[0049] In addition, compared with the integrated IO conversion IC, the scheme adopts a discrete component design, which can meet the single-channel level conversion demand and avoid the cost increase caused by multi-channel integration.

[0050] Furthermore, the cascading design logic of the first switch tube Q1 and the second switch tube Q2 is clear, which effectively isolates the level difference between the input signal and the output signal in cooperation with the conversion power supply VCC, avoids the interference problem caused by direct coupling, and ensures the reliability of the circuit.

[0051] On the other hand, when the first level signal received by the input port DIN is a high level, the first switch tube Q1 is turned on, and the second switch tube Q2 is turned on. When the first level signal received by the input port DIN is a low level, the first switch tube Q1 is turned off, and the second switch tube Q2 is turned off.

[0052] Specifically, taking the first level signal as 1.8V and the conversion power supply VCC as 3.3V as an example, when the second switch tube Q2 is turned on, the second level signal output to the output port DOUT by the second injection end S2 is 3.3V.

[0053] On the other hand, the first switch tube Q1 is an NMOS tube, and the second switch tube Q2 is a PMOS tube.

[0054] So, for the first switch tube Q1 and the second switch tube Q2, the first control end G1 and the second control end G2 are the gate, the first injection end S1 and the second injection end S2 are the source, and the first collection end D1 and the second collection end D2 are the drain.

[0055] Since the MOS tube is a voltage-driven switch tube, the first injection end S1 is also connected with the first control end G1 through the first resistor R1. The second control end G2 and the first collection end D1 are connected with the second collection end D2 through the second resistor R2. In addition, the input port DIN is also connected with the first control end D1 through the third resistor R3.

[0056] When the first level signal received by the input port DIN is high level, the first control end G1 and the first injection end S1 of the first switch tube Q1 are loaded with the first bias voltage through the first resistor R1. Under the drive of the first bias voltage, the first switch tube Q1 is turned on. After the first switch tube Q1 is turned on, the second bias voltage is loaded between the second control end G2 and the second collection end D2 of the second switch tube Q2 through the second resistor R2. Under the action of the second bias voltage, the second switch tube Q2 is turned on, so that the second level signal output by the output port DOUT is equal to the level state of the conversion voltage.

[0057] On the other hand, as Figure 3 The input port DIN is also provided with the first filter circuit L1 connected in parallel with the first control end G1, and the second injection end S2 is also provided with the second filter circuit L2 connected in parallel with the output port DOUT.

[0058] Through the first filter circuit L1, the interference signal in the input first level signal can be filtered out. Through the second filter circuit L2, the noise signal of the output second level signal can be filtered out. Thus, the stability of the conversion circuit C2 is ensured.

[0059] The above only discloses the preferred embodiments of the utility model, of course, cannot with this to limit the utility model right scope, therefore, the equivalent change made by the utility model application patent range still belongs to the range covered by the utility model.

Claims

1. An IO port level conversion circuit, characterized by, The input port is used for inputting a received first level signal into the switch circuit; The output port is provided with a pull-down resistor and outputs a second level signal based on the control of the switch circuit; The first switch tube includes a first control end and a first injection end and a first collection end connected or disconnected based on the first control end; and the second switch tube includes a second control end and a second injection end and a second collection end connected or disconnected based on the second control end; The first control end is connected with the input port, and the first injection end is grounded; The second control end is connected with the first collection end, and the second injection end is connected with the output port; The first switch tube is used for controlling the working state of the second switch tube. When the first level signal received by the input port is high, the first switch tube is turned on, and the second switch tube is turned on; when the first level signal received by the input port is low, the first switch tube is turned off, and the second switch tube is turned off. The first injection end is further connected with the first control end through a first resistor; and the second control end and the first collection end are connected with the second collection end through a second resistor. The input port is further provided with a first filter circuit connected in parallel with the first control end, and the second injection end is further provided with a second filter circuit connected in parallel with the output port.

2. The IO pad level shifting circuit of claim 1, wherein, The IO port level conversion circuit includes an input port, an output port, and a switch circuit arranged between the input port and the output port; 3. The IO pad level shifting circuit of claim 1, wherein, The input port is connected with the control circuit to receive a first level signal of the control circuit; 4. The IO pad level shifting circuit of claim 3, wherein, The output port is connected with the execution circuit, the execution circuit works based on a second level signal output by the output port, and the output port is further provided with a pull-down resistor; 5. The IO pad level shifting circuit of claim 1, wherein, The first switch tube includes a first control end and a first injection end and a first collection end connected or disconnected based on the first control end; and the second switch tube includes a second control end and a second injection end and a second collection end connected or disconnected based on the second control end; 6. An electronic device, comprising: The first control end is connected with the input port, and the first injection end is grounded; The second control end is connected with the first collection end, and the second injection end is connected with the output port; The first switch tube is used for controlling the working state of the second switch tube. ​ ​ ​ ​ ​ ​ ​ 7. The electronic device of claim 6, wherein, When the first level signal received by the input port is high, the first switch tube is turned on, and the second switch tube is turned on; when the first level signal received by the input port is low, the first switch tube is turned off, and the second switch tube is turned off.

8. The electronic device of claim 6, wherein, The first switch tube is an NMOS tube, and the second switch tube is a PMOS tube.

9. The electronic device of claim 8, wherein, The first injection end is further connected with the first control end through a first resistor; and the second control end and the first collection end are connected with the second collection end through a second resistor.

10. The electronic device of claim 6, wherein, The input port is further provided with a first filter circuit connected in parallel with the first control end, and the second injection end is further provided with a second filter circuit connected in parallel with the output port.