AC charging pile CP signal generation circuit

Abstract

The utility model discloses an AC charging pile CP signal generating circuit, comprising a level conversion module and a push-pull output module, the level conversion module is used for converting a PWM signal output by an IO port of an MCU into a + / -12V CP signal, and the push-pull output module is connected to the level conversion module and is used for driving high and low level switching of the CP signal. The level conversion module comprises a resistor R1, the left end of the resistor R1 is connected with PWM signals output by an IO port of the MCU, the right end of the resistor R1 is connected with base electrodes of triodes Q2 and Q3, emitting electrodes of the triodes Q2 and Q3 are connected and connected with the lower end of a resistor R2 and the upper end of a resistor R3, the lower end of the resistor R2 is connected with the upper end of the resistor R3, the upper end of the resistor R2 is connected with a + 3.3 V power source, the lower end of the resistor R3 is grounded, and the lower end of the resistor R3 is grounded. The circuit provided by the utility model is simple, and the cost is lower.

Description

TECHNICAL FIELD

[0001] The utility model belongs to the technical field of charging pile, specifically relates to an alternating current charging pile CP signal generation circuit. BACKGROUND

[0002] At present, the alternating current charging pile CP signal generation circuit mainly has two kinds, one is through operational amplifier to build comparator or directly uses the comparator to realize the level conversion to produce the CP signal, when the IO port output of MCU is PWM, the high level is converted into the +12V of CP signal, and the low level is converted into the -12V of CP signal, this method is good to realize the generation of IO port PWM signal to CP signal, but needs to use operational amplifier or comparator, and the operational amplifier or comparator needs to satisfy the power supply of ±12V and rail-to-rail output, and because the requirement of CP signal to the rising and falling time is only several microseconds, so the operational amplifier or comparator also needs to satisfy high speed, and the operational amplifier or comparator satisfying the above requirements is high in cost and difficult to select; the other is through the light coupling to realize, and the IO port output of MCU is PWM signal, and the light coupling is used to realize the conversion of level and produce the CP signal, and the requirement of CP signal to the rising and falling time is only several microseconds, and the light coupling is high in requirement, and the light coupling is susceptible to temperature influence, and the light coupling satisfying the requirement is often high in cost. SUMMARY

[0003] The utility model discloses a kind of alternating current charging pile CP signal generation circuits, to solve the problems raised in the above background technology.

[0004] To achieve the above object, the utility model provides the following technical scheme: a kind of alternating current charging pile CP signal generation circuit, including level conversion module, push-pull output module, the level conversion module is used to convert the PWM signal of IO port output of MCU into ±12V CP signal, the push-pull output module is connected to the level conversion module for driving the high-low level switching of CP signal, the level conversion module includes resistance R1, the left end of resistance R1 is connected the PWM signal of IO port output of MCU, the right end of resistance R1 is connected the base of triode Q2, Q3, the emitter of triode Q2, Q3 is connected and is connected at the lower end of resistance R2, the upper end of resistance R3, the lower end of resistance R2, resistance R3 upper end is connected, the upper end of resistance R2 is connected +3.3V power supply, the lower end of resistance R3 is grounded.

[0005] Preferably, the push-pull output module comprises resistors R4, R5, R6, R7, R8, capacitor C1, transistors Q1, Q4, the lower end of the resistor R4 is connected to the collector of the transistor Q2 and the base of the transistor Q1 respectively, the upper end of the resistor R4 and the emitter of the transistor Q1 are connected to +12V power supply, the upper end of the resistor R8 is connected to the collector of the transistor Q3 and the base of the transistor Q4, the lower end of the resistor R8 and the emitter of the transistor Q4 are connected to -12V power supply, the collector of the transistor Q1 is connected to the capacitor C1 and the upper end of the resistor R5, the collector of the transistor Q4 is connected to the capacitor C1 and the lower end of the resistor R7, the lower end of the resistor R5 and the upper end of the resistor R7 are connected, the lower end of the resistor R5 and the upper end of the resistor R7 are connected to the left side of the resistor R6, and the right side of the resistor R6 is connected to the CP signal.

[0006] Preferably, the high level of the PWM signal output by the IO port of the MCU is +3.3V, and the low level is 0V.

[0007] When the PWM is high, the transistor Q2 is turned on, the base voltage of the transistor Q1 is pulled down to 1.65V, the transistor Q1 is turned on, and the push-pull output module outputs +12V high level.

[0008] When the PWM is low, the transistor Q3 is turned on, the base voltage of the transistor Q4 is pulled up to 1.65V, the transistor Q4 is turned on, and the push-pull output module outputs -12V low level.

[0009] Preferably, the resistors R2 and R3 are voltage dividing resistors and have equal resistance values.

[0010] The technical effects and advantages of the utility model are as follows:

[0011] The utility model features level conversion, and the existence of -12V low level makes the level conversion complicated, and after continuous simplification and repeated verification, the level conversion circuit of the utility model is finally obtained. The circuit is clear and simple, the device selection is wide compared with the scheme of the operational amplifier and the optocoupler, all the transistors, resistors and capacitors only need to be ordinary, the circuit is simple, the cost is also lower, and the utility model provides a remarkable cost advantage for the design of the alternating current charging pile and related products. DRAWINGS

[0012] Figure 1 The utility model is a schematic diagram. CONCRETE IMPLEMENTATION

[0013] The technical solutions in the embodiments of the utility model will be clearly and completely described below with reference to the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the utility model.

[0014] The utility model provides a kind of AC charging pile CP signal generation circuit as Figure 1 As shown in a kind of AC charging pile CP signal generation circuit, including level conversion module, push-pull output module, level conversion module is used to convert the PWM signal of the IO port output of MCU into ±12V CP signal, push-pull output module is connected to the level conversion module for driving the high-low level switching of CP signal, level conversion module includes resistance R1, resistance R1 left end connects the PWM signal of the IO port output of MCU, resistance R1 right end connects the base of triode Q2, Q3, the emitter of triode Q2, Q3 is connected and is connected with resistance R2 lower end, R3 upper end, resistance R2 lower end, resistance R3 upper end is connected, resistance R2 upper end connects +3.3V power supply, resistance R3 lower end is grounded.

[0015] Wherein, Q2, Q3 are NPN and PNP triode respectively, Q2 and Q3 are converted into the ±12V level required by the push-pull circuit by complementary conduction logic, 3.3V PWM signal of MCU, realize the accurate switching of high-low level.

[0016] In some specific embodiments of the utility model, push-pull output module includes resistance R4, R5, R6, R7, R8, capacitor C1, triode Q1, Q4, resistance R4 lower end is connected triode Q2 collector, triode Q1 base respectively, resistance R4 upper end and triode Q1 emitter are all connected +12V power supply, resistance R8 upper end is connected triode Q3 collector and triode Q4 base, resistance R8 lower end and triode Q4 emitter are all connected-12V power supply, triode Q1 collector connects capacitor C1, resistance R5 upper end, the triode Q4 collector connects capacitor C1, resistance R7 lower end, resistance R5 lower end, resistance R7 upper end is connected, resistance R5 lower end, resistance R7 upper end is connected resistance R6 left side, the resistance R6 right side connects CP signal.

[0017] In some specific embodiments of the utility model, the PWM signal high level of the IO port output of MCU is +3.3V, and the low level is 0V;

[0018] When PWM is high level, triode Q2 is turned on, the base voltage of triode Q1 is pulled down to 1.65V, triode Q1 is turned on, and push-pull output module outputs +12V high level;

[0019] When the PWM is low, the triode Q3 is turned on, the base voltage of the triode Q4 is pulled up to 1.65V, the Q4 is turned on, and the push-pull output module outputs -12V low level.

[0020] In some embodiments of the utility model, the resistance R2, R3 is the voltage dividing resistance, the resistance value is equal, and the base of triode Q2, Q3 is connected, and the symmetry control of level conversion is realized.

[0021] The working principle is that: the level conversion is composed of resistance R1, R2, R3, triode Q2, Q3, the resistance R1 is a current limiting resistance, the size of IO port output current is limited to protect the IO port, Q2, Q3 are NPN and PNP triodes respectively, and the conversion of level is realized by turning on and turning off, the resistance R2, R3 is the voltage dividing resistance, the resistance value is equal, and +3.3V is divided into 1.65V to create conditions for the turning on and turning off of Q2, Q3. The push-pull output is composed of resistance R4, R5, R6, R7, R8, capacitor C1, triode Q1, Q4, PNP triode Q1 is the upper tube of push-pull output, NPN triode Q4 is the lower tube of push-pull output, the pull-up resistance R4 makes Q1 in the default off state, the pull-down resistance R8 makes Q4 in the default off state, the resistance R5, R7 is a current limiting resistance, the size of push-pull output current is limited to protect Q1, Q4 from being damaged due to large current, the capacitor C1 is a filter capacitor, the burr formed in the switching moment is reduced, and the output waveform quality is improved, and the resistance R6 is a 1KΩ matching resistance of CP signal.

[0022] The IO port output of MCU is the PWM signal of +3.3V high level and 0V low level, Q2 is turned on when the PWM is high, the base voltage of Q1 is pulled down from +12V to 1.65V to make Q1 turned on, and the push-pull circuit outputs +12V high level, Q3 is turned on when the PWM is low, the base voltage of Q4 is pulled up from -12V to 1.65V to make Q4 turned on, and the push-pull circuit outputs -12V low level.

[0023] Finally, it should be pointed out that: the above-mentioned only for preferred embodiments of the utility model, and does not limit the utility model, although the utility model has been described in detail with reference to the foregoing embodiments, for the person skilled in the art, it still can modify the technical scheme recorded in the foregoing embodiments, or equivalent replacement to part of technical features, any modification, equivalent replacement, improvement etc. made within the spirit and principle of the utility model, should be included in the protection scope of the utility model.

Claims

1. An alternating current (AC) charging pile (CP) signal generation circuit, comprising a level conversion module and a push-pull output module, characterized in that: The level conversion module is used for converting the PWM signal output by the IO port of the MCU into a CP signal of ±12V, the push-pull output module is connected to the level conversion module and is used for driving the high and low level switching of the CP signal, the level conversion module comprises a resistor R1, a left end of the resistor R1 is connected to the PWM signal output by the IO port of the MCU, base electrodes of transistors Q2 and Q3 are connected to a right end of the resistor R1, emitter electrodes of the transistors Q2 and Q3 are connected to a lower end of a resistor R2 and an upper end of a resistor R3, the lower end of the resistor R2 and the upper end of the resistor R3 are connected, an upper end of the resistor R2 is connected to a +3.3V power supply, and a lower end of the resistor R3 is grounded.

2. The AC charging pile (CP) signal generation circuit according to claim 1, characterized in that: The push-pull output module comprises resistors R4, R5, R6, R7 and R8, a capacitor C1, transistors Q1 and Q4, a lower end of the resistor R4 is connected to a collector electrode of the transistor Q2 and a base electrode of the transistor Q1 respectively, the upper end of the resistor R4 and an emitter electrode of the transistor Q1 are connected to a +12V power supply, an upper end of the resistor R8 is connected to a collector electrode of the transistor Q3 and a base electrode of the transistor Q4, a lower end of the resistor R8 and an emitter electrode of the transistor Q4 are connected to a -12V power supply, the collector electrode of the transistor Q1 is connected to the capacitor C1 and an upper end of the resistor R5, the collector electrode of the transistor Q4 is connected to the capacitor C1 and a lower end of the resistor R7, a lower end of the resistor R5 and an upper end of the resistor R7 are connected, the lower end of the resistor R5 and the upper end of the resistor R7 are connected to a left side of the resistor R6, and a right side of the resistor R6 is connected to the CP signal.

3. The AC charging pile (CP) signal generation circuit according to claim 2, characterized in that: The PWM signal output by the IO port of the MCU has a high level of +3.3V and a low level of 0V. When the PWM is high, the transistor Q2 is turned on, the base electrode voltage of the transistor Q1 is pulled down to 1.65V, the transistor Q1 is turned on, and the push-pull output module outputs a +12V high level. When the PWM is low, the transistor Q3 is turned on, the base electrode voltage of the transistor Q4 is pulled up to 1.65V, the transistor Q4 is turned on, and the push-pull output module outputs a -12V low level.

4. The AC charging pile (CP) signal generation circuit according to claim 3, characterized in that: The resistors R2 and R3 are voltage dividing resistors and have equal resistance values.

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