Circuit board for surge circuit test of power device
By designing pinholes and mounting holes on the circuit board and utilizing the metal layer to conduct pins and connecting wires, the connection difficulties and poor contact problems in surge testing of L6 packaged power devices are solved, simplifying operation and reducing the risk of module damage.
Patent Information
- Application Number
- CN202423216156.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-25
- Publication Date
- 2025-12-23
- Estimated Expiration
- 2034-12-25
AI Technical Summary
L6 packaged power devices suffer from connection difficulties and poor contact during surge testing, leading to module damage, a problem that is difficult to solve effectively with existing technologies.
Design a circuit board that uses pinholes and mounting holes on a copper-clad board to conduct pins and connecting wires through a metal layer, enabling uniform current flow through the pins and avoiding problems such as solder buildup and poor pin contact.
The simplified operation process reduced the risk of module damage and ensured the reliability and safety of the test.
Smart Images
Figure CN223711771U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to power device test technical field especially relates to a circuit board for power device surge circuit test. BACKGROUND
[0002] At present, there is a general package - L6 in photovoltaic energy storage industry, and the model passes current through several Pin needles when working, and the T-shaped topology circuit of L6 package is as shown in the drawing, which makes the model encounter many difficulties when testing surge current. The traditional surge connection method needs to install the power line on the power end through screws, and the L6 package cannot be realized because of the multiple Pin needles. At present, there are two methods for surge testing of L6 package. One is to connect Pin needle by welding, which increases the difficulty of subsequent cover analysis. The other is to connect Pin needle through needle sleeve, and to connect by welding on the needle sleeve, which can facilitate subsequent cover analysis. However, if the contact between the needle sleeve and the Pin needle is poor, electric arc will occur, which will cause damage to the module. Figure 1 SUMMARY The utility model provides a kind of circuit board for power device surge circuit test, to solve the difficulty of L6 package surge testing in prior art.
[0003] Based on the above content, the utility model provides a kind of circuit board for power device surge circuit test, to solve the difficulty of L6 package surge testing in prior art.
[0004] A kind of circuit board for power device surge circuit test, the circuit board is provided with needle hole for the Pin needle of power device insertion, and is provided with installation hole for fixing the connecting line of outside;
[0005] Circuit board has copper-clad plate, copper-clad plate has metal layer, Pin needle inserted needle hole and connecting line fixed in installation hole are conducted through metal layer.
[0006] Further, the circuit board includes a first region, the first region has a first metal layer, a first needle hole for inserting a first Pin needle, and a first installation hole for fixing a positive connecting line;
[0007] The first Pin needle inserted into the first needle hole and the connecting line fixed in the first installation hole are conducted through the first metal layer;
[0008] The arrangement form of the first needle hole corresponds to the arrangement relationship of the first Pin needle on the power device.
[0009] The first Pin needle is a positive electrode pin.
[0010] Further, the circuit board includes a second region, the second region has a second metal layer, a second needle hole for inserting a second Pin needle, and a second installation hole for fixing a negative connecting line;
[0011] The second Pin needle inserted into the second pin hole and the connecting wire fixed on the second mounting hole are conducted through the second metal layer;
[0012] The arrangement form of the second pin hole corresponds to the arrangement relationship of the second Pin needle on the power device.
[0013] The second Pin needle is a negative pin.
[0014] Further, the number of the first pin holes corresponds to the number of the positive Pin needles on the power device.
[0015] Further, the number of the second pin holes corresponds to the number of the negative Pin needles on the power device.
[0016] Further, the power device adopts a L6 package structure of a T-type topology circuit.
[0017] The number of the first Pin needles is 9, and the number of the second Pin needles is 11.
[0018] Further, the first region is an upper region of the circuit board, and the second region is a lower region of the circuit board.
[0019] Further, in the first region, the first pin hole is on the left side of the first mounting hole.
[0020] Further, in the second region, the second pin hole is on the left side of the second mounting hole.
[0021] Further, the first metal layer is on the first copper-clad plate, and the second metal layer is on the second copper-clad plate.
[0022] The beneficial technical effects of the utility model lie in that the PCB connects the Pin needle, so that the current flows through each Pin needle evenly through the copper-clad plate, the problems such as difficult analysis of the open cover of the surfacing material connecting Pin needle, easy contact failure between the needle sleeve and the Pin needle are solved, and the operation is simple, and the module is not easy to be damaged. BRIEF DESCRIPTION OF DRAWINGS
[0023] Figure 1 It is a T-type topology circuit of a general L6 package in the prior art.
[0024] Figure 2 It is a structural schematic view of the circuit board for the surge circuit test of the power device.
[0025] Figure 3 It is a circuit schematic view of the circuit board for the surge circuit test of the power device. DETAILED DESCRIPTION
[0026] The technical solutions in the embodiments of the present application will be clearly and completely described with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of the present application.
[0027] It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other without conflicts.
[0028] The present application will be further described below in combination with the drawings and specific embodiments, but is not limited to the present application.
[0029] Referring to Figure 2 The present application provides a circuit board for surge circuit test of a power device, the circuit board is provided with a pin hole for pin insertion of the power device, and is provided with a mounting hole for fixing an external connecting line;
[0030] The circuit board is provided with a copper clad plate, the copper clad plate is provided with a metal layer, the pin inserted into the pin hole and the connecting line fixed on the mounting hole are conducted through the metal layer.
[0031] Specifically, the external connecting line, for example, a power line for testing surge of the power device, is installed through the mounting hole of the circuit board by a screw.
[0032] Specifically, the copper clad plate comprises a substrate and a metal layer on the substrate, and the copper clad plate is provided with the pin hole and the mounting hole.
[0033] Specifically, the metal layer is made of copper.
[0034] The pin is connected through the PCB, so that the current uniformly flows through each pin through the copper clad plate, the problems such as difficult analysis of the pin connected by welding, poor contact between the pin sleeve and the pin, and the like are solved, the operation is simple, and the module is not easy to be damaged.
[0035] Further, the circuit board comprises a first region, the first region is provided with a first metal layer, a first pin hole (m1) for inserting a first pin, and a first mounting hole (m2) for fixing a positive connecting line;
[0036] The first pin inserted into the first pin hole (m1) and the connecting line fixed on the first mounting hole (m2) are conducted through the first metal layer;
[0037] The arrangement form of the first pin hole (m1) corresponds to the arrangement relationship of the first pin on the power device.
[0038] The first pin is a positive pin.
[0039] Further, the circuit board comprises a second region, the second region having a second metal layer, a second pin hole (m3) for inserting a second pin, and a second mounting hole (m4) for fixing a negative connection line;
[0040] The second pin inserted into the second pin hole (m3) and the connection line fixed in the second mounting hole (m4) are conducted through the second metal layer;
[0041] The arrangement of the second pin hole (m3) corresponds to the arrangement of the second pin on the power device.
[0042] The second pin is a negative pin.
[0043] Further, the number of the first pin hole (m1) corresponds to the number of the positive pin on the power device.
[0044] Further, the number of the second pin hole (m3) corresponds to the number of the negative pin on the power device.
[0045] Further, the power device adopts a L6 package structure of a T-type topology circuit.
[0046] The number of the first pin is 9, and the number of the second pin is 11.
[0047] For example, as shown in Figure 1 The first path of the T-type topology circuit in the prior art comprises a first triode (T3) and a first diode (D3-1) in parallel, the emitter of the first triode (T3) is connected to the anode of the first diode (D3-1), and the collector of the first triode (T3) is connected to the cathode of the first diode (D3-1). The collector of the first triode (T3) is connected to 8 pins (16-22, 23 marked). The base of the first triode (T3) is connected to a pin (24 marked).
[0048] The collector of the first triode (T3) is also connected to the cathode of a second diode (D2-2) and a pin (25 marked), the anode of the second diode (D2-2) is connected to the collector of a second triode (T4a) and the collector of a third triode (T4b) respectively. The third triode (T4b) and a third diode (D4) are in parallel.
[0049] The emitter of the third triode (T4b) is connected to the anode of the third diode (D4), and the collector of the third triode (T4b) is also connected to the cathode of the third diode (D4).
[0050] The emitter of the third triode (T4b) is also connected to the emitter of the second triode (T4a).
[0051] The base of the third transistor (T4b) is connected to a pin (13) labeled.
[0052] The base of the second transistor (T4a) is connected to a pin (14) labeled.
[0053] The emitter of the second transistor (T4a) is connected to 13 pins (15, 1-11, 12 labeled).
[0054] The anode of the second diode (D2-2) is also connected to 9 pins (26-34 labeled).
[0055] The second path of the T-type topology in the prior art comprises a fourth diode (D3-2), a fifth diode (D2-1), a sixth diode (D1), a fourth transistor (T2), a fifth transistor (T1a), and a sixth transistor (T1b).
[0056] The anode of the fourth diode (D3-2) is connected to 6 pins (35-40 labeled), and the cathode of the fourth diode (D3-2) is connected to the collector of the fourth transistor (T2).
[0057] The fourth transistor (T2) is connected in parallel with the fifth diode (D2-1), the collector of the fourth transistor (T2) is connected to the cathode of the fifth diode (D2-1), the emitter of the fourth transistor (T2) is connected to the anode of the fifth diode (D2-1), and the base of the fourth transistor (T2) is connected to a pin (68 labeled).
[0058] The cathode of the fourth diode (D3-2) is also connected to a pin (53 labeled).
[0059] The emitter of the fourth transistor (T2) is also connected to a pin (69 labeled).
[0060] The emitter of the fourth transistor (T2) is also connected to the emitter of the fifth transistor (T1a) and the emitter of the sixth transistor (T1b).
[0061] The emitter of the fourth transistor (T2) is also connected to 10 pins (58-67 labeled).
[0062] The emitter of the fourth transistor (T2) is also connected to the anode of the second diode (D2-2).
[0063] The collector of the fifth transistor (T1a) is connected to the collector of the sixth transistor (T1b), and is connected to 10 pins (41-50).
[0064] The base of the fifth transistor (T1a) is also connected to a pin (56 labeled), and the emitter of the fifth transistor (T1a) is also connected to a pin (57 labeled).
[0065] The base of the sixth transistor (T1b) is also connected to a pin (55) and the emitter of the sixth transistor (T1b) is also connected to a pin (54).
[0066] The sixth transistor (T1b) and the sixth diode (D1) are connected in parallel, the collector of the sixth transistor (T1b) is connected to the cathode of the sixth diode (D1), and the emitter of the sixth transistor (T1b) is connected to the anode of the sixth diode (D1).
[0067] Specifically, referring to Figure 3 , the first pin refers to Figure 1 the nine pins represented by 26-34, and the second pin refers to Figure 1 the eleven pins represented by 1-11.
[0068] Specifically, the first pin holes corresponding to the nine first pins are as shown in Figure 2 the upper part of the area, which are three in the first row, two in the second row and the third row, and are aligned with the last two first pins in the first row.
[0069] Specifically, the eleven second pin holes refer to Figure 2 the pin holes in the right part of the lower part of the area, including three horizontally arranged pin holes, five vertically arranged pin holes, and three other vertically arranged pin holes.
[0070] Figure 3 The U2 end in Figure 3 is connected to the second mounting hole through a power line, Figure 3 the U3 end in is connected to the first mounting hole through a power line to apply current to the device for surge current testing. Figure 2 and P- represents the negative electrode, P+ represents the positive electrode, and U1 represents the circuit board. Further, the first area is the upper part of the circuit board, and the second area is the lower part of the circuit board.
[0071] Specifically, in Figure 3 , the short circuit of T4ae and T4ag represents Figure 2 the short circuit of G1 in Figure 2 , which realizes the short circuit between the pin (14) connected to the base of the second transistor (T4a) and the pin (15) connected to the emitter. Figure 2 In other words, the two pins (14) and (15) are inserted into the two pin holes of the G1 short circuit on the circuit. Figure 2 Figure 2 Specifically, in
[0072] Specifically, in Figure 3In the middle, shorting T4be and T4bg represents Figure 2 The pin in the middle is shorted by G2, which connects to the base of the third transistor (T4b). Figure 2 (marked in 13) and the pin connected to the emitter ( Figure 2 Short the pins (marked 12) together. Figure 2 (13 marked in the middle) and Pin ( Figure 2 (Note 12) These two pins are inserted into the two pin holes shorted by G2 on the circuit.
[0073] Pin ( Figure 2 (14 marked in the middle) and Pin ( Figure 2 Short-circuit between pins 15 and 15 (marked in the middle), Pin ( Figure 2 (13 marked in the middle) and Pin ( Figure 2 A short circuit is used between (marked 12 in the middle) to protect the test.
[0074] Furthermore, in the first region, the first pinhole (m1) is to the left of the first mounting hole (m2).
[0075] Furthermore, in the second region, the second pinhole (m3) is to the left of the second mounting hole (m4).
[0076] Furthermore, a first metal layer is on the first copper-clad laminate, and a second metal layer is on the second copper-clad laminate.
[0077] The above are merely preferred embodiments of the present utility model and are not intended to limit the implementation methods and protection scope of the present utility model. Those skilled in the art should realize that any equivalent substitutions and obvious changes made based on the description and illustrations of the present utility model should be included within the protection scope of the present utility model.
Claims
1. A circuit board for testing surge circuits of power devices, characterized in that, The circuit board has pin holes for the pins of the power device to be inserted, and mounting holes for fixing external connection wires. The circuit board has a copper-clad laminate with a metal layer, and the pin inserted into the pin hole and the connecting wire fixed on the mounting hole are connected through the metal layer.
2. The circuit board for surge circuit testing of power devices as described in claim 1, characterized in that, The circuit board includes a first region, the first region having a first metal layer, a first pin hole for inserting a first pin, and a first mounting hole for fixing a positive terminal connection wire. The first pin inserted into the first pin hole and the connecting wire fixed on the first mounting hole are connected through the first metal layer; The arrangement of the first pinhole corresponds to the arrangement of the first pin on the power device; The first pin is the positive pin.
3. The circuit board for surge circuit testing of power devices as described in claim 2, characterized in that, The circuit board includes a second region, which has a second metal layer, a second pin hole for inserting a second pin, and a second mounting hole for fixing a negative terminal connection wire. The second pin inserted into the second pin hole and the connecting wire fixed on the second mounting hole are connected through the second metal layer; The arrangement of the second pinhole corresponds to the arrangement of the second pin on the power device; The second pin is the negative terminal.
4. The circuit board for surge circuit testing of power devices as described in claim 3, characterized in that, The number of the first pinholes corresponds to the number of positive pins on the power device.
5. A circuit board for surge circuit testing of power devices as described in claim 3, characterized in that, The number of the second pinholes corresponds to the number of negative pins on the power device.
6. The circuit board for surge circuit testing of power devices as described in claim 3, characterized in that, The power device adopts an L6 package structure with a T-type topology circuit; The number of the first pin is 9, and the number of the second pin is 11.
7. The circuit board for surge circuit testing of power devices as described in claim 3, characterized in that, The first region is the upper region of the circuit board, and the second region is the lower region of the circuit board.
8. The circuit board for surge circuit testing of power devices as described in claim 7, characterized in that, In the first region, the first pinhole is located to the left of the first mounting hole.
9. A circuit board for surge circuit testing of power devices as described in claim 7, characterized in that, In the second region, the second pinhole is located to the left of the second mounting hole.
10. A circuit board for power device surge circuit testing as described in claim 7, characterized in that, The first metal layer is on the first copper-clad laminate, and the second metal layer is on the second copper-clad laminate.