Array substrate and display panel

Abstract

The utility model discloses an array substrate and a display panel. The array substrate comprises: a substrate; the driving circuit layer is arranged on one side of the substrate, and the driving circuit layer comprises a plurality of pixel driving circuits and a plurality of touch wires; the first insulating layer is arranged on one side, far away from the substrate, of the driving circuit layer, and a plurality of holes are formed in the first insulating layer; the touch electrode layer is arranged on one side, far away from the substrate, of the first insulating layer and comprises a plurality of common electrode blocks; the switching layer is arranged on one side, far away from the substrate, of the touch electrode layer; the switching layer comprises a plurality of touch control wire switching parts and a plurality of pixel electrodes, the touch control wire switching parts are in contact with the touch control wires and are electrically connected with the common electrode blocks, and the pixel electrodes are in contact with the pixel driving circuit; wherein the touch control wire switching parts and the pixel electrodes are located at the bottoms of the different open holes. According to the array substrate, the yield of the array substrate can be improved.

Description

TECHNICAL FIELD

[0001] The utility model relates to display technical field especially relates to an array substrate and display panel. BACKGROUND

[0002] With the development of display technology, the application of array substrate is more and more extensive, and the requirement of array substrate is higher and higher.

[0003] However, the array substrate in the related art has the problem of low yield, which limits the further application of the array substrate. For example, for the array substrate in which the common electrode block and the touch trace are connected to realize the touch function through the adapter layer, the common electrode block and the touch trace are located in different film layers. The common electrode block is located on the insulating layer, and the adapter layer and the touch trace are located in the opening corresponding to the insulating layer. In addition, there is a pixel electrode in the same layer as the adapter layer in the opening corresponding to the insulating layer. The pixel electrode and the adapter layer need to be insulated, and during manufacturing, photoresist needs to be coated on the conductive material, and then etching is performed to insulate the pixel electrode and the insulating line. However, since the photoresist is located in the opening corresponding to the insulating layer, the photoresist flows back during coating, so that the photoresist on the adapter layer in the opening is thicker, and the conductive material cannot be completely removed during etching, causing short circuit between the adapter layer and the pixel electrode. Therefore, the yield of the array substrate is low. SUMMARY

[0004] The utility model provides a kind of array substrate and display panel to improve the yield of array substrate.

[0005] According to an aspect of the utility model, an array substrate is provided, which includes:

[0006] a substrate;

[0007] a drive circuit layer disposed on one side of the substrate, the drive circuit layer including a plurality of pixel drive circuits and a plurality of touch traces;

[0008] a first insulating layer disposed on a side of the drive circuit layer away from the substrate, the first insulating layer having a plurality of openings;

[0009] a touch electrode layer disposed on a side of the first insulating layer away from the substrate, including a plurality of common electrode blocks;

[0010] an adapter layer disposed on a side of the touch electrode layer away from the substrate; the adapter layer includes a plurality of touch trace adapter portions and a plurality of pixel electrodes, the touch trace adapter portions being in contact with the touch traces and electrically connected to the common electrode blocks, and the pixel electrodes being in contact with the pixel drive circuits; wherein the touch trace adapter portions and the pixel electrodes are located at the bottom of different openings.

[0011] Optionally, the first insulating layer comprises a plurality of first openings and a plurality of second openings; the touch trace adapter is located at the bottom of the first opening, and the pixel electrode is located at the bottom of the second opening.

[0012] The plurality of openings comprises a plurality of opening pairs, each of the opening pairs comprises an adjacent first opening and an adjacent second opening; in the corresponding common electrode block and the pixel driving circuit of the opening pair, the common electrode block is located at the side of the first opening away from the second opening; the pixel driving circuit is located at the side of the second opening away from the first opening.

[0013] Optionally, the first insulating layer comprises a barrier wall between the first opening and the second opening in the opening pair;

[0014] The vertical distance between the side of the barrier wall away from the substrate and the substrate is less than or equal to the vertical distance between the side of other parts of the first insulating layer away from the substrate and the substrate.

[0015] Optionally, along the arrangement direction of the first opening and the second opening in the opening pair, the size of the barrier wall is less than or equal to 7.5 microns.

[0016] Optionally, the adapter layer further comprises a connection lead, one end of the connection lead is electrically connected with the common electrode, and the other end of the connection lead is electrically connected with the corresponding touch trace adapter.

[0017] Optionally, the adapter layer is a transparent conductive layer.

[0018] Optionally, the first insulating layer is a planarization layer.

[0019] Optionally, the pixel driving circuit comprises a transistor; the driving circuit layer comprises:

[0020] A first metal layer is arranged on one side of the substrate, and is used for forming a gate of the transistor;

[0021] A gate insulating layer covers the first metal layer;

[0022] An active layer is arranged on the side of the gate insulating layer away from the substrate;

[0023] A semiconductor layer is arranged on the side of the active layer away from the substrate;

[0024] A second metal layer is arranged on the side of the semiconductor layer away from the substrate, and is used for forming a source and a drain of the transistor and the touch trace;

[0025] A second insulating layer covers the second metal layer;

[0026] The first insulating layer is located on a side of the second insulating layer away from the substrate.

[0027] Optionally, the array substrate further comprises a third insulating layer between the transfer layer and the touch electrode layer.

[0028] According to another aspect of the present application, a display panel is provided, which comprises the array substrate as described above.

[0029] The array substrate comprises: a substrate; a drive circuit layer, which is arranged on one side of the substrate, and comprises a plurality of pixel drive circuits and a plurality of touch wires; a first insulating layer, which is arranged on a side of the drive circuit layer away from the substrate, and is provided with a plurality of openings; a touch electrode layer, which is arranged on a side of the first insulating layer away from the substrate, and comprises a plurality of common electrode blocks; a transfer layer, which is arranged on a side of the touch electrode layer away from the substrate; the transfer layer comprises a plurality of touch wire transfer portions and a plurality of pixel electrodes, the touch wire transfer portions are in contact with the touch wires and electrically connected with the common electrode blocks, and the pixel electrodes are in contact with the pixel drive circuits; wherein the touch wire transfer portions and the pixel electrodes are located at bottoms of different openings. The touch wire transfer portions and the pixel electrodes are arranged in different openings. When photoresist is coated, the parts between the touch wire transfer portions and the pixel electrodes are convex parts relative to the touch wire transfer portions and the pixel electrodes, and the touch wire transfer portions and the pixel electrodes are concave parts, photoresist reflow will flow to the touch wire transfer portions or the pixel electrodes, that is to say, the photoresist between the touch wire transfer portions and the pixel electrodes will not be too thick, so that the conductive material between the two can be completely etched, thereby avoiding short circuit of the touch wire transfer portions and the pixel electrodes, and the yield of the array substrate can be improved.

[0030] It should be understood that the content described in this part is not intended to identify key or important features of the embodiments of the present application, nor is it used to limit the scope of the present application. Other features of the present application will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0032] Figure 1 A structural schematic diagram of an array substrate provided by the embodiments of the present application is shown in the figure;

[0033] Figure 2 The utility model provides an array substrate's plan view for the utility model embodiment provides. Specific implementation

[0034] In order to make the personnel in the technical field better understand the utility model scheme, below will combine the drawings in the utility model embodiment, the technical scheme in the utility model embodiment is clearly and completely described, obviously, the described embodiment is only a part of the embodiment of the utility model, not all the embodiment. Based on the embodiment in the utility model, all other embodiments obtained by the ordinary skill in the art without making creative labor should belong to the range of protection of the utility model.

[0035] It needs to be explained that the terms "first", "second" and the like in the specification and claims of the utility model and the above-mentioned drawings are used for distinguishing similar objects, and do not have to be used for describing specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiment of the utility model described here can be implemented in the order other than those illustrated or described here. In addition, the terms "include" and "have" and any modification thereof are intended to cover non-exclusive inclusion, for example, the process, method, system, product or equipment including a series of steps or units does not have to be limited to the clearly listed steps or units, but can include other steps or units not clearly listed or inherent to these processes, methods, products or equipment.

[0036] Figure 1 The utility model provides a structure schematic diagram of array substrate for the utility model embodiment, Figure 2 The utility model provides an array substrate's plan view for the utility model embodiment, reference Figure 1 And Figure 2 . Array substrate includes: substrate 1, drive circuit layer 2, first insulating layer 3, touch electrode layer 4 and adapter layer 6.

[0037] Drive circuit layer 2 is arranged at one side of substrate 1, and drive circuit layer 2 includes a plurality of pixel drive circuits PX and a plurality of touch wires 21;First insulating layer 3 is arranged at the side of drive circuit layer 2 away from substrate 1, and a plurality of openings Gap are formed in first insulating layer 3;Touch electrode layer 4 is arranged at the side of first insulating layer 3 away from substrate 1, and touch electrode layer 4 includes a plurality of common electrode blocks 41;Adapter layer 6 is arranged at the side of touch electrode layer 4 away from substrate 1, and adapter layer 6 includes a plurality of touch wire adapter parts 61 and a plurality of pixel electrodes 62, touch electrode adapter part 61 is in contact with touch wire 251 and is electrically connected with common electrode block 41, and pixel electrode 62 is in contact with pixel drive circuit PX;Wherein, touch wire adapter part 61 and pixel electrode 62 are located at the bottom of different openings Gap.

[0038] Specifically, the array substrate can be used to prepare a display panel, for example, combining the array substrate with a liquid crystal cell can obtain a liquid crystal display panel. The substrate 1 in the array substrate can be a rigid substrate, such as a glass substrate, a diamond substrate, a silicon substrate, or a sapphire substrate, etc. The substrate 1 can also be a flexible substrate, such as a polyimide substrate, etc. The substrate 1 plays a supporting role. A plurality of pixel driving circuits are provided in the driving circuit layer 2, each pixel driving circuit can drive a sub-pixel display, and the specific driving and display principle is known to those skilled in the art, which will not be described here.

[0039] In addition to containing the pixel driving circuit PX, the driving circuit layer 2 also includes a plurality of touch wires 251. In this embodiment, the common electrode block 41 for realizing the touch function is arranged inside the array substrate, and the touch wire 251 is also arranged inside the array substrate. Each touch wire 251 is connected to one common electrode block 41. The touch wire 251 is used to electrically connect the common electrode block 41 with the corresponding chip (such as a driving chip) and the like, thereby realizing the detection of touch.

[0040] The touch electrode block 41 needs to be as close to the user as possible, so the touch electrode block 41 is arranged in the film layer closer to the light-emitting surface in the array substrate. The touch electrode block 41 and the touch wire 251 are located in different film layers, and the switching layer 6 is needed to realize the electrical connection between the two. Similarly, the pixel driving circuit also needs the switching layer 6 as the pixel electrode.

[0041] In the related art, a hole is usually opened on the first insulating layer 3, and the pixel electrode and the touch wire switching part are made in the same hole. The manufacturing method is to first form a whole layer of conductive material, then coat photoresist, and remove the excess photoresist by exposure and development, then remove the conductive material exposed by the photoresist, and then clean the photoresist. The pixel electrode and the touch wire switching part 61 are located in the same film layer, and the two need to be insulated, that is, the conductive material between the touch wire switching part 61 and the pixel electrode in the same hole needs to be removed. However, in the related art, since the touch wire switching part 61 and the pixel electrode are located in the same hole, the photoresist will flow back in the hole, so that the photoresist corresponding to the conductive material between the touch wire switching part 61 and the pixel electrode 62 in the hole is thicker, and it cannot be completely exposed during exposure. The conductive material in this part cannot be completely etched, so that the pixel electrode 62 and the touch wire switching part 61 are short-circuited. If overexposed, the other part of the conductive material will be thinner.

[0042] In the embodiment, the touch wire transition part 61 and the pixel electrode 62 are arranged in different openings Gap. When the photoresist is coated, the part between the touch wire transition part 61 and the pixel electrode 62 is a convex part relative to the touch wire transition part 61 and the pixel electrode 62, and the touch wire transition part 61 and the pixel electrode 62 are concave parts. The photoresist reflow will flow to the touch wire transition part 61 or the pixel electrode 62, that is, the photoresist between the touch wire transition part 61 and the pixel electrode 62 will not be too thick, which can ensure that the conductive material between the two will be completely etched, thereby avoiding the short circuit of the touch wire transition part 61 and the pixel electrode 62, and further improving the yield of the array substrate.

[0043] The technical scheme of the embodiment, the array substrate comprises: a substrate; a driving circuit layer arranged on one side of the substrate, the driving circuit layer comprising a plurality of pixel driving circuits and a plurality of touch wires; a first insulating layer arranged on the side of the driving circuit layer away from the substrate, the first insulating layer being provided with a plurality of openings; a touch electrode layer arranged on the side of the first insulating layer away from the substrate, the touch electrode layer comprising a plurality of common electrode blocks; a transition layer arranged on the side of the touch electrode layer away from the substrate; the transition layer comprising a plurality of touch wire transition parts and a plurality of pixel electrodes, the touch wire transition part being in contact with the touch wire and electrically connected with the common electrode block, and the pixel electrode being in contact with the pixel driving circuit; wherein the touch wire transition part and the pixel electrode are located at the bottom of different openings. The touch wire transition part and the pixel electrode are arranged in different openings. When the photoresist is coated, the part between the touch wire transition part and the pixel electrode is a convex part relative to the touch wire transition part and the pixel electrode, and the touch wire transition part and the pixel electrode are concave parts. The photoresist reflow will flow to the touch wire transition part or the pixel electrode, that is, the photoresist between the touch wire transition part and the pixel electrode will not be too thick, which can ensure that the conductive material between the two will be completely etched, thereby avoiding the short circuit of the touch wire transition part and the pixel electrode, and further improving the yield of the array substrate.

[0044] Optionally, with reference to Figure 1 , the first insulating layer 3 comprises a plurality of first openings Gap1 and a plurality of second openings Gap2; the touch wire transition part 61 is located at the bottom of the first opening Gap1, and the pixel electrode 62 is located at the bottom of the second opening Gap2; the plurality of openings Gap comprises a plurality of opening pairs, each opening pair comprising an adjacent first opening Gap1 and a second opening Gap2; the common electrode block 41 corresponding to the opening pair is in the pixel driving circuit PX, and the common electrode block 41 is located on the side of the first opening Gap1 away from the second opening Gap2; the pixel driving circuit PX is located on the side of the second opening Gap2 away from the first opening Gap1.

[0045] Specifically, in the embodiment, the first opening Gap1 and the second opening Gap2 are oppositely arranged, so that the space utilization of the array substrate is higher, the structure is more compact, and the pixel density is improved.

[0046] Optionally, continuing to refer to Figure 1 , the first insulating layer 3 comprises a barrier wall 31 between the first opening Gap1 and the second opening Gap2 in the opening pair; the vertical distance between the side of the barrier wall 31 away from the substrate 1 and the substrate is less than or equal to the vertical distance between the side of other parts of the first insulating layer 3 away from the substrate 1 and the substrate 1.

[0047] Specifically, the first opening Gap1 and the second opening Gap2 are both etched from the first insulating layer 3. The first insulating layer 3 comprises the barrier wall 31, a first part 32 corresponding to the touch electrode block 41, and a second part 33 corresponding to the pixel driving circuit PX. In some embodiments, the surfaces of the first insulating layer 3 away from the substrate 1 can be flush, that is, only the places of the first insulating layer 3 where the openings Gap need to be formed are etched, and other parts do not need to be etched, so that the process steps are less, and the cost is saved. In some other embodiments, the vertical distance between the surface of the barrier wall 31 away from the substrate 1 and the substrate 1 can be less than the vertical distance between the surface of the first part away from the substrate 1 and the substrate 1, and less than the vertical distance between the surface of the second part away from the substrate 1 and the substrate 1, that is, the barrier wall 31 can be half-etched. In this way, the risk of the barrier wall 31 being too thick and breaking can be reduced.

[0048] Optionally, continuing to refer to Figure 1 , along the arrangement direction of the first opening Gap1 and the second opening Gap2 in the opening pair, the size of the barrier wall 31 is less than or equal to 7.5 microns.

[0049] Specifically, if the size of the barrier wall 31 is too large, the part of the array substrate that can be used to arrange the pixel driving circuit PX will be less, and the pixel density will be smaller. Therefore, the size of the barrier wall 31 is smaller in the embodiment, which is more conducive to improving the pixel density.

[0050] Optionally, continuing to refer to Figure 1 , the transfer layer 6 further comprises a connection lead 63, one end of the connection lead 63 is electrically connected with the common electrode 41, and the other end of the connection lead 63 is electrically connected with the corresponding touch trace transfer part 61.

[0051] Specifically, the touch trace transfer part 61 is the part of the transfer layer 6 located at the bottom of the first opening Gap1, and the connection lead 63 is the part for connecting the touch trace transfer part 61 and the common electrode 41. It can be understood that the connection lead 63 and the touch trace transfer part 61 are an integral structure.

[0052] Optionally, continuing to refer to Figure 1 The transfer layer 6 is a transparent conductive layer. For example, the material of the transfer layer 6 is indium tin oxide (ITO). By setting the transfer layer 6 as a transparent conductive layer 6, the array substrate can reduce the shielding of the backlight of the backlight source, that is, the influence on the display of the display panel is smaller.

[0053] Optionally, the first insulating layer 3 is a planarization layer. For example, the first insulating layer 3 is an OC glue layer.

[0054] Optionally, continuing to refer to Figure 1 The pixel driving circuit PX includes a transistor, and the driving circuit layer 2 includes a first metal layer 21, a gate insulating layer 22, an active layer 23, a semiconductor layer 24, a second metal layer 25, and a second insulating layer 26. The first metal layer 21 is arranged on one side of the substrate 1 and is used for forming a gate of the transistor; the gate insulating layer 22 covers the first metal layer 21; the active layer 23 is arranged on a side of the gate insulating layer 22 away from the substrate 1; the semiconductor layer 24 is arranged on a side of the active layer 23 away from the substrate 1; the second metal layer 25 is arranged on a side of the semiconductor layer 24 away from the substrate 1, and the second metal layer 25 is used for forming a source and a drain of the transistor and a touch wiring 251. The second insulating layer 26 covers the second metal layer 25. The first insulating layer 3 is located on a side of the second insulating layer 26 away from the substrate 1. The array substrate further includes a third insulating layer 5 located between the transfer layer 6 and the touch electrode layer 4.

[0055] Specifically, the first metal layer 21 can be composed of gold, silver, aluminum, copper, nickel, or any alloy thereof, for example. The gate insulating layer 22 is silicon nitride, for example. The active layer 23 is amorphous silicon or the like, for example. The semiconductor layer 24 is an n+ semiconductor layer, that is, an n-type heavily doped semiconductor layer. The second metal layer 25 can be composed of gold, silver, aluminum, copper, nickel, or any alloy thereof, for example. The second insulating layer 26 and the third insulating layer 5 can both be inorganic insulating layers.

[0056] The utility model further provides a kind of display panel, and the display panel provided in the utility model embodiment includes the array substrate provided in any embodiment of the utility model, so it also has the same beneficial effect, which will not be repeated here.

[0057] It should be understood that the various forms of the flow shown above can be used to reorder, add or delete steps. For example, the steps described in the utility model can be executed in parallel, sequentially or in different order, as long as the desired results of the technical solutions of the utility model can be achieved, which are not limited herein.

[0058] The specific embodiments described above do not constitute a limitation on the protection scope of the present application. Those skilled in the art should understand that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. An array substrate, characterized by, The array substrate comprises: a substrate; a drive circuit layer disposed on one side of the substrate, the drive circuit layer comprising a plurality of pixel drive circuits and a plurality of touch wires; a first insulating layer disposed on a side of the drive circuit layer away from the substrate, the first insulating layer having a plurality of openings; a touch electrode layer disposed on a side of the first insulating layer away from the substrate, the touch electrode layer comprising a plurality of common electrode blocks; an adapter layer disposed on a side of the touch electrode layer away from the substrate; the adapter layer comprising a plurality of touch wire adapter portions and a plurality of pixel electrodes, the touch wire adapter portions being in contact with the touch wires and electrically connected to the common electrode blocks, the pixel electrodes being in contact with the pixel drive circuits; wherein the touch wire adapter portions and the pixel electrodes are located at the bottoms of different openings.

2. The array substrate of claim 1, wherein, The first insulating layer comprises a plurality of first openings and a plurality of second openings; the touch wire adapter portions are located at the bottoms of the first openings, and the pixel electrodes are located at the bottoms of the second openings. The plurality of openings comprises a plurality of opening pairs, each of the opening pairs comprising an adjacent first opening and an adjacent second opening; among the corresponding common electrode blocks and pixel drive circuits of the opening pairs, the common electrode blocks are located on a side of the first openings away from the second openings; and the pixel drive circuits are located on a side of the second openings away from the first openings.

3. The array substrate of claim 2, wherein, The first insulating layer comprises a barrier wall between the first openings and the second openings in the opening pairs; The vertical distance between the side of the barrier wall away from the substrate and the substrate is less than or equal to the vertical distance between the side of other parts of the first insulating layer away from the substrate and the substrate.

4. The array substrate of claim 3, wherein, The size of the barrier wall along the arrangement direction of the first openings and the second openings in the opening pairs is less than or equal to 7.5 microns.

5. The array substrate of claim 1, wherein, The adapter layer further comprises a connection lead, one end of the connection lead being electrically connected to a common electrode, and the other end of the connection lead being electrically connected to a corresponding touch wire adapter portion.

6. The array substrate of claim 1, wherein, The adapter layer is a transparent conductive layer.

7. The array substrate of claim 1, wherein, The first insulating layer is a planarization layer.

8. The array substrate of claim 1, wherein, The pixel drive circuit comprises a transistor; and the drive circuit layer comprises: a first metal layer disposed on one side of the substrate, for forming a gate of the transistor; a gate insulating layer covering the first metal layer; an active layer disposed on a side of the gate insulating layer away from the substrate; a semiconductor layer disposed on a side of the active layer away from the substrate; a second metal layer disposed on a side of the semiconductor layer away from the substrate, for forming a source and a drain of the transistor and the touch wires; a second insulating layer covering the second metal layer; wherein the first insulating layer is disposed on a side of the second insulating layer away from the substrate.

9. The array substrate of claim 8, wherein, The array substrate further comprises a third insulating layer between the adapter layer and the touch electrode layer.

10. A display panel, characterized by, The display panel comprises the array substrate of any one of claims 1-9.

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