Floating plate for testing socket
By setting clearance notches at the corners of the bottom plate of the floating plate, the problem of solder ball damage caused by chip deformation in the prior art is solved, achieving higher testing accuracy and reducing production costs.
Patent Information
- Application Number
- CN202520232262.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-14
- Publication Date
- 2025-12-30
- Estimated Expiration
- 2035-02-14
AI Technical Summary
The floating plate of the existing test socket cannot effectively prevent chip solder ball damage caused by deformation during the testing of large packaged products, which affects the accuracy of testing and increases production costs.
A clearance notch is set at the corner of the bottom plate of the floating board to avoid damage to the solder balls caused by deformation of the chip under test. The design adopts a new technical means compared with the existing technology, which is to use laser cutting technology to set a clearance notch on the existing floating board to avoid damage to the chip solder balls.
This effectively avoids damage to chip solder balls, improves testing accuracy, and reduces production costs.
Smart Images
Figure CN223742552U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model belongs to chip test technical field, and specifically relates to a floating plate for testing socket. BACKGROUND
[0002] Before the chip is formally shipped, needs carrying out relevant electrical property test in test socket. Chip test is actually testing the performance, reliability and the like of chip, obtains many key data, improves chip making and improves yield. For large package product, its deformation is greater than the bearing range of the existing test socket floating plate, and the four-corner deformation concentration area of the floating plate will cause product bruising, especially for the ball grid array structure of the to-be-tested chip, the existing floating plate is easy to cause the damage of the solder ball at the bottom of the to-be-tested chip, causes the loss of the customer, and also indirectly affects the accuracy of the test.
[0003] Therefore, aiming at the above technical problems, it is necessary to provide a floating plate for testing socket. INVENTION CONTENTS
[0004] The utility model discloses a kind of floating plates for testing socket, which can avoid that solder ball at the back of chip is damaged by floating plate.
[0005] To achieve the above object, the technical scheme provided by a specific embodiment of the utility model is as follows:
[0006] A floating plate for testing socket, the test socket is at least used for testing to-be-tested chip, characterized in that the floating plate includes a bottom plate and a side plate arranged around the side of the bottom plate, the inner wall of the side plate is fixedly connected with the side of the bottom plate, and the thickness of the bottom plate is less than the thickness of the side plate, to form a first groove for placing to-be-tested chip between the upper surface of the bottom plate and the inner wall of the side plate.
[0007] The corner of the bottom plate is provided with a let-out notch, and the let-out notch penetrates the upper surface and the lower surface of the bottom plate.
[0008] In one or more embodiments of the utility model, the let-out notch is quadrilateral or sector.
[0009] In one or more embodiments of the utility model, the ratio of the size of the let-out notch to the size of the to-be-tested chip is 0.0009-0.005.
[0010] In one or more embodiments of the utility model, a plurality of let-out through grooves are provided on the bottom plate and penetrate in the thickness direction.
[0011] In one or more embodiments of the utility model, a plurality of through holes are provided on the bottom plate and penetrate in the thickness direction.
[0012] In one or more embodiments of the utility model, the through hole is arranged in an array, the lower surface of the chip under test is provided with solder balls arranged in an array, the through hole corresponds to the solder ball in the area other than the corner area of the chip under test, and the corner area of the chip under test corresponds to the gap.
[0013] In one or more embodiments of the utility model, the bottom plate and the side plate are arranged in a quadrilateral structure matched with the chip under test.
[0014] In one or more embodiments of the utility model, a side groove is formed in the inner wall of at least two side plates, the width of the side groove is less than the width of the side plate, the side groove is in communication with the first groove, and the side groove is used to provide an operation space for taking out or placing the chip under test.
[0015] In one or more embodiments of the utility model, the depth of the side groove is less than or equal to the depth of the first groove.
[0016] In one or more embodiments of the utility model, the test socket further comprises a socket body, a socket substrate and a test probe; the socket body comprises a socket frame and a mesh plate, the inner wall of the socket frame is fixedly connected with the side edge of the mesh plate, a second groove for placing a floating plate is formed between the upper surface of the mesh plate and the inner wall of the socket frame, and the mesh plate is provided with first probe holes arranged in an array; the socket substrate is fixedly connected to the bottom of the socket frame, the socket substrate is provided with second probe holes arranged in an array, and the second probe holes are used to fix the test probe.
[0017] Compared with the prior art, the floating plate for the test socket of the utility model avoids damage of the solder balls on the lower surface of the chip under test caused by deformation of the chip under test by arranging a gap in the corner of the bottom plate.
[0018] The utility model can be improved by the existing design, a gap is arranged on the basis of the existing floating plate, the floating plate does not need to be reprocessed, and the production cost is further reduced while being convenient to use. BRIEF DESCRIPTION OF DRAWINGS
[0019] In order to more clearly illustrate the technical scheme in the embodiments of the utility model or the prior art, the drawings needed in the embodiment or the prior art description will be briefly introduced below, and obviously, the drawings in the following description are only some embodiments in the utility model, and other drawings can be obtained according to the drawings for the ordinary skilled in the art without creating labor.
[0020] Figure 1The utility model discloses a structure schematic diagram of floating plate for testing socket in one embodiment of the utility model.
[0021] Figure 2 The utility model discloses a top view of floating plate for testing socket in one embodiment of the utility model.
[0022] Figure 3 The utility model discloses a structure schematic diagram of testing socket in one embodiment of the utility model.
[0023] Figure 4 The utility model discloses a bottom plate top view of floating plate for testing socket in one embodiment of the utility model.
[0024] Figure 5 The utility model discloses a bottom plate top view of floating plate for testing socket in another embodiment of the utility model.
[0025] Figure 6 The utility model discloses a side plate structure schematic diagram of floating plate for testing socket in one embodiment of the utility model. DETAILED DESCRIPTION
[0026] In order to make the personnel in the technical field better understand the technical scheme in the utility model, the technical scheme in the embodiment of the utility model will be described clearly and completely in the embodiment of the utility model below, and obviously, the described embodiment is only a part of the embodiment of the utility model, not all the embodiment. Based on the embodiment in the utility model, all other embodiments obtained by the ordinary skill in the art without making creative labor should belong to the protection scope of the utility model.
[0027] Unless otherwise explicitly indicated, in the whole specification and claims, the term "comprising" or its variants such as "containing" or "including" and the like will be understood to include the stated element or component, but not exclude other elements or components.
[0028] The "coupling" or "connection" or "linking" in the specification includes both direct connection and indirect connection. The indirect connection is the connection through the intermediate medium, such as the connection through the electric conduction medium, which can have parasitic inductance or parasitic capacitance; the indirect connection can also include the connection through other active devices or passive devices on the basis of achieving the same or similar functional purpose, such as the connection through the circuit or component such as switch, follower circuit, etc. In addition, in the utility model, the words such as "first", "second" are mainly used to distinguish one technical feature from another technical feature, and do not necessarily require or imply certain actual relationship, quantity or order between the technical features.
[0029] In the detailed description of this specification, reference is made to the accompanying drawings, which form a part thereof, wherein like reference numerals always denote like parts, and wherein exemplary embodiments are shown by way of example that may be implemented. It should be understood that other embodiments may be utilized, and structural or logical changes may be made, without departing from the scope of this application. Therefore, the following detailed description should not be considered limiting.
[0030] The various operations in the specification may be described sequentially as multiple discrete actions or operations in a manner most conducive to understanding the claimed subject matter. However, the order of description should not be construed as implying that these operations must be sequentially related. Specifically, these operations may not be performed in the order presented. The described operations may be performed in a different order than in the described embodiments. Various additional operations may be performed in additional embodiments and / or the described operations may be omitted.
[0031] For the purposes of this application, the phrase "A and / or B" means (A), (B), or (A and B). For the purposes of this application, the phrase "A, B and / or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).
[0032] Various components and devices may be referred to or shown in the singular (e.g., “MOS transistor”, “transistor”, “switch”, etc.) in this document, but only for the convenience of discussion, and any element referred to in the singular may include multiple such elements as taught herein.
[0033] The description uses the phrases "in this embodiment," "in other embodiments," or "in some embodiments," each of which may refer to one or more of the same or different embodiments. Furthermore, the terms "comprising," "including," "having," etc., used in relation to embodiments of this application are synonymous.
[0034] like Figure 1 and Figure 2 As shown, in one embodiment of this application, a floating plate for a test socket is provided. The test socket is used to test a chip under test. The floating plate includes a base plate 10 and a side plate 20 disposed around the side of the base plate 10. The inner wall of the side plate 20 is fixedly connected to the side of the base plate 10, and the thickness of the base plate 10 is less than the thickness of the side plate 20, so as to form a first groove 101 for placing the chip under test between the upper surface of the base plate 10 and the inner wall of the side plate 20.
[0035] The corner of the base plate 10 is provided with a clearance notch 12, which penetrates the upper and lower surfaces of the base plate 10.
[0036] Furthermore, the base plate 10 is provided with a plurality of through holes 11 that extend through the thickness direction, that is, the through holes 11 penetrate the upper surface and the lower surface of the base plate 10.
[0037] In some embodiments of this application, the vias 11 are arranged in an array with spacing, and the lower surface of the chip under test is provided with solder balls arranged in an array with spacing. The vias correspond one-to-one with the solder balls in the area outside the corners of the chip under test, and the corner areas of the chip under test correspond to the clearance notches 12. Preferably, the vias 11 are circular vias, the diameter of the vias 11 is larger than the diameter of the solder balls on the lower surface of the chip under test, and the diameter of the vias 11 is larger than the maximum diameter of the test probe.
[0038] like Figure 3 As shown, this application applies to test sockets, which further include a socket body 30, a socket substrate 40, and test probes 50. The socket body 30 includes a socket frame 31 and a mesh plate 32. The inner wall of the socket frame 31 is fixedly connected to the side of the mesh plate 32, and a second groove 33 for placing a floating plate is formed between the upper surface of the mesh plate 32 and the inner wall of the socket frame 31. The mesh plate 32 has arrayed, spaced-apart first probe holes 34. The socket substrate 40 is fixedly connected to the bottom of the socket frame 31, and the socket substrate 40 has arrayed, spaced-apart second probe holes 41 for fixing the test probes 50. In some embodiments of this application, the socket body 30, the socket substrate 40, and the floating plate proposed in this application are mating quadrilateral structures.
[0039] During the test, the floating plate proposed in this application is placed in the second groove 33, and the side plate 20 is fixedly connected to the socket frame 31. In some embodiments of this application, the base plate 10 and the side plate 20 are set as quadrilateral structures that cooperate with the chip under test. Therefore, the first groove 101 is a quadrilateral structure that cooperates with the chip under test. During the test, the chip under test is placed on the base plate 10, and the upper surface of the base plate 10 abuts against the lower surface of the chip under test. The chip under test is just locked in the first groove 101.
[0040] It is understood that the positions of the second probe hole 41, the first probe hole 34, and the through hole 11 correspond one-to-one, and the first end of the test probe 50 is fixed inside the second probe hole 41 of the socket substrate 40. It should be noted that for test probes 50 located outside the corners of the base plate 10, the second end of the test probe 50 sequentially extends into the second probe hole 41, the first probe hole 34, and the through hole 11, and contacts the solder balls on the lower surface of the chip under test. For test probes 50 located at the corners of the base plate 10, the second end of the test probe 50 sequentially extends into the second probe hole 41, the first probe hole 34, and the clearance notch 12, and contacts the solder balls on the lower surface of the chip under test. The thickness of the base plate 10 is less than the length of the test probe 50 to ensure that a portion of the test probe 50 can extend out of the through hole 11 and thus contact the solder balls on the lower surface of the chip.
[0041] The present application is suitable for large packaging products. Since the chip size is large, the number of solder balls arranged on the lower surface of the chip to be tested is large (up to 150*150), and thus the corners of the chip to be tested are prone to deformation (for example, the four corners of the chip to be tested are bent upward or downward), which causes the through holes 11 on the bottom plate 10 to damage the solder balls at the corners of the chip to be tested. The present application proposes to arrange a relief gap 12 at the corner of the bottom plate 10 to provide relief and avoid damage to the solder balls.
[0042] As shown in Figure 4 and Figure 5 , in some embodiments of the present application, the relief gap 12 is rectangular or sector-shaped.
[0043] In some embodiments of the present application, the ratio of the size of the relief gap 12 to the size of the chip to be tested is 0.0009-0.005. For example, in an embodiment, the ratio of the area of the relief gap 12 to the area of the lower surface of the chip to be tested is 0.0009-0.005. In another embodiment, the ratio of the number of solder balls that can be accommodated in the relief gap 12 to the number of solder balls arranged on the lower surface of the chip to be tested is 0.0009-0.005. In an embodiment, 110*110 solder balls are arranged on the lower surface of the chip to be tested, and the size of each relief gap 12 is arranged to accommodate 6*6 solder balls.
[0044] As shown in Figure 6 , in some embodiments of the present application, a side groove 21 is formed in the inner wall of the side plate 20, and the width L1 of the side groove 21 is less than the width L2 of the side plate 20. Figures 1-2 The side groove 21 is arranged in communication with the first groove 101, and the side groove 21 is used to provide an operation space for taking out or placing the chip to be tested.
[0045] Further, the depth of the side groove 21 is less than or equal to the depth of the first groove 101.
[0046] Further, as shown in Figures 1-5 , in some embodiments of the present application, a plurality of relief grooves 13 are arranged in the thickness direction of the bottom plate 10, i.e., the relief grooves 13 penetrate the upper surface and the lower surface of the bottom plate 10. The relief grooves 13 are symmetrically arranged on the bottom plate 10, and the relief grooves 13 are used to provide relief for other solder components on the lower surface of the chip to be tested to avoid damage caused by the floating plate. It can be understood that the number, position and size of the relief grooves 13 can be adjusted based on the specific model of the chip to be tested, and the relief grooves 13 shown in Figures 1-5 are only schematic and should not limit the protection scope of the present application.
[0047] With the to-be-tested chip and the first recess 101 as an example of a rectangular cooperation, when the to-be-tested chip is placed on the bottom plate 10 (i.e. in the first recess 101), the solder balls outside the corners of the to-be-tested chip correspond to the through holes 11 on the floating plate one by one, and the solder balls at the four corners of the to-be-tested chip correspond to the four clearance notches 12 respectively, when the corners of the to-be-tested chip are deformed, since the corners of the bottom plate 10 are not provided with through holes 11, but are provided with clearance notches 12 for clearance, the solder balls at the corners of the to-be-tested chip will not be scratched by the bottom plate 10, thereby avoiding damage to the solder balls and ensuring the quality of the chip testing. Further, the embodiment can be realized by improving the existing design, i.e. modifying the floating plate of the existing design, for example, cutting off the four corners of the bottom plate 10 in the floating plate of the existing design by using a laser cutting technology, without the need to re-produce the floating plate, facilitating use while further reducing production costs.
[0048] As can be seen from the above technical solutions, the utility model has the following beneficial effects:
[0049] The floating plate for testing the socket of the utility model avoids damage to the solder balls on the lower surface of the to-be-tested chip caused by deformation of the to-be-tested chip by providing clearance notches at the corners of the bottom plate.
[0050] The utility model can be realized by improving the existing design, i.e. providing clearance notches on the basis of the existing floating plate, without the need to re-produce the floating plate, facilitating use while further reducing production costs.
[0051] For those skilled in the art, it is obvious that the utility model is not limited to the details of the above exemplary embodiments, and can be realized in other specific forms without departing from the spirit or basic characteristics of the utility model. Therefore, from any point of view, the embodiments should be regarded as exemplary and non-limiting, the scope of the utility model is defined by the appended claims rather than the above description, and therefore all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be included in the utility model. Any reference signs in the claims should not be regarded as limiting the claims involved.
[0052] In addition, it should be understood that although the present specification is described in terms of embodiments, not every embodiment contains only one independent technical solution, and the description of the specification is only for the sake of clarity, those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can be appropriately combined to form other embodiments that those skilled in the art can understand.
Claims
1. A floating plate for a test socket, the test socket being used for testing at least a chip under test, characterized in that, The floating plate comprises a bottom plate and side plates arranged around the side edges of the bottom plate, the inner walls of the side plates are fixedly connected with the side edges of the bottom plate, and the thickness of the bottom plate is less than the thickness of the side plates, so as to form a first groove between the upper surface of the bottom plate and the inner walls of the side plates for placing the chip to be tested; The corner of the bottom plate is provided with a clearance gap, and the clearance gap penetrates the upper surface and the lower surface of the bottom plate.
2. The floating plate for testing sockets according to claim 1, wherein, The clearance gap is quadrangular or sectorial.
3. The floating plate for testing sockets according to claim 1, wherein, The ratio of the size of the clearance gap to the size of the chip to be tested is 0.0009-0.
005.
4. The floating plate for testing sockets of claim 1, wherein, A plurality of clearance grooves are arranged on the bottom plate and penetrate the thickness direction.
5. The floating plate for testing sockets of claim 1, wherein, A plurality of through holes are arranged on the bottom plate and penetrate the thickness direction.
6. The floating plate for testing sockets according to claim 5, wherein, The through holes are arranged in an array, the lower surface of the chip to be tested is provided with an array of solder balls, the through holes correspond to the solder balls in the area other than the corner of the chip to be tested, and the corner area of the chip to be tested corresponds to the clearance gap.
7. The floating plate for a test socket of claim 1, wherein, The bottom plate and the side plate are arranged in a quadrangular structure matched with the chip to be tested.
8. The floating plate for a test socket of claim 1, wherein, The inner wall of the side plate is provided with a side groove, the width of the side groove is less than the width of the side plate, the side groove is arranged in communication with the first groove, and the side groove is used to provide an operation space for taking out or placing the chip to be tested.
9. The floating plate for testing sockets according to claim 8, wherein, The depth of the side groove is less than or equal to the depth of the first groove.
10. The floating plate for a test socket of claim 1, wherein, The test socket further comprises a socket body, a socket substrate and test probes; The socket body comprises a socket frame and a mesh plate, the inner wall of the socket frame is fixedly connected with the side edges of the mesh plate, and the upper surface of the mesh plate and the inner wall of the socket frame form a second groove for placing the floating plate, and the mesh plate is provided with an array of first probe holes; The socket substrate is fixedly connected to the bottom of the socket frame, the socket substrate is provided with an array of second probe holes, and the second probe holes are used to fix the test probes.