Circuit for preventing current overshoot during insertion of USB (Universal Serial Bus) interface
By combining RC circuits and P_MOS field-effect transistors, the problem of current overshoot when USB interface electronic products are powered on is solved, achieving the effects of low cost, simplified circuit design and stable power supply to the devices.
Patent Information
- Application Number
- CN202422289922.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-19
- Publication Date
- 2025-12-30
- Estimated Expiration
- 2034-09-19
AI Technical Summary
Existing USB interface electronic products are prone to current overshoot when powered on due to excessive accumulation of filter capacitors, which can easily damage the equipment. Moreover, existing solutions are costly and complex.
By employing a combination of RC circuits and P_MOS field-effect transistors, and through delay and switching control, the power supply is stabilized and current overshoot is prevented.
It effectively prevents current overshoot, simplifies circuit design, reduces costs, ensures stable equipment operation, and has high stability and safety.
Smart Images
Figure CN223744372U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model belongs to circuit protection technical field, specifically a kind of USB interface insertion time prevents current overshoot circuit. BACKGROUND
[0002] Currently, USB interface is often used in many electronic products, commonly used to connect charger, computer, mobile phone and game console and other electronic devices, and power supply is provided by USB.At the same time, in order to meet the functional requirements of product, most of electronic products usually have complex circuit and multi-chip circuit design.
[0003] These products with USB interface usually use single or multiple chips to achieve functional requirements, which inevitably increases the filter capacitor on the power supply of chip under the condition of ensuring the normal performance of each chip.When the filter capacitor value on the power supply circuit accumulates too much (C0+C1+…+Cn≥10uF, such as Figure 3 ), huge overshoot current will be generated when the product is powered on, which can easily cause damage to USB power supply equipment (charger, computer, mobile phone and game console and other electronic devices), so in the current circuit design of electronic products with USB interface, it is necessary to pay attention to the design of preventing current overshoot.Currently, many products use switching chips, LDO and other circuits to cooperate with software control to solve this problem (such as Figure 4 ), such solution not only has high cost (need to add switching chip, also need software control, more GPIO is needed for MCU), but also the power supply circuit will be more complex.
[0004] Therefore, the utility model provides a kind of USB interface insertion time prevents current overshoot circuit. UTILITY MODEL CONTENTS
[0005] In order to make up for the deficiencies of prior art, at least one technical problem proposed in the background art is solved.
[0006] The technical scheme adopted by the utility model to solve its technical problems is: the USB interface insertion time prevents current overshoot circuit, including the device supporting USB insertion provides 5V voltage to the product equipment needing USB power supply through USB interface;The product equipment needing USB power supply includes surge protection circuit and power supply circuit;The surge protection circuit is connected with power supply circuit;The surge protection circuit is connected with the USB interface of the device supporting USB insertion.
[0007] Preferably, the anti-inrush circuit comprises Q1, C1, C2, C3, R1, R2, R3, 5V_IN interface, 5V_OUT interface; the R3 and R1 are arranged in parallel; the Q1 is arranged in the middle of the 5V_IN interface and the 5V_OUT interface, and is connected with the 5V_IN interface and the 5V_OUT interface; the 5V_IN interface is connected with the R3; the R3 is connected with the 5V_OUT interface; the 5V_IN interface is connected with the C1; the C1 and the R2 are connected; the R2 and the Q1 are connected; the R2 and the 5V_OUT interface are connected with the C2, and the Q1 is a PMOS transistor.
[0008] Preferably, the R3 is a current-limiting resistor; the C3 is a post-stage filtering capacitor; the RC circuit and the P_MOS field effect transistor are used to delay and switch control of the USB power supply, the RC circuit is used to switch delay, and finally the P_MOS field effect transistor is stably opened to realize final stable power supply, and the whole process effectively prevents current overshoot.
[0009] Preferably, the R3 is arranged at 47-300 ohms; when the R3 is too small, a large current will flow through the R3 at the moment of the USB power supply, and the anti-current overshoot function cannot be played; meanwhile, the R3 cannot be too large, and if the R3 is too large, current overshoot may occur at the moment of the transistor Q1 being turned on, so that the R3 is arranged between 47-300 ohms to effectively play the protection role of the current overshoot.
[0010] Preferably, the sizes of the R1 and the R2 are adjusted according to the conduction characteristics of the Q1 and the size of the required current of the product, so that the R1 and the R2 can be normally used; the R1 and the R2 can be adaptively matched for different specifications of elements through the above structure, and the adaptability of the circuit is increased.
[0011] The beneficial effects of the utility model are as follows:
[0012] 1.The anti-current overshoot circuit when a USB interface is inserted, the RC circuit and the P_MOS field effect transistor are used to delay and switch control of the USB power supply, the RC circuit is used to switch delay, and finally the P_MOS field effect transistor is stably opened to realize final stable power supply, and the whole process effectively prevents current overshoot.
[0013] 2.The anti-current overshoot circuit when a USB interface is inserted, the number of elements is small, and the cost advantage is large through the use of a low-cost scheme, the problem of current overshoot when the USB is powered on is effectively reduced, and the design of the overall circuit is simplified; the circuit does not change the working state of the equipment, does not affect the stable work of the system, has high stability and safety. BRIEF DESCRIPTION OF DRAWINGS
[0014] The utility model makes further illustration in connection with the drawings below.
[0015] Figure 1 It is the principle block diagram circuit diagram that the utility model uses circuit,
[0016] Figure 2 It is the anti-surge circuit diagram in the utility model,
[0017] Figure 3 It is the circuit implementation block diagram circuit diagram that commonly used,
[0018] Figure 4 It is the circuit implementation block diagram circuit diagram that commonly used improvement,
[0019] Figure 5 It is the current variation diagram in the utility model, Specific implementation
[0020] In order to make the technical means, creation features, purposes and effects realized by the utility model easy to understand, the utility model is further described below in connection with specific implementation.
[0021] As Figures 1 to 2 The utility model discloses a kind of anti-current overshoot circuits when USB interface is inserted, it is applied to the equipment needing USB power supply product and the equipment supporting USB insertion, it is characterized in that: including the equipment supporting USB insertion provides 5V voltage to the equipment needing USB power supply product for power supply by USB interface;The equipment needing USB power supply product includes anti-surge circuit and power supply circuit composition;The anti-surge circuit is connected with power supply circuit;The anti-surge circuit is connected with the USB interface of the equipment supporting USB insertion;The anti-surge circuit includes Q1, C1, C2, C3, R1, R2, R3, 5V_IN interface, 5V_OUT interface;R3 and R1 are arranged in parallel;Q1 is arranged in the middle of 5V_IN interface and 5V_OUT interface, and Q1 is connected with 5V_IN interface and 5V_OUT interface and is arranged;5V_IN interface is connected with R3;R3 is connected with 5V_OUT interface;5V_IN interface is connected with C1;C1 and R2 are connected;R2 and Q1 are connected;C2 is connected between R2 and 5V_OUT interface;Q1 is PMOS transistor arrangement;R3 is current-limiting resistance;C3 is post-stage filter capacitor;R3 is arranged at 47-300 ohm;The size of R1 and R2 is adjusted according to the conduction characteristic of Q1 and the size of product required current, so that R1 and R2 can be normally used.
[0022] The device supporting USB insertion provides 5V voltage to the USB powered product through the USB interface. The normal voltage of the USB interface is 5+ / -0.25V (USB standard protocol). When the normal power current of the USB powered device is small, the transistor P_MOS divides the voltage V=IR. Since the current I is small, the internal resistance R of the transistor is not high, and the normal working voltage and current of the product can also be met. When the normal power current of the USB powered device is large, the transistor P_MOS divides the voltage V=IR. Since the current I is large, the internal resistance R of the P_MOS needs to be small, and the low internal resistance MOS tube needs to be selected, so as to meet the normal working voltage and current of the product. In addition, the internal resistance of the PMOS turned on is also related to the level of Vgs, and the size of Vgs needs to be adjusted by R1 and R2. The appropriate resistance value of R1R2 can ensure that the PMOS tube is fully turned on, so as to ensure the normal working voltage of the product
[0023] As shown in Figure 2 When the USB is inserted, the C1R2 circuit is charged at the power-on moment of 5V_IN, the transient high level is generated at both ends of R2, and Q1 is in the cut-off state. When Q1 is cut off, the current can only pass through R3 to 5V_OUT. Only by appropriately adjusting the resistance and capacitance values of R3C3, the smooth power-on can be realized, and no large overshoot current is generated at the moment of USB insertion. When C1 is fully charged, by adjusting the voltage division of R1 and R2, the G collector of Q1 is in a low level, and Q1 transistor can be stably turned on, so as to ensure the normal and stable power supply of the product subsequently. Therefore, the current overshoot protection of the USB product is realized by the simple switching delay circuit composed of R1, R2, R3, C1, C2, C3 and Q1.
[0024] Capacitor delay time calculation:
[0025] 1, define T as the charging and discharging time of the capacitor.
[0026] 2, define V0 as the initial voltage value on the capacitor.
[0027] 3, define V1 as the final voltage value that the capacitor can charge to
[0028] 4, define Vt as the voltage value on the capacitor at T time
[0029] Capacitor C charging delay time
[0030] T=R2C1*Ln[(V1-V0) / (V1-Vt)]
[0031] Where R2 is the total resistance value in the capacitor charging circuit, and C1 is the total capacitance value of the corresponding circuit.
[0032] The main purpose of the gentle circuit RC is to pre-charge the filter capacitor of the subsequent circuit before the transistor Q1 is turned on, to avoid large current overshoot. In actual use, the resistance value of R3 cannot be too small. If R3 is too small, a large current will flow through R3 when the USB is powered on, which will not prevent current overshoot. At the same time, R3 cannot be too large, otherwise it may cause current overshoot when the transistor Q1 is turned on.
[0033] Current change reference Figure 5 As shown;
[0034] Regarding P_MOS, different Vgs voltage will also have different impedance.
[0035] The total delay time is the overall effect of the superposition of R2 C1 circuit and R3 C3 circuit. By adjusting the size of the resistor and capacitor, the delay time can be changed. According to the actual measurement, when the time is greater than 100ms, the excessive overshoot current generated during insertion can be reduced to avoid damage to the USB power supply device.
[0036] Working principle: When the USB is inserted and powered on, the capacitor C1 is charged, and the G collector of the PMOS tube Q1 is at a high level. At this time, the PMOS tube Q1 is not conducting, and 5V can only pass through the large resistance R3 (current limiting resistance) to charge the capacitor C3 (the subsequent filter capacitor) with a small current. The shutdown of the transistor Q1 and the R3 C3 circuit suppress the generation of overshoot current during USB power-on.
[0037] At the same time, the capacitor C1 and the capacitor C2 will also be charged. When the capacitor C1 and the capacitor C2 are fully charged, the G collector level of Q1 will be pulled down by the resistor R2 (divided by resistors R1 and R2), and the PMOS tube Q1 will be turned on. The subsequent circuit (MCU, IC1-n, etc.) of the product can get normal current supply through Q1, and the product can work normally.
[0038] During the entire power-on transient process, the generation of large current is avoided, which prevents the transient overshoot current from damaging the front-end power supply device when the USB product is inserted, and also ensures the normal operation of the product.
[0039] With the protection of the anti-overshoot current circuit, when the USB is inserted, the current capacity of the product is limited due to the protection of the anti-overshoot current circuit, and the size of the current is limited, which reduces the generation of overshoot current. In addition, some simpler USB products (usually USB single-chip products) do not need to add this circuit when the USB power supply bypass capacitor of such products is small (C0+C1+…+Cn≤10uF). When the USB power supply bypass capacitor of such products is large (C0+C1+…+Cn≥10uF), this circuit can also be added to protect against current overshoot.
[0040] The basic principle, main features and advantages of the present application are shown and described above. Those skilled in the art should understand that the present application is not limited by the above examples, and the above examples and descriptions in the specification are only to illustrate the principles of the present application. Without departing from the spirit and scope of the present application, various changes and improvements can be made to the present application, and these changes and improvements all fall within the scope of the claimed present application. The scope of protection of the present application is defined by the appended claims and their equivalents.
Claims
1. A circuit for preventing current overshoot when a USB interface is inserted, applied to devices requiring USB power supply and devices supporting USB insertion, characterized in that: The device supporting USB insertion provides 5V voltage through the USB interface for the USB-powered product device; the USB-powered product device comprises an anti-surge circuit and a power supply circuit; the anti-surge circuit is connected with the power supply circuit; the anti-surge circuit is connected with the USB interface of the device supporting USB insertion; The anti-surge circuit comprises Q1, C1, C2, C3, R1, R2, R3, 5V_IN interface and 5V_OUT interface; the R3 and R1 are arranged in parallel; the Q1 is arranged between the 5V_IN interface and the 5V_OUT interface, and the Q1 is connected with the 5V_IN interface and the 5V_OUT interface; the 5V_IN interface is connected with the R3; the R3 is connected with the 5V_OUT interface; the 5V_IN interface is connected with the C1; the C1 and the R2 are connected; the R2 and the Q1 are connected; the R2 and the 5V_OUT interface are connected with the C2; the Q1 is a PMOS transistor.
2. The USB interface insertion current surge prevention circuit according to claim 1, wherein: The R3 is a current-limiting resistor; the C3 is a post-stage filtering capacitor.
3. The USB interface plug-in current surge prevention circuit according to claim 2, characterized in that: The R3 is arranged at 47-300 ohms.
4. The USB interface plug-in current surge prevention circuit according to claim 3, characterized in that: The R1 and the R2 are adjusted according to the conduction characteristics of the Q1 and the required current of the product, so that the R1 and the R2 can be normally used.