Control circuit for controlling high-voltage power supply by low level

Abstract

The utility model provides a control circuit of a low-level control high-voltage power supply. The control circuit comprises a single-chip microcomputer, a first power supply, an NAND gate logic chip, a triode, a PMOS tube and a second power supply. The NAND gate logic chip comprises a first input end pin, a second input end pin and an output end pin; the first input end pin is connected with the single-chip microcomputer. The second input pin is connected with the first power supply; the output end pin is connected with the base electrode of the triode, the collector electrode of the triode is connected with the grid electrode of the PMOS tube, and the source electrode of the PMOS tube is connected with the second power supply. According to the utility model, the problem of wrong power-on time sequence of a power supply device caused by high level in power-on of the single-chip microcomputer is solved.

Description

TECHNICAL FIELD

[0001] The utility model relates to circuit control technical field, especially a control circuit of low level control high voltage power supply. BACKGROUND

[0002] Low level control high voltage power supply refers to the high voltage, high current control of high voltage power supply through low voltage, low current control signal (such as the output signal of single-chip microcomputer, PLC, sensor etc.

[0003] In prior art, low level control high voltage power supply usually adopts the scheme of single-chip microcomputer, triode, MOS tube. This scheme generally adopts single-chip microcomputer output low level (low voltage) to control triode conduction, and triode conduction makes MOS tube conduction, and high voltage power supply output high voltage realizes power supply by the conduction of MOS tube.

[0004] But some single-chip microcomputer appears high level when power on, thereby leading to power-on timing error of triode, MOS tube, high voltage power supply and other power supply devices, and this error can cause triode, MOS tube, high voltage power supply and other power supply devices to fail to start, at this time, controlling high voltage power supply can cause harm to electric devices.

[0005] In addition, the scheme of low level control high voltage power supply in prior art can only adopt single logic control power-on timing, and is not suitable for multiple logic control power-on timing. UTILITY MODEL CONTENTS

[0006] The utility model provides a kind of control circuit of low level control high voltage power supply, to solve the technical problem that single-chip microcomputer electric appears high level when low level control high voltage power supply in prior art leads to power-on timing error of power supply device, and logic control power-on timing is single.

[0007] An aspect of the utility model is to provide a kind of control circuit of low level control high voltage power supply, the control circuit includes: single-chip microcomputer, first power supply, NAND gate logic chip, triode, PMOS tube and second power supply;

[0008] The NAND gate logic chip includes first input end pin, second input end pin and output end pin;

[0009] The first input end pin is connected with the single-chip microcomputer;The second input end pin is connected with the first power supply;

[0010] The output end pin is connected with the base of the triode, the collector of the triode is connected with the gate of the PMOS tube, and the source of the PMOS tube is connected with the second power supply.

[0011] In a preferred embodiment, the NAND gate logic chip further includes a ground pin.

[0012] In a preferred embodiment, the emitter of the triode is grounded.

[0013] Compared with the prior art, the control circuit has the following beneficial effects:

[0014] The control circuit for controlling a high-voltage power supply has the advantages that the introduction of the NAND gate logic chip solves the problem of high-level power supply on the single-chip microcomputer, leading to power-on timing errors of the power supply device, and the control circuit has strong driving capacity and strong anti-interference capability.

[0015] The control circuit for controlling a high-voltage power supply has the advantages that the introduction of the NAND gate logic chip has good noise tolerance, can effectively filter out small-amplitude noise or interference from the input signal, and avoids misoperation. In particular, in a noisy industrial environment or power circuit, the introduction of the NAND gate logic chip increases the stability and reliability of the system.

[0016] The control circuit for controlling a high-voltage power supply can realize electrical isolation, avoid direct influence of the high-voltage power supply on the control circuit, has high stability, strong anti-interference capability, and a fault protection mechanism. The control circuit has low device cost, no life limit, and is suitable for scenarios with long product life, high stability, and strong anti-interference capability. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings needed to be used in the specific embodiments or prior art description. Obviously, the drawings in the following description are some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0018] Figure 1 is a structural schematic diagram of the control circuit for controlling a high-voltage power supply. DETAILED DESCRIPTION

[0019] In order to make the above and other features and advantages of the present application clearer, the following further describes the present application with reference to the drawings. It should be understood that the specific embodiments given herein are for the purpose of explanation and are only exemplary, not limiting.

[0020] In combination with Figure 1The utility model discloses an embodiment provides a control circuit of low level control high voltage power supply, and it includes: singlechip (MCU) 1, first power supply 2, NAND gate logic chip 3, triode 4, PMOS tube 5 and second power supply 6.

[0021] NAND gate logic chip 3 includes first input end pin 31, second input end pin 32, output end pin 33 and ground end pin 34.

[0022] Triode 4 includes base B, collector C and emitter E, and PMOS tube 5 includes gate G, drain D and source S.

[0023] The first input end pin 31 of NAND gate logic chip 3 is connected with singlechip 1, the second input end pin 32 of NAND gate logic chip 3 is connected with first power supply 2, the output end pin 33 of NAND gate logic chip 3 is connected with the base B of triode 4, and the ground end pin 34 of NAND gate logic chip 3 is grounded.

[0024] The collector C of triode 4 is connected with the gate G of PMOS tube 5, the emitter E of triode 4 is grounded, and the source S of PMOS tube 5 is connected with second power supply 6.

[0025] The working process of the control circuit of low level control high voltage power supply is described below.

[0026] When singlechip 1 outputs low level (0V-0.8V voltage) after power on, the low level (0V-0.8V voltage) output by singlechip 1 is input into NAND gate logic chip 3 through the first input end pin 31 of NAND gate logic chip 3, and the first power supply outputs high level (for example, 3.3V voltage), and the high level (for example, 3.3V voltage) output by the first power supply 2 is input into NAND gate logic chip 3 through the second input end pin 32 of NAND gate logic chip 3.

[0027] NAND gate logic chip 3 performs logic control on the low level (0V-0.8V low voltage) input by singlechip 1 and the high level (for example, 3.3V voltage) input by the first power supply 2, and outputs high level (greater than 0.8V voltage) through the output end pin 33.

[0028] The high level (greater than 0.8V voltage) output by NAND gate logic chip 3 is input into the base B of triode 4 to trigger triode 4 to conduct, and the collector C of triode 4 outputs low level (for example, 0V voltage).

[0029] The low level (for example, 0V voltage) output by the collector C of the triode 4 is input to the gate G of the PMOS tube 5, and the PMOS tube 5 is triggered to be turned on. The second power supply 6 (high voltage power supply) outputs a high voltage (for example, 5V voltage), and the source S of the PMOS tube 5 is input, and the drain D of the PMOS tube 5 outputs a high voltage (for example, 5V voltage) after being turned on.

[0030] When the single-chip microcomputer 1 outputs a high level (voltage greater than 0.8V) after being powered on, the high level (voltage greater than 0.8V) output by the single-chip microcomputer 1 is input to the NAND logic chip 3 through the first input end pin 31 of the NAND logic chip 3, and the first power supply outputs a high level (for example, 3.3V voltage), and the high level (for example, 3.3V voltage) output by the first power supply is input to the NAND logic chip 3 through the second input end pin 32 of the NAND logic chip 3.

[0031] The NAND logic chip 3 performs logic control on the high level (voltage greater than 0.8V) input by the single-chip microcomputer 1 and the high level (for example, 3.3V voltage) input by the first power supply 2, and outputs a low level (0V-0.8V voltage) through the output end pin 33.

[0032] The low level (0V-0.8V voltage) output by the NAND logic chip 3 is input to the base B of the triode 4, the triode 4 is not turned on, and the collector C of the triode 4 outputs a high level (voltage greater than 0.8V).

[0033] The high level (voltage greater than 0.8V) output by the collector C of the triode 4 is input to the gate G of the PMOS tube 5, the PMOS tube 5 is not turned on, the second power supply 6 (high voltage power supply) is isolated, and the PMOS tube 5 does not output a high voltage (for example, 5V voltage).

[0034] The control logic of the NAND logic chip 3 is not specifically limited, and those skilled in the art can select a suitable NAND logic chip 3 according to the above control logic.

[0035] When the single-chip microcomputer 1 outputs a high level (voltage greater than 0.8V) after being powered on, the single-chip microcomputer 1 can realize electrical isolation, avoid the direct influence of the high voltage power supply (the second power supply 6) on the control circuit, and has high stability, strong anti-interference ability and fault protection mechanism.

[0036] Although the embodiments of the utility model have been shown and described above, it can be understood that the above-mentioned embodiments are exemplary, and cannot be understood as limiting the utility model, and those skilled in the art can change, modify, replace and transform the above-mentioned embodiments within the scope of the utility model.

Claims

1. A control circuit for controlling a high voltage power supply from a low level, characterized by The control circuit comprises a single-chip microcomputer, a first power supply, a NAND logic chip, a transistor, a PMOS tube and a second power supply; The NAND logic chip comprises a first input terminal pin, a second input terminal pin and an output terminal pin; The first input terminal pin is connected to the single-chip microcomputer; and the second input terminal pin is connected to the first power supply. The output terminal pin is connected to the base of the transistor, the collector of the transistor is connected to the gate of the PMOS tube, and the source of the PMOS tube is connected to the second power supply.

2. The control circuit of claim 1, wherein, The NAND logic chip further comprises a ground terminal pin.

3. The control circuit of claim 1, wherein, The emitter of the transistor is grounded.

Images