Reverse connection detection circuit of live line and zero line and intelligent electric energy meter

Abstract

The reverse connection detection circuit comprises an induction coil, a signal amplification circuit and a voltage division circuit, the induction coil is arranged above an analog ground copper layer in a detected circuit board, the induction coil is connected with an input end of the signal amplification circuit, and the signal amplification circuit is connected with an output end of the voltage division circuit. The output end of the signal amplification circuit is connected with the input end of the voltage division circuit, the output end of the voltage division circuit is connected with the processor, and the analog ground copper layer is used for representing a circuit layer with a live wire; the induction coil is used for inducing the analog ground copper layer to generate an induction signal and outputting the induction signal to the signal amplification circuit, the signal amplification circuit is used for amplifying the induction signal, generating an amplified signal and outputting the amplified signal to the voltage division circuit, and the voltage division circuit processes the amplified signal and outputs the amplified signal to the processor. Voltage division is performed through the voltage division circuit, so that overvoltage and electrostatic damage of an IO port of the processor are prevented; reverse connection can be timely found and corrected by using the intelligent electric energy meter, and metering accuracy is ensured.

Description

Technical Field

[0001] This utility model relates to the field of smart energy meter technology, and in particular to a reverse connection detection circuit for live and neutral wires and a smart energy meter. Background Technology

[0002] In existing power systems, traditional electricity meters primarily focus on energy measurement, lacking effective means to detect line connection status, particularly whether the live and neutral wires are reversed. With the development of intelligent power systems, this limitation is becoming increasingly apparent.

[0003] The existing technology uses a detection device to detect whether the live and neutral wires are reversed, but this is not compatible with the functions of existing smart meters and the detection accuracy is not accurate enough. Summary of the Invention

[0004] This utility model provides a reverse connection detection circuit for live and neutral wires and a smart energy meter to solve the problems of existing energy meters being incompatible and having insufficient detection accuracy.

[0005] To achieve the above objectives, in one embodiment, a reverse connection detection circuit for live and neutral wires is provided, comprising: an induction coil, a signal amplification circuit, and a voltage divider circuit, wherein the induction coil is disposed above a simulated ground copper layer in the circuit board under test, the induction coil is connected to the input terminal of the signal amplification circuit, the output terminal of the signal amplification circuit is connected to the input terminal of the voltage divider circuit, the output terminal of the voltage divider circuit is connected to a processor, and the simulated ground copper layer is used to represent a circuit layer with a live wire;

[0006] The induction coil is used to sense the simulated ground copper layer to generate an induction signal, and outputs the induction signal to the signal amplification circuit. The signal amplification circuit is used to amplify the induction signal to generate an amplified signal, and outputs the amplified signal to the voltage divider circuit. The voltage divider circuit processes the amplified signal and outputs it to the processor.

[0007] The aforementioned reverse connection detection circuit for live and neutral wires improves detection accuracy by placing the induction coil above the simulated ground copper layer, enabling the coil to more accurately sense the live wire and generate an induction signal. After the induction signal is amplified by the signal amplification circuit, a voltage divider circuit is used to divide the signal output to the processor. This protects the sampling signal input to the processor without affecting the normal signal, preventing overvoltage and electrostatic damage to the I / O port, thus ensuring compatibility of the detection circuit with the energy meter.

[0008] In one embodiment, no other components or neutral wire circuits in the circuit board under test are installed within a preset distance range of the induction coil.

[0009] In one embodiment, the detection circuit further includes a coupling capacitor, the input terminal of which is connected to the output terminal of the induction coil, and the output terminal of which is connected to the input terminal of the signal amplification circuit.

[0010] In one embodiment, the induction coil is used to sense an induced signal generated by the simulated ground copper layer, including: generating an equivalent capacitance between the induction coil and the simulated ground copper layer, wherein the value of the equivalent capacitance is calculated using the following expression:

[0011] kd,

[0012] in, Let be the value of the equivalent capacitance. Where is the dielectric constant. The area of ​​the induction coil projected onto the simulated ground copper layer and the area directly opposite the simulated ground copper layer are defined as follows: Pi Boltzmann's constant, The relative distance between the induction coil and the projection of the induction coil onto the simulated ground copper layer.

[0013] In one embodiment, an equivalent capacitance is generated between the induction coil and the simulated ground copper layer. The equivalent capacitance also generates a capacitive reactance, the value of which is calculated using the following expression:

[0014] ,

[0015] in, The value of the capacitive reactance, Pi For alternating current frequency, The value of the equivalent capacitance is given.

[0016] In one embodiment, the signal amplification circuit includes: a first-stage amplification circuit, a second-stage amplification circuit, and a third-stage amplification circuit, wherein the input terminal of the first-stage amplification circuit is connected to the coupling capacitor, the output terminal of the first-stage amplification circuit is connected to the input terminal of the second-stage amplification circuit, the output terminal of the second-stage amplification circuit is connected to the input terminal of the third-stage amplification circuit, and the output terminal of the third-stage amplification circuit is connected to the input terminal of the voltage divider circuit.

[0017] In one embodiment, the first-stage amplifier circuit includes: a first transistor and a first bias resistor, wherein the base of the first transistor is connected to the output terminal of the coupling capacitor, the collector of the first transistor is connected to one end of the first bias resistor, the emitter of the first transistor is connected to the analog ground copper layer, and the other end of the first bias resistor is connected to the second-stage amplifier circuit.

[0018] The second-stage amplifier circuit includes: a second transistor and a second bias resistor. The base of the second transistor is connected to the output terminal of the first-stage amplifier circuit and one end of the second bias resistor. The emitter of the second transistor and the other end of the second bias resistor are connected to the power supply in the circuit board under test. The collector of the second transistor is connected to the third-stage amplifier circuit.

[0019] The three-stage amplifier circuit includes a third transistor and a third bias resistor. One end of the third bias resistor is connected to the output terminal of the second-stage amplifier circuit, and the other end of the third bias resistor is connected to the base of the third transistor. The emitter of the third transistor is connected to the analog ground copper layer, and the collector of the third transistor is connected to the input terminal of the voltage divider circuit.

[0020] In one embodiment, the voltage divider circuit includes: a first voltage divider resistor and a second voltage divider resistor, one end of the first voltage divider resistor is connected to the power supply in the circuit board under test, the other end of the first voltage divider resistor is connected to the output terminal of the signal amplification circuit, one end of the second voltage divider resistor is connected to the output terminal of the signal amplification circuit and the processor, and the other end of the second voltage divider resistor is connected to the analog ground copper layer in the circuit board under test.

[0021] In one embodiment, the detection circuit further includes a current-limiting resistor and a filter capacitor. One end of the current-limiting resistor is connected to the output terminal of the signal amplification circuit and the other end of the first voltage divider resistor. The other end of the current-limiting resistor is connected to the processor. One end of the filter capacitor is connected to the voltage divider circuit and the processor. The other end of the filter capacitor is connected to the simulated ground copper layer in the circuit board under test.

[0022] In one embodiment, a smart energy meter is provided, comprising: an energy meter housing, a circuit board disposed in the energy meter housing, a reverse connection detection circuit for the live and neutral wires disposed in the circuit board's wiring layer, and an output terminal of the voltage divider circuit connected to a processor disposed on the circuit board.

[0023] The aforementioned smart meters, by incorporating detection circuits within the meters, can promptly detect and correct reverse connection errors, ensuring metering accuracy, preventing economic losses for users and power companies, effectively preventing safety accidents and electricity theft, and safeguarding electricity safety. Attached Figure Description

[0024] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments of this utility model will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a schematic diagram of the connection of each part in the reverse connection detection circuit of the live and neutral wires in one embodiment of this utility model;

[0026] Figure 2 This is a schematic diagram showing the specific connections of each part in the reverse connection detection circuit of the live and neutral wires in one embodiment of this utility model;

[0027] Figure 3 This is a schematic diagram of the specific connection of the reverse connection detection circuit of the live and neutral wires in one embodiment of this utility model;

[0028] Figure 4 This is a waveform diagram of the live and neutral wires being connected in one embodiment of this utility model;

[0029] Figure 5 This is a waveform diagram of the live and neutral wires reversed in one embodiment of this utility model.

[0030] Figure descriptions: 1. Induction coil; 2. Signal amplification circuit; 201. First-stage amplification circuit; 202. Second-stage amplification circuit; 203. Third-stage amplification circuit; 3. Voltage divider circuit; 4. Coupling capacitor. Detailed Implementation

[0031] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present utility model.

[0032] It should be understood that this invention can be embodied in various forms and should not be construed as being limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of this invention to those skilled in the art. In the drawings, for clarity, the dimensions of layers and regions, as well as their relative dimensions, may be exaggerated. The same reference numerals denote the same elements throughout.

[0033] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this utility model, the first element, component, area, layer, or portion discussed below may be referred to as the second element, component, area, layer, or portion.

[0034] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below,” “under,” or “below” other elements or features will be oriented “above” other elements or features. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.

[0035] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of the invention. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0036] To fully understand this utility model, detailed structures and steps will be presented in the following description to illustrate the technical solution proposed by this utility model. Preferred embodiments of this utility model are described in detail below; however, in addition to these detailed descriptions, this utility model may have other embodiments.

[0037] In one embodiment, a reverse connection detection circuit for live and neutral wires is provided, comprising: an induction coil, a signal amplification circuit, and a voltage divider circuit, wherein the induction coil is disposed above a simulated ground copper layer in the circuit board under test, the induction coil is connected to the input terminal of the signal amplification circuit, the output terminal of the signal amplification circuit is connected to the input terminal of the voltage divider circuit, the output terminal of the voltage divider circuit is connected to a processor, and the simulated ground copper layer is used to represent a circuit layer with a live wire;

[0038] The induction coil is used to sense the simulated ground copper layer to generate an induction signal, and outputs the induction signal to the signal amplification circuit. The signal amplification circuit is used to amplify the induction signal to obtain an amplified signal, and outputs the amplified signal to the voltage divider circuit. The voltage divider circuit processes the amplified signal and outputs it to the processor.

[0039] Among them, such as Figure 1 As shown, induction coil 1 is used to sense the analog ground copper layer GND to generate an induction signal. The output terminal of induction coil 1 is connected to the input terminal of signal amplification circuit 2, and the output terminal of signal amplification circuit 2 is connected to the input terminal of voltage divider circuit 3. Signal amplification circuit 2 is used to amplify the signal sensed by induction coil 1 and output the amplified signal to voltage divider circuit 3. The output terminal of voltage divider circuit 3 is connected to processor MCU. Voltage divider circuit 3 processes the amplified signal output by signal amplification circuit 2 and then outputs it to processor MCU.

[0040] In this embodiment, an induction coil and a voltage divider circuit are set up in the reverse connection detection circuit of the live and neutral wires. The induction coil senses and couples with the simulated ground copper layer in the circuit board under test to generate a precise induction signal. After the induction signal is amplified by the signal amplification circuit, the signal output to the processor is further divided by the voltage divider circuit. This protects the sampling signal input to the MCU from overvoltage and electrostatic damage to the I / O port without affecting the normal signal, making the detection circuit compatible with the energy meter. By using a non-contact induction coil to detect the signal of the simulated ground copper layer, there is no need to directly contact the live wire, which improves the safety of the detection. Moreover, the induction coil is very sensitive to changes in the signal of the simulated ground copper layer and can accurately sense them, ensuring the accuracy of the detection results.

[0041] In one embodiment, no other components or neutral wire circuits in the circuit board under test are installed within a preset distance range of the induction coil.

[0042] In order to ensure that the induction signal output by the induction coil 1 to the signal amplification circuit 2 is more accurate, the area around the coil 1 should be kept open and away from other plug-in materials and neutral wire circuits in the circuit board under test.

[0043] In this embodiment, by omitting other components and neutral wire circuits from the circuit board under test within a preset distance range of the induction coil, the area around the induction coil is kept as open as possible. This results in a larger and more accurate induced signal output by the induction coil to the amplification circuit, enabling the amplification circuit to more accurately identify and amplify the induced signal. This allows the reverse connection detection circuit for the live and neutral wires to detect their states more sensitively, improving the reliability and accuracy of the detection circuit.

[0044] In one embodiment, the detection circuit further includes a coupling capacitor, the input terminal of which is connected to the output terminal of the induction coil, and the output terminal of which is connected to the input terminal of the signal amplification circuit.

[0045] Among them, such as Figure 1 As shown, the input terminal of coupling capacitor 4 is connected to the output terminal of induction coil 1, and the output terminal of coupling capacitor 1 is connected to the input terminal of signal amplification circuit 2. Coupling capacitor 1 is used to isolate the DC signal induced by induction coil 1, and only transmit the AC signal to the signal amplification circuit for amplification.

[0046] In this embodiment, by setting a coupling capacitor, the DC interference signal output by the induction coil is filtered out, and only the AC signal is allowed. This allows the amplifier circuit to amplify and process the AC signal more efficiently, making the detection result of the reverse connection detection circuit of the live and neutral wires more accurate. At the same time, it avoids the potential damage of the detection circuit to the DC signal and extends the service life of the reverse connection detection circuit of the live and neutral wires.

[0047] In one embodiment, the induction coil is used to sense an induced signal generated by the simulated ground copper layer, including: generating an equivalent capacitance between the induction coil and the simulated ground copper layer, wherein the value of the equivalent capacitance is calculated using the following expression:

[0048] kd,

[0049] in, Let be the value of the equivalent capacitance. Where is the dielectric constant. The area of ​​the induction coil projected onto the simulated ground copper layer and the area directly opposite the simulated ground copper layer are defined as follows: Pi Boltzmann's constant, The relative distance between the induction coil and the projection of the induction coil onto the simulated ground copper layer.

[0050] In the reverse connection detection circuit of the live and neutral wires, an induction coil is set to sense the signal. The position, length and diameter of the induction coil are appropriately adjusted by the circuit board and the expression to make the induction signal generated by the induction coil more accurate.

[0051] In one embodiment, an equivalent capacitance is generated between the induction coil and the simulated ground copper layer. The equivalent capacitance also generates a capacitive reactance, the value of which is calculated using the following expression:

[0052] ,

[0053] in, The value of the capacitive reactance, Pi For alternating current frequency, The value of the equivalent capacitance is given.

[0054] In this circuit, an equivalent capacitance is generated between the induction coil and the simulated ground copper layer. This equivalent capacitance produces capacitive reactance. The smaller the capacitive reactance, the larger the current flowing through it. To ensure the accuracy of the detection circuit results, the capacitive reactance generated by the induction capacitor must be minimized. As shown in the above expression, at the AC frequency... Under certain conditions, the value of the equivalent capacitance The larger the value, the smaller the capacitive reactance. Combining this with the expression for the equivalent capacitance, it can be seen that the relative distance between the induction coil and the induction coil projected onto the simulated ground copper layer... The smaller the area, the more the area of ​​the induction coil projected onto the simulated ground copper layer and the area directly opposite the simulated ground copper layer. The larger the value, the smaller the resulting capacitive reactance.

[0055] In this embodiment, by reasonably setting the parameters of the induction coil, the influence of external interference on the reverse connection detection circuit of the live and neutral wires can be reduced, so that the signal generated by the induction coil and output to the signal amplification circuit is larger, thereby improving the stability and accuracy of the detection.

[0056] In one embodiment, the signal amplification circuit includes: a first-stage amplification circuit, a second-stage amplification circuit, and a third-stage amplification circuit, wherein the input terminal of the first-stage amplification circuit is connected to the coupling capacitor, the output terminal of the first-stage amplification circuit is connected to the input terminal of the second-stage amplification circuit, the output terminal of the second-stage amplification circuit is connected to the input terminal of the third-stage amplification circuit, and the output terminal of the third-stage amplification circuit is connected to the input terminal of the voltage divider circuit.

[0057] Among them, such as Figure 2 As shown, the input terminal of the first-stage amplifier circuit 201 is connected to the coupling capacitor 4, the output terminal of the first-stage amplifier circuit 201 is connected to the input terminal of the second-stage amplifier circuit 202, the output terminal of the second-stage amplifier circuit 202 is connected to the input terminal of the third-stage amplifier circuit 203, and the output terminal of the third-stage amplifier circuit 203 is connected to the input terminal of the voltage divider circuit 3.

[0058] In this embodiment, a high gain of signal amplification is achieved by setting a three-stage amplification circuit. The detection circuit amplifies the tiny signal sensed by the induction coil to a sufficient size and outputs it to the processor MCU for analysis and processing.

[0059] In one embodiment, the first-stage amplifier circuit includes: a first transistor and a first bias resistor, wherein the base of the first transistor is connected to the output terminal of the coupling capacitor, the collector of the first transistor is connected to one end of the first bias resistor, the emitter of the first transistor is connected to the analog ground copper layer, and the other end of the first bias resistor is connected to the second-stage amplifier circuit.

[0060] The second-stage amplifier circuit includes: a second transistor and a second bias resistor. The base of the second transistor is connected to the output terminal of the first-stage amplifier circuit and one end of the second bias resistor. The emitter of the second transistor and the other end of the second bias resistor are connected to the power supply in the circuit board under test. The collector of the second transistor is connected to the third-stage amplifier circuit.

[0061] The three-stage amplifier circuit includes a third transistor and a third bias resistor. One end of the third bias resistor is connected to the output terminal of the second-stage amplifier circuit, and the other end of the third bias resistor is connected to the base of the third transistor. The emitter of the third transistor is connected to the analog ground copper layer, and the collector of the third transistor is connected to the input terminal of the voltage divider circuit.

[0062] Among them, such as Figure 2 As shown, since the signal after coupling capacitor 4 is relatively small, the first transistor Q1 should be a small signal transistor. The first transistor Q1 and the first bias resistor R1 form a first-stage amplifier circuit 201. The base B of the first transistor Q1 is connected to the output terminal of coupling capacitor 4, the collector C of the first transistor Q1 is connected to one end of the first bias resistor R1, the emitter E of the first transistor Q1 is connected to the analog ground copper layer GND, and the other end of the first bias resistor R1 is connected to the second-stage amplifier circuit 202.

[0063] The second transistor Q2 and the second bias resistor R2 form a second-stage amplifier circuit 202. The base B of the second transistor Q2 is connected to the output terminal of the first-stage amplifier circuit 201 and one end of the second bias resistor R2. The emitter E of the second transistor Q2 and the other end of the second bias resistor R2 are connected to the power supply VCC in the circuit board under test. The collector C of the second transistor Q2 is connected to the third-stage amplifier circuit 203.

[0064] The third transistor Q3 and the third bias resistor R3 form a three-stage amplifier circuit 203. One end of the third bias resistor R6 is connected to the output terminal of the second-stage amplifier circuit 202, and the other end of the third bias resistor R5 is connected to the base B of the third transistor Q3. The emitter E of the third transistor Q3 is connected to the analog ground copper layer GND, and the collector C of the third transistor Q3 is connected to the input terminal of the voltage divider circuit 3.

[0065] In this embodiment, the first bias resistor, the second bias resistor, and the third bias resistor provide suitable static operating voltages for the first, second, and third transistors, respectively, enabling each transistor to operate in amplification mode. This amplifies the signal output to the signal amplification circuit after passing through the coupling capacitor, and then outputs it to the voltage divider circuit. According to the transistor amplification factor formula: Amplify the AC signal.

[0066] in, This is the collector-C current of the transistor. This is the base current (B-terminal) of the transistor. This represents the amplification factor of the transistor. Optional: amplification factor of hFE80 for the first transistor, hFE80 for the second transistor, and hFE150 for the third transistor.

[0067] The working principle of the signal amplification circuit in this embodiment is as follows:

[0068] like Figure 2 As shown, when the base of the first transistor Q1 in the first-stage amplifier circuit 201 receives the induced signal output by the coupling capacitor 4, optionally, if the AC voltage induced by the coil 1 is about 18V, since the output terminal of the coupling capacitor 4 is connected to the base B of the first transistor Q1 and is at the same potential, if the live wire input voltage is 220V, then the voltage across the coupling capacitor 4 is about 202V. Setting the capacitance value of the coupling capacitor 4 to 100pF, according to the above capacitive reactance formula, the capacitive reactance of the coupling capacitor 4 is 31.8MΩ. Therefore, the current at the base B of the first transistor Q1 is about 6.5uA. After amplification by the first-stage amplifier circuit, the collector C of the first transistor Q1 outputs the amplified AC current to the base B of the second transistor Q2 in the second-stage amplifier circuit 202. After passing through the second-stage amplifier circuit 202, the collector C of the second transistor Q2 outputs the AC current to the base B of the third transistor Q3 in the third-stage amplifier circuit 203. After amplification by the third-stage amplifier circuit, the AC current is output again.

[0069] The signal amplification circuit in this embodiment amplifies and conditions the signal step by step through a three-stage amplification circuit. In the first-stage amplification circuit, the amplification factor is appropriately controlled to avoid excessive amplification of noise. In the second-stage amplification circuit, the signal can be further amplified. In the third-stage amplification circuit, the total amplification factor of the circuit can be finely adjusted to adapt to different needs and ensure that the signal maintains high quality during transmission and processing. Since each stage of the amplification circuit can be precisely controlled, the use of a three-stage amplification circuit can provide high precision and ensure the accuracy of the signal.

[0070] In one embodiment, the voltage divider circuit includes: a first voltage divider resistor and a second voltage divider resistor, one end of the first voltage divider resistor is connected to the power supply in the circuit board under test, the other end of the first voltage divider resistor is connected to the output terminal of the signal amplification circuit, one end of the second voltage divider resistor is connected to the output terminal of the signal amplification circuit and the processor, and the other end of the second voltage divider resistor is connected to the analog ground copper layer in the circuit board under test.

[0071] Among them, such as Figure 3 As shown, the voltage divider circuit 4 includes a first voltage divider resistor R3 and a second voltage divider resistor R5. One end of the first voltage divider resistor R3 is connected to the power supply VCC in the circuit board under test, and the other end of the first voltage divider resistor R3 is connected to the output terminal of the three-stage amplifier circuit 203 in the signal amplifier circuit. One end of the second voltage divider resistor R5 is connected to the output terminal of the three-stage amplifier circuit 203 in the signal amplifier circuit and the processor MCU, and the other end of the second voltage divider resistor R5 is connected to the analog ground copper layer GND in the circuit board under test.

[0072] In this embodiment, since the processor's input port has a certain voltage limit, a voltage divider circuit is set to reduce the voltage of the output signal to an acceptable range for the processor, thereby avoiding damage to the processor from high voltage. This ensures that the signal received by the processor can accurately reflect the status of the live and neutral wires, which helps to accurately determine whether the live and neutral wires are reversed, improving the accuracy of detection. Setting up a voltage divider circuit can avoid using additional voltage conversion circuits or components at the processor's input port, which not only simplifies circuit design and reduces costs, but also improves the reliability and stability of the circuit.

[0073] In one embodiment, the detection circuit further includes a current-limiting resistor and a filter capacitor. One end of the current-limiting resistor is connected to the output terminal of the signal amplification circuit and the other end of the first voltage divider resistor. The other end of the current-limiting resistor is connected to the processor. One end of the filter capacitor is connected to the voltage divider circuit and the processor. The other end of the filter capacitor is connected to the simulated ground copper layer in the circuit board under test.

[0074] Among them, such as Figure 3As shown, the reverse connection detection circuit for the live and neutral wires also includes a current-limiting resistor R4 and a filter capacitor C2. One end of the current-limiting resistor R4 is connected to the output terminal of the three-stage amplifier circuit 203 in the signal amplifier circuit and the other end of the first voltage divider resistor R3. The other end of the current-limiting resistor R4 is connected to the processor MCU. One end of the filter capacitor C2 is connected to one end of the second voltage divider resistor R5 in the voltage divider circuit 4 and the processor MCU. The other end of the filter capacitor C2 is connected to the analog ground copper layer GND in the circuit board under test.

[0075] In this embodiment, a current-limiting resistor is set to reduce the current, maintain the stability of the output voltage, protect the processor from damage caused by high current and overheating, and ensure the accuracy and reliability of the detection circuit results; a filter capacitor is set to filter out high-frequency noise signals, ensuring that the signal received by the processor is purer and more stable, which helps to improve the accuracy and reliability of the reverse connection detection results of the live and neutral wires.

[0076] In one embodiment, a smart energy meter is provided, comprising: an energy meter housing, a circuit board disposed in the energy meter housing, a reverse connection detection circuit for the live and neutral wires disposed in the circuit board's wiring layer, and an output terminal of the voltage divider circuit connected to a processor disposed on the circuit board.

[0077] The working process of the above-mentioned smart energy meter is as follows:

[0078] When the live and neutral wires are connected correctly, the live wire receives the mains voltage, resulting in a 50Hz AC signal to the neutral and ground wires. An equivalent capacitance is generated between the induction coil and the live wire. After passing through a coupling capacitor, a weak AC voltage and current signal are induced at the base of the first transistor in the first-stage amplifier circuit. The AC current signal is at the μA level. The AC current signal is amplified according to the transistor's gain. After amplification by the third-stage amplifier circuit, a 50Hz low-level waveform is generated at the third transistor in the third-stage amplifier circuit, as shown in the waveform below. Figure 4 As shown, the waveform will be sent to the processor for judgment and analysis.

[0079] When the live and neutral wires are reversed, theoretically there should be no induced voltage between the induction coil and the neutral wire. However, due to the presence of parasitic capacitance, the measured induced voltage between the induction coil and the neutral wire is low, around 0.6V. Therefore, the base of the first transistor in the first-stage amplifier circuit cannot sense a valid power frequency AC signal, and the first and second-stage amplifier circuits cannot amplify the signal. The third transistor in the third-stage amplifier circuit is in the cutoff state, and its collector voltage is the power supply VCC on the circuit board, generating a high-level waveform, as shown in the figure. Figure 5 As shown, the data is then sent to the processor for judgment, analysis, and processing.

[0080] After the processor receives the waveform, it checks for a low level every 20ms:

[0081] When the live and neutral wires are connected in the correct order, at least one low-level signal will be generated in each cycle.

[0082] When the live and neutral wires are reversed, no low-level signal appears within one cycle. At this time, the processor's internal register sets the live / neutral wire reversed status flag. To prevent false alarms, the program continuously monitors the status for 10 seconds. If a high-level signal is continuously output, it indicates that a live / neutral wire reversed connection has occurred. When a live / neutral wire reversed connection is detected, an alarm mechanism is triggered. The alarm can be triggered by flashing indicator lights on the electricity meter or by sending the alarm signal to the power management system's monitoring platform. Simultaneously, the electricity meter can be controlled according to preset strategies. Optionally, in severe cases of live / neutral wire reversed connection, the electricity meter can be controlled to automatically disconnect the circuit, and after the reversed connection is resolved, the electricity meter can automatically resume normal operation without much manual intervention.

[0083] In this embodiment, by setting a detection circuit inside the smart energy meter, reverse connection errors can be detected and corrected in a timely manner, ensuring the accuracy of metering, avoiding economic losses to users and power companies, effectively preventing safety accidents and electricity theft, and ensuring electricity safety.

[0084] The above-described embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model, and should all be included within the protection scope of this utility model.

Claims

1. A reverse connection detection circuit for live and neutral wires, characterized in that, include: The circuit includes an induction coil, a signal amplification circuit, and a voltage divider circuit. The induction coil is positioned above a simulated ground copper layer on the circuit board under test. The induction coil is connected to the input terminal of the signal amplification circuit. The output terminal of the signal amplification circuit is connected to the input terminal of the voltage divider circuit. The output terminal of the voltage divider circuit is connected to a processor. The simulated ground copper layer is used to represent a circuit layer with live wires. The induction coil is used to sense the simulated ground copper layer to generate an induction signal, and outputs the induction signal to the signal amplification circuit. The signal amplification circuit is used to amplify the induction signal to generate an amplified signal, and outputs the amplified signal to the voltage divider circuit. The voltage divider circuit processes the amplified signal and outputs it to the processor.

2. The detection circuit according to claim 1, characterized in that, No other components or neutral wire circuits are installed on the circuit board under test within a preset distance range of the induction coil.

3. The detection circuit according to claim 1, characterized in that, It also includes: a coupling capacitor, the input terminal of which is connected to the output terminal of the induction coil, and the output terminal of which is connected to the input terminal of the signal amplification circuit.

4. The detection circuit according to claim 1, characterized in that, The induction coil is used to sense the simulated copper ground layer to generate an induced signal, including: generating an equivalent capacitance between the induction coil and the simulated copper ground layer, the value of which is calculated using the following expression: kd, in, Let be the value of the equivalent capacitance. Where is the dielectric constant. The area of ​​the induction coil projected onto the simulated ground copper layer and the area directly opposite the simulated ground copper layer are defined as follows: Pi Boltzmann's constant, The relative distance between the induction coil and the projection of the induction coil onto the simulated ground copper layer.

5. The detection circuit according to claim 4, characterized in that, An equivalent capacitance is generated between the induction coil and the simulated ground copper layer. The equivalent capacitance also generates capacitive reactance, the value of which is calculated using the following expression: ， in, The value of the capacitive reactance, Pi For alternating current frequency, The value of the equivalent capacitance is given.

6. The detection circuit according to claim 3, characterized in that, The signal amplification circuit includes a first-stage amplification circuit, a second-stage amplification circuit, and a third-stage amplification circuit. The input terminal of the first-stage amplification circuit is connected to the coupling capacitor, the output terminal of the first-stage amplification circuit is connected to the input terminal of the second-stage amplification circuit, the output terminal of the second-stage amplification circuit is connected to the input terminal of the third-stage amplification circuit, and the output terminal of the third-stage amplification circuit is connected to the input terminal of the voltage divider circuit.

7. The detection circuit according to claim 6, characterized in that, The first-stage amplifier circuit includes: a first transistor and a first bias resistor. The base of the first transistor is connected to the output terminal of the coupling capacitor, the collector of the first transistor is connected to one end of the first bias resistor, the emitter of the first transistor is connected to the analog ground copper layer, and the other end of the first bias resistor is connected to the second-stage amplifier circuit. The second-stage amplifier circuit includes: a second transistor and a second bias resistor. The base of the second transistor is connected to the output terminal of the first-stage amplifier circuit and one end of the second bias resistor. The emitter of the second transistor and the other end of the second bias resistor are connected to the power supply in the circuit board under test. The collector of the second transistor is connected to the third-stage amplifier circuit. The three-stage amplifier circuit includes a third transistor and a third bias resistor. One end of the third bias resistor is connected to the output terminal of the second-stage amplifier circuit, and the other end of the third bias resistor is connected to the base of the third transistor. The emitter of the third transistor is connected to the analog ground copper layer, and the collector of the third transistor is connected to the input terminal of the voltage divider circuit.

8. The detection circuit according to claim 1, characterized in that, The voltage divider circuit includes: a first voltage divider resistor and a second voltage divider resistor. One end of the first voltage divider resistor is connected to the power supply in the circuit board under test, and the other end of the first voltage divider resistor is connected to the output terminal of the signal amplification circuit. One end of the second voltage divider resistor is connected to the output terminal of the signal amplification circuit and the processor, and the other end of the second voltage divider resistor is connected to the analog ground copper layer in the circuit board under test.

9. The detection circuit according to claim 8, characterized in that, It also includes a current-limiting resistor and a filter capacitor. One end of the current-limiting resistor is connected to the output terminal of the signal amplification circuit and the other end of the first voltage divider resistor. The other end of the current-limiting resistor is connected to the processor. One end of the filter capacitor is connected to the voltage divider circuit and the processor. The other end of the filter capacitor is connected to the simulated ground copper layer in the circuit board under test.

10. A smart energy meter, characterized in that, include: An electricity meter housing, wherein a circuit board is disposed in the electricity meter housing, and the circuit board is disposed in the circuit board as described in any one of claims 1 to 9, wherein the output terminal of the voltage divider circuit is connected to a processor disposed on the circuit board.

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