Substrate structure

By designing blind grooves or blind trenches on the copper foil layer, the problem of liquid tin overflow during soldering is solved, ensuring the reliability of chip fixation and the conductivity of the copper foil layer, while reducing processing costs.

CN223798698UActive Publication Date: 2026-01-13DELTA ELECTRONICS INC(CN)
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Patent Information

Application Number
CN202520295069.5
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-02-24
Publication Date
2026-01-13
Estimated Expiration
2035-02-24

AI Technical Summary

Technical Problem

In semiconductor chip modules, when solder sheets are soldered, the molten tin can easily flow to other chips or electronic components, affecting reliability. Furthermore, the overflowing molten tin reduces the surface area of ​​the copper foil layer, affecting the wire bonding process.

Method used

Blind grooves or trenches are designed on the copper foil layer to prevent liquid tin from overflowing. Blind grooves or trenches are formed by micro-etching process to limit the flow of liquid tin and ensure that the tin sheet does not overflow onto the surface of the upper copper foil layer after melting.

Benefits of technology

It effectively prevents liquid tin from overflowing, maintains the conductivity of the copper foil layer, and reduces processing costs.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to a substrate structure which can be used for arranging a chip, the substrate structure comprises a composite plate, the composite plate comprises a ceramic plate body, an upper copper foil layer and a lower copper foil layer, and the upper copper foil layer and the lower copper foil layer are arranged on the two opposite sides of the ceramic plate body respectively. The upper copper foil layer is provided with a blind groove for correspondingly configuring the chip, a groove bottom surface, an upper surface and a lower surface, the upper surface and the lower surface are opposite, the lower surface is attached to the ceramic plate body, the blind groove is recessed from the upper surface to the lower surface and is not communicated with the lower surface, and the groove bottom surface is arranged in the blind groove and is positioned between the upper surface and the lower surface; therefore, when the chip is welded and fixed by a tin sheet and the tin sheet is melted into a liquid state, the blind groove can be used for blocking and limiting so as to prevent the liquid tin from overflowing to the upper surface of the upper copper foil layer.
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Description

Technical Field

[0001] This application relates to the semiconductor field, and more particularly to a substrate structure. Background Technology

[0002] In semiconductor chip modules, soldering is often used to bond and fix the chips onto composite substrates. These composite substrates consist of at least one copper foil layer bonded to a substrate material such as ceramic, aluminum, bakelite, fiberglass, or plastic. Therefore, tin foil is often used as solder to bond and fix the chips to the copper foil layer of the composite substrate.

[0003] However, during soldering, the solder sheet melts into liquid tin due to the high temperature, causing it to flow and spread across the copper foil layer. Furthermore, as electronic technology advances towards thinner and lighter designs and higher performance, chip modules often use multiple chips and electronic components. Therefore, the molten tin during chip soldering can easily flow to other chips or electronic components, affecting their reliability. In addition, the overflowing liquid tin reduces the surface area of ​​the copper foil layer, impacting the leadable area in the wire bonding process.

[0004] In view of this, the applicant has devoted himself to researching and applying theoretical knowledge to address the shortcomings of the prior art, and has made every effort to solve the above-mentioned problems, which has become the target of the applicant's improvement. Utility Model Content

[0005] The main purpose of this application is to prevent liquid tin from overflowing onto the upper surface of the upper copper foil layer by using blind grooves or first blind trenches when the tin sheet is melted into a liquid state during the soldering and fixing of the chip. Furthermore, the blind grooves and first blind trenches have simple processes and low processing costs.

[0006] To achieve the above objectives, this application provides a substrate structure capable of housing a chip. The substrate structure includes a composite substrate comprising a ceramic plate, an upper copper foil layer, and a lower copper foil layer. The upper copper foil layer and the lower copper foil layer are respectively disposed on opposite sides of the ceramic plate. The upper copper foil layer has a blind groove for corresponding configuration of the chip, a bottom surface of the groove, and an opposite upper surface and a lower surface. The lower surface is attached to the ceramic plate. The blind groove is recessed from the upper surface toward the lower surface and does not communicate with the lower surface. The bottom surface of the groove is disposed within the blind groove and located between the upper surface and the lower surface.

[0007] In one embodiment of this application, the ratio of the depth of the blind groove to the thickness of the upper copper foil layer is 1 / 2.

[0008] In one embodiment of this application, the upper copper foil layer further has a groove sidewall that is vertically connected between the bottom surface of the groove and the upper surface.

[0009] In one embodiment of this application, a tin sheet is further included, which is disposed on the bottom surface of the groove and located within the blind groove, and the chip is disposed on the tin sheet.

[0010] In one embodiment of this application, a first gap is formed between the tin sheet and the sidewall of the groove, the first gap being greater than or equal to 0.05 mm.

[0011] To achieve the above objectives, this application also provides another substrate structure for mounting a chip, wherein the substrate structure includes: a composite substrate comprising a ceramic plate, an upper copper foil layer and a lower copper foil layer, the upper copper foil layer and the lower copper foil layer being respectively disposed on opposite sides of the ceramic plate, the upper copper foil layer having a first blind trench and opposite upper and lower surfaces, the lower surface being attached to the ceramic plate, the first blind trench being recessed from the upper surface toward the lower surface and not communicating with the lower surface, the first blind trench enclosing a portion of the upper surface to form an independent area for corresponding mounting of the chip.

[0012] In one embodiment of this application, the ratio of the depth of the first blind trench to the thickness of the upper copper foil layer is 1 / 2.

[0013] In one embodiment of this application, a tin sheet is further included, which is disposed in the separate area on the upper surface and surrounded by the first blind trench, and the chip is disposed on the tin sheet.

[0014] In one embodiment of this application, a second gap is formed between the tin sheet and the first blind trench, the second gap being greater than or equal to 0.05 mm.

[0015] In one embodiment of this application, the upper copper foil layer further has a second blind trench, which is recessed from the upper surface toward the lower surface and does not communicate with the lower surface, and the second blind trench surrounds the first blind trench.

[0016] In one embodiment of this application, the ratio of the depth of the second blind trench to the thickness of the upper copper foil layer is 1 / 2.

[0017] In one embodiment of this application, a third gap is formed between the second blind trench and the first blind trench, the third gap being greater than or equal to 0.05 mm.

[0018] The substrate structure of this application has blind grooves or first blind trenches formed on the upper copper foil layer. The blind grooves and first blind trenches are recessed from the upper surface of the upper copper foil layer to the lower surface without connecting to the lower surface. Therefore, when the chip is fixed by soldering with tin sheets and the tin sheets are melted into liquid state, the substrate structure can block and restrict the liquid tin through the blind grooves or first blind trenches, thereby preventing the liquid tin from overflowing to the upper surface of the upper copper foil layer. Moreover, the blind grooves and first blind trenches have simple processes and low processing costs. Attached Figure Description

[0019] Figure 1 This is a top view of the first embodiment of this application.

[0020] Figure 2 This is an exploded perspective view of the first embodiment of this application.

[0021] Figure 3 This is a cross-sectional side view of the first embodiment of this application.

[0022] Figure 4 This is a top view of the second embodiment of this application.

[0023] Figure 5 This is a cross-sectional side view of the second embodiment of this application.

[0024] Explanation of reference numerals in the attached figures

[0025] 10: Composite board, 11: Ceramic plate, 12: Upper copper foil layer, 121: Blind groove, 122: Groove bottom, 123: Upper surface, 1231: Independent area, 124: Lower surface, 125: Groove sidewall, 126: First blind trench, 127: Second blind trench, 13: Lower copper foil layer, 20: Tin sheet, 30: Chip, D1: First pitch, D2: Second pitch, D3: Third pitch, H, H1, H2: Depth, T: Thickness. Detailed Implementation

[0026] In the description of this application, it should be understood that the terms "front side", "rear side", "left side", "right side", "front end", "rear end", "end", "longitudinal", "lateral", "vertical", "top", "bottom", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0027] As used herein, terms such as “first,” “second,” “third,” “fourth,” and “fifth” describe various components, parts, regions, hierarchies, and / or sections, which should not be limited by these terms. These terms are used only to distinguish one element, component, region, hierarchy, or section from another. Unless the context clearly indicates otherwise, the use of terms such as “first,” “second,” “third,” “fourth,” and “fifth” herein does not imply order or sequence.

[0028] Unless otherwise defined, the terms "substantially" and "approximately" are used to describe and narrate small changes. When used in connection with an event or situation, the term may include the exact moment the event or situation occurred, or an approximate point in time. For example, when used in connection with a numerical value, the term may include a range of variation less than or equal to ±10% of the value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%.

[0029] The detailed description and technical content of this application will be explained below in conjunction with the accompanying drawings. However, the accompanying drawings are for illustrative purposes only and are not intended to limit the scope of this application.

[0030] This application provides a substrate structure capable of housing a chip 30. Please refer to [the relevant documentation / reference]. Figures 1 to 3 As shown, the first embodiment of this application mainly includes a composite board 10.

[0031] In this embodiment, the composite board 10 is a ceramic circuit board comprising a ceramic plate 11, an upper copper foil layer 12, and a lower copper foil layer 13. However, this application is not limited to this; for example, the composite board 10 can also be a fiberglass board, an aluminum substrate, or other types of circuit boards, depending on the requirements. The upper copper foil layer 12 and the lower copper foil layer 13 are respectively disposed on the upper and lower opposite sides of the ceramic plate 11. In this embodiment, the composite board 10 is manufactured using active metal brazing (AMB) technology to bond the upper copper foil layer 12 and the lower copper foil layer 13 to the opposite sides of the ceramic plate 11. However, this application is not limited to this; for example, the composite board 10 can also be bonded to the opposite sides of the ceramic plate 11 using direct plated copper (DPC), direct bonded copper (DBC), or other methods. The upper copper foil layer 12 of the substrate structure of this application has a blind groove 121, a groove bottom surface 122, and an opposing upper surface 123 and lower surface 124. The blind groove 121 is configured correspondingly to the chip 30. The lower surface 124 is attached to and bonded to the top of the ceramic plate 11, that is, the upper surface 123 is located on the side of the upper copper foil layer 12 away from the ceramic plate 11. The blind groove 121 is recessed from the upper surface 123 of the upper copper foil layer 12 toward the lower surface 124 and the blind groove 121 does not communicate with the lower surface 124, that is, the blind groove 121 does not penetrate the upper copper foil layer 12. The groove bottom surface 122 is disposed in the blind groove 121 and is located between the upper surface 123 and the lower surface 124. In this embodiment, the groove bottom surface 122 is substantially parallel to the upper surface 123 and the lower surface 124, but this application is not limited thereto.

[0032] In this embodiment, the substrate structure of this application further includes a tin sheet 20. The tin sheet 20 is disposed on the bottom surface 122 of the groove, and the tin sheet 20 is located within the blind groove 121. In other words, the bottom area of ​​the tin sheet 20 is smaller than the area of ​​the blind groove 121. The chip 30 is disposed on the tin sheet 20, that is, the chip 30 is located on the side of the tin sheet 20 away from the upper copper foil layer 12. Specifically, the chip 30 is bonded and fixed to the upper copper foil layer 12 by means of the tin sheet 20, that is, the chip 30 is soldered into the blind groove 121 of the upper copper foil layer 12 by melting the tin sheet 20 into liquid tin at high temperature. Thus, since the tin sheet 20 is located within the blind groove 121 and its bottom area is smaller than the area of ​​the blind groove 121, the tin sheet 20, after melting into liquid tin, will be blocked and restricted by the blind groove 121 and will not overflow to the upper surface 123 of the upper copper foil layer 12.

[0033] To further explain, the blind groove 121 of this application is formed on the upper copper foil layer 12 using a micro-etching (semi-etching) process, thereby ensuring that the blind groove 121 does not penetrate the upper copper foil layer 12. The ratio of the depth H of the blind groove 121 to the thickness T of the upper copper foil layer 12 is between 0.1 and 1. In this embodiment, the ratio of the depth H of the blind groove 121 to the thickness T of the upper copper foil layer 12 is approximately 1 / 2, thereby ensuring that liquid solder does not overflow to the upper surface 123 of the upper copper foil layer 12 during soldering of the solder sheet 20, while maintaining good conductivity of the upper copper foil layer 12. However, this application is not limited to this. In other words, the ratio of the depth H of the blind groove 121 to the thickness T of the upper copper foil layer 12 can also be approximately 0.2, 0.3, 0.4, 0.6, 0.7, 0.8, 0.9, or any range between the above.

[0034] The upper copper foil layer 12 also has a groove sidewall 125. In this embodiment, the groove sidewall 125 is substantially vertically connected between the bottom surface 122 and the upper surface 123 of the groove, but this application is not limited thereto. A first gap D1 is formed between the tin sheet 20 and the groove sidewall 125. Through the inventors' experiments, when the first gap D1 is greater than or equal to 0.05 mm, the blind groove 121 can effectively block and restrict the molten liquid tin to prevent it from overflowing to the upper surface 123 of the upper copper foil layer 12. In this embodiment, the tin sheet 20 is approximately located at the center of the blind groove 121, so the first gap D1 between the periphery of the tin sheet 20 and the groove sidewall 125 is approximately the same, but this application is not limited thereto. It should be noted that, depending on the soldering skill of the soldering personnel or the distance of the first gap D1, the tin sheet 20, after being soldered and re-cooled and solidified, may no longer have a gap with the groove sidewall 125, or may have a gap shorter than the first gap D1. For example, when the first pitch D1 is long (e.g., the first pitch D1 is greater than 10 mm), the molten liquid tin will not come into contact with the groove sidewall 125 even if it flows.

[0035] This application also provides another substrate structure, namely the second embodiment of this application. The substrate structure of this embodiment can also accommodate a chip 30. Please refer to... Figures 4 to 5 As shown, it mainly includes a composite board 10.

[0036] In this embodiment, the composite board 10 is a ceramic circuit board comprising a ceramic plate 11, an upper copper foil layer 12, and a lower copper foil layer 13. However, this application is not limited to this; for example, the composite board 10 can also be a fiberglass board, an aluminum substrate, or other types of circuit boards, depending on the requirements. The upper copper foil layer 12 and the lower copper foil layer 13 are respectively disposed on the upper and lower opposite sides of the ceramic plate 11. In this embodiment, the composite board 10 is manufactured using active metal brazing (AMB) technology to bond the upper copper foil layer 12 and the lower copper foil layer 13 to the opposite sides of the ceramic plate 11. However, this application is not limited to this; for example, the composite board 10 can also be bonded to the opposite sides of the ceramic plate 11 using direct plated copper (DPC), direct bonded copper (DBC), or other methods. The upper copper foil layer 12 of the second chip 30 module of this application has a first blind trench 126 and an opposing upper surface 123 and a lower surface 124. The lower surface 124 is attached to and bonded to the top of the ceramic plate 11, that is, the upper surface 123 is located on the side of the upper copper foil layer 12 away from the ceramic plate 11. The first blind trench 126 is recessed from the upper surface 123 of the upper copper foil layer 12 toward the lower surface 124 and the first blind trench 126 does not communicate with the lower surface 124, that is, the first blind trench 126 does not penetrate the upper copper foil layer 12. The first blind trench 126 encloses a portion of the upper surface 123 to form an independent region 1231. The independent region 1231 is configured correspondingly to the chip 30.

[0037] In this embodiment, the substrate structure of this application further includes a tin sheet 20. The tin sheet 20 is disposed on an independent region 1231 of the upper surface 123, and the tin sheet 20 is surrounded by a first blind trench 126. In other words, the bottom area of ​​the tin sheet 20 is smaller than the area surrounded by the first blind trench 126. The chip 30 is disposed on the tin sheet 20, that is, the chip 30 is located on the side of the tin sheet 20 away from the upper copper foil layer 12. Specifically, the chip 30 is bonded and fixed to the upper copper foil layer 12 by the tin sheet 20, that is, the chip 30 is soldered to the independent region 1231 of the upper copper foil layer 12 by melting the tin sheet 20 into liquid tin at high temperature. Therefore, since the independent region 1231 is located within the area surrounded by the first blind trench 126 and the bottom area of ​​the tin sheet 20 is smaller than the area surrounded by the first blind trench 126, the tin sheet 20 will be blocked and restricted by the first blind trench 126 after melting into liquid tin, and will not overflow to the upper surface 123 of the upper copper foil layer 12 other than the independent region 123.

[0038] To further explain, the first blind trench 126 of this application is formed on the upper copper foil layer 12 using a micro-etching (semi-etching) process, thereby ensuring that the first blind trench 126 does not penetrate the upper copper foil layer 12. The ratio of the depth H1 of the first blind trench 126 to the thickness T of the upper copper foil layer 12 is between 0.1 and 1. In this embodiment, the ratio of the depth H1 of the first blind trench 126 to the thickness T of the upper copper foil layer 12 is approximately 1 / 2, thereby ensuring that liquid solder does not overflow to the upper surface 123 of the upper copper foil layer 12 except for the independent region 1231 during soldering of the solder sheet 20, while maintaining good conductivity of the upper copper foil layer 12. However, this application is not limited to this. In other words, the ratio of the depth H1 of the first blind trench 126 to the thickness T of the upper copper foil layer 12 can also be approximately 0.2, 0.3, 0.4, 0.6, 0.7, 0.8, 0.9, or any two of the above.

[0039] A second gap D2 is formed between the tin sheet 20 and the first blind trench 126. Through the inventors' experiments, when the second gap D2 is greater than or equal to 0.05 mm, the first blind trench 126 can effectively block and restrict the molten tin to prevent it from overflowing onto the upper surface 123 of the upper copper foil layer 12, excluding the independent area 1231. In this embodiment, the tin sheet 20 is approximately positioned at the center of the independent area 1231, so the second gap D2 between the periphery of the tin sheet 20 and the first blind trench 126 is approximately the same, but this application is not limited to this. It should be noted that, depending on the soldering skill of the soldering personnel or the distance of the second gap D2, the tin sheet 20, after soldering and re-cooling and solidifying, may no longer have a gap with the first blind trench 126, or may have a gap shorter than the second gap D2. For example, when the second gap D2 is long (e.g., the second gap D2 is greater than 10 mm), the molten tin, even if it flows, will not contact the first blind trench 126.

[0040] Furthermore, to further prevent liquid tin from overflowing onto the upper surface 123 beyond the first blind trench 126, the upper copper foil layer 12 also has a second blind trench 127. The second blind trench 127 is also recessed from the upper surface 123 of the upper copper foil layer 12 towards the lower surface 124, and the second blind trench 127 does not connect to the lower surface 124; that is, the second blind trench 127 does not penetrate the upper copper foil layer 12. The second blind trench 127 surrounds the periphery of the first blind trench 126. Therefore, even if liquid tin fills the first blind trench 126 and overflows during soldering, the second blind trench 127 can still block and limit the continued outward flow of liquid tin. Further explanation: the second blind trench 127 of this application is formed on the upper copper foil layer 12 using a micro-etching (semi-etching) process, thereby ensuring that the second blind trench 127 does not penetrate the upper copper foil layer 12. The ratio of the depth H2 of the second blind trench 127 to the thickness T of the upper copper foil layer 12 is between 0.1 and 1. In this embodiment, the ratio of the depth H2 of the second blind trench 127 to the thickness T of the upper copper foil layer 12 is approximately 1 / 2, thereby ensuring that liquid solder does not overflow to the upper surface 123 outside the second blind trench 127 during soldering of the solder sheet 20, while allowing the upper copper foil layer 12 to still have good conductivity. However, this application is not limited to this. In other words, the ratio of the depth H2 of the second blind trench 127 to the thickness T of the upper copper foil layer 12 can also be approximately 0.2, 0.3, 0.4, 0.6, 0.7, 0.8, 0.9, or any two of the above. Furthermore, a third gap D3 is formed between the second blind trench 127 and the first blind trench 126. Through the inventor's experiments, when the third spacing D3 is greater than or equal to 0.05 mm, the second blind trench 127 can effectively block and restrict the liquid tin that crosses the first blind trench 126 to prevent it from overflowing to the upper surface 123 outside the second blind trench 127.

[0041] The substrate structure of this application has a blind groove 121 or a first blind trench 126 formed on the upper copper foil layer 12. The blind groove 121 and the first blind trench 126 are recessed from the upper surface 123 of the upper copper foil layer 12 towards the lower surface 124 without communicating with the lower surface 124. Therefore, when the tin sheet 20 melts into a liquid state during soldering, the substrate structure of this application can block and restrict the liquid tin through the blind groove 121 or the first blind trench 126, thereby preventing the liquid tin from overflowing to the upper surface 123 of the upper copper foil layer 12. The blind groove 121 and the first blind trench 126 have simple processes and low processing costs.

[0042] In summary, the above-described content of this application is intended to enable those skilled in the art to clearly understand the technical content of this application and implement it accordingly, and is not intended to limit the scope of patent protection of this application. In addition, this application may of course have other embodiments not listed. Without departing from the spirit and essence of this application, those skilled in the art should be able to devise various corresponding changes and modifications based on this application, but all such corresponding changes and modifications should fall within the scope of protection of the patent claimed in this application.

Claims

1. A substrate structure capable of housing a chip, wherein, The substrate structure includes: A composite substrate includes a ceramic plate, an upper copper foil layer, and a lower copper foil layer. The upper copper foil layer and the lower copper foil layer are respectively disposed on opposite sides of the ceramic plate. The upper copper foil layer has a blind groove for corresponding configuration of the chip, a bottom surface of the groove, and an upper surface and a lower surface opposite to each other. The lower surface is attached to the ceramic plate. The blind groove is recessed from the upper surface toward the lower surface and does not communicate with the lower surface. The bottom surface of the groove is disposed in the blind groove and located between the upper surface and the lower surface.

2. The substrate structure according to claim 1, wherein, The depth of the blind groove is 1 / 2 the thickness of the upper copper foil layer.

3. The substrate structure according to claim 1, wherein, The upper copper foil layer also has a groove sidewall that is vertically connected between the bottom surface of the groove and the upper surface.

4. The substrate structure according to claim 3, wherein, It also includes a tin sheet disposed on the bottom surface of the groove and located within the blind groove, and the chip is disposed on the tin sheet.

5. The substrate structure according to claim 4, wherein, A first gap is formed between the tin sheet and the sidewall of the groove, the first gap being greater than or equal to 0.05 mm.

6. A substrate structure capable of housing a chip, wherein, The substrate structure includes: A composite substrate includes a ceramic plate, an upper copper foil layer, and a lower copper foil layer. The upper copper foil layer and the lower copper foil layer are respectively disposed on opposite sides of the ceramic plate. The upper copper foil layer has a first blind groove and an upper surface and a lower surface opposite to each other. The lower surface is attached to the ceramic plate. The first blind groove is recessed from the upper surface toward the lower surface and does not communicate with the lower surface. The first blind groove encloses part of the upper surface to form an independent area for the corresponding configuration of the chip.

7. The substrate structure according to claim 6, wherein, The depth of the first blind trench is 1 / 2 the thickness of the upper copper foil layer.

8. The substrate structure according to claim 6, wherein, It also includes a tin sheet disposed in the separate area of ​​the upper surface and surrounded by the first blind trench, on which the chip is disposed.

9. The substrate structure according to claim 8, wherein, A second gap is formed between the tin sheet and the first blind trench, the second gap being greater than or equal to 0.05 mm.

10. The substrate structure according to claim 6, wherein, The upper copper foil layer also has a second blind trench, which is recessed from the upper surface toward the lower surface and does not connect to the lower surface, and the second blind trench surrounds the first blind trench.

11. The substrate structure according to claim 10, wherein, The depth of the second blind trench is 1 / 2 the thickness of the upper copper foil layer.

12. The substrate structure according to claim 10, wherein, A third gap is formed between the second blind trench and the first blind trench, and the third gap is greater than or equal to 0.05 mm.