PCB mainboard based on Ethernet signal connection
By reusing idle pins on the PCB motherboard to output 100 Mbps Ethernet signals, the high cost of Gigabit Ethernet connectors in 100 Mbps Ethernet module application scenarios is solved, thereby reducing hardware costs and simplifying the design.
Patent Information
- Application Number
- CN202520231802.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-13
- Publication Date
- 2026-01-16
- Estimated Expiration
- 2035-02-13
AI Technical Summary
In application scenarios using 100 Mbps Ethernet modules, the cost of Gigabit Ethernet connectors in existing technologies is relatively high, resulting in no cost advantage for the hardware.
By connecting the signal output pins of the Ethernet chip to the idle pins of the main connector on the PCB motherboard, a 100 Mbps Ethernet signal is output, and a Gigabit Ethernet signal is output through the Ethernet connector when needed, saving the use of Gigabit Ethernet connectors.
It reduces hardware costs, simplifies PCB design complexity, saves PCB area, meets the requirements for smaller space layout, and improves cost-effectiveness.
Smart Images
Figure CN223808729U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to hardware circuit design field, especially a kind of PCB mainboard based on Ethernet signal connection. BACKGROUND
[0002] The current mainstream front view integrated machine has demand to Ethernet interface, vehicle-mounted Ethernet module mainly includes two interfaces according to the different signal rates: hundred million and gigabit, and its application on vehicle mainly includes OTA (Over-The-Air, i.e. air download technology) software upgrade, video stream data return or DVR (Digital Video Recorder, digital video recorder) and other functions. For the application analysis of front view integrated machine, the rate of hundred million Ethernet can satisfy the application scene development needs of above all functions, but limited to some users still choose gigabit Ethernet architecture on the whole vehicle architecture, so it is necessary to reserve gigabit Ethernet connector according to the requirements of client in hardware design.
[0003] The current mainstream design scheme is to use hundred million and gigabit pins Pin-to-Pin compatible Ethernet chip, but in the application scene of using hundred million Ethernet module, signal wiring is also needed through gigabit Ethernet connector, since the cost of gigabit Ethernet connector is higher, there is no cost advantage in the application scene of hundred million Ethernet of front view integrated machine.
[0004] In summary, in the application scene of using hundred million Ethernet module, how to further reduce hardware cost is the problem to be solved at present. UTILITY MODEL CONTENT
[0005] Therefore, the utility model aims at providing a kind of PCB mainboard based on Ethernet signal connection. It can further reduce hardware cost in the application scene of using hundred million Ethernet module. Its specific scheme is as follows:
[0006] Firstly, the application discloses a kind of PCB mainboard based on Ethernet signal connection, including Ethernet chip, main connector and Ethernet connector;
[0007] The signal output pin of the Ethernet chip is connected with the idle pin of the main connector, so as to output hundred million Ethernet signal to the idle pin by the signal output pin;
[0008] The signal output pin of the Ethernet chip is connected with the target pin of Ethernet connector, so as to output gigabit Ethernet signal to the target pin by the signal output pin.
[0009] Optionally, the PCB mainboard further comprises a capacitor pad, the capacitor pad is used to place a target coupling capacitor group, the target coupling capacitor group is any one of a first coupling capacitor group or a second coupling capacitor group, the first coupling capacitor group is used to be connected with the main connector, and the second coupling capacitor group is used to be connected with the Ethernet connector.
[0010] Optionally, the first coupling capacitor group comprises a plurality of 100 nanofarad coupling capacitors.
[0011] Optionally, the second coupling capacitor group comprises a plurality of 22 nanofarad coupling capacitors.
[0012] Optionally, the first coupling capacitor group comprises a first coupling capacitor and a second coupling capacitor, the signal output pin comprises a first differential trace and a second differential trace, and the idle pin comprises a first idle pin and a second idle pin.
[0013] Optionally, the first differential trace of the Ethernet chip is connected with the first idle pin of the main connector through the first coupling capacitor, and the second differential trace of the Ethernet chip is connected with the second idle pin of the main connector through the second coupling capacitor.
[0014] Optionally, the first idle pin and the second idle pin are two pins arranged adjacent to each other in the main connector.
[0015] Optionally, the second coupling capacitor group comprises a third coupling capacitor and a fourth coupling capacitor, the signal output pin comprises a first differential trace and a second differential trace, and the target pin comprises a first pin and a second pin.
[0016] Optionally, the first differential trace of the Ethernet chip is connected with the first pin of the Ethernet connector through the third coupling capacitor, and the second differential trace of the Ethernet chip is connected with the second pin of the Ethernet connector through the second coupling capacitor.
[0017] Optionally, the PCB mainboard further comprises a common-mode inductor for filtering a signal, an input end of the common-mode inductor is connected with the signal output pin, and an output end of the common-mode inductor is connected with the target coupling capacitor group.
[0018] It can be seen that the PCB in the application includes an Ethernet chip and a main connector. In an application scenario of using a 100M Ethernet module, a signal output pin of the Ethernet chip is connected with an idle pin of the main connector, so as to output a 100M Ethernet signal to the idle pin through the signal output pin, and then output the 100M Ethernet signal to other processing modules of the whole vehicle through the main connector. That is, the idle pin of the main connector is reused to output the 100M Ethernet signal, and the 1000M Ethernet connector only needs to output a 1000M Ethernet signal, thereby saving the cost of the 1000M Ethernet connector. BRIEF DESCRIPTION OF DRAWINGS
[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are only a part of the embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of the provided drawings.
[0020] Figure 1 A schematic diagram of a PCB mainboard based on Ethernet signal connection disclosed in the application;
[0021] Figure 2 A schematic diagram of another PCB mainboard based on Ethernet signal connection disclosed in the application;
[0022] Figure 3 A swing diagram of a first coupling capacitor group disclosed in the application;
[0023] Figure 4 A swing diagram of a second coupling capacitor group disclosed in the application;
[0024] Figure 5 A schematic diagram of an original main connector signal interface network disclosed in the application;
[0025] Figure 6 A schematic diagram of an improved main connector signal interface network disclosed in the application. DETAILED DESCRIPTION
[0026] The technical solutions in the embodiments of the present application will be described clearly and completely in the following with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.
[0027] The current mainstream design scheme is to use the Ethernet chip which can be Pin-to-Pin compatible with 100M and 1000M pins, but in the application scene of using 100M Ethernet module, the signal wiring also needs to be output through the 1000M Ethernet connector, and the cost of the 1000M Ethernet connector is relatively high, so there is no cost advantage in the application scene of 100M Ethernet of the front-view all-in-one machine. Therefore, the embodiment of the utility model discloses a kind of PCB mainboard based on Ethernet signal connection, which can further reduce hardware cost in the application scene of using 100M Ethernet module.
[0028] Referring to Figure 1 The embodiment of the utility model provides a kind of PCB mainboard based on Ethernet signal connection, including Ethernet chip 1, main connector 2 and Ethernet connector 3;
[0029] The signal output pin of the Ethernet chip 1 is connected with the idle pin of the main connector 2, so as to output 100M Ethernet signal to the idle pin through the signal output pin;
[0030] The signal output pin of the Ethernet chip 1 is connected with the target pin of Ethernet connector 3, so as to output 1000M Ethernet signal to the target pin through the signal output pin.
[0031] In the embodiment, in the case that whole vehicle architecture still needs 1000M Ethernet, that is, considering the application scene of 100M / 1000M Ethernet compatible, PCB (Printed Circuit Board) mainboard specifically includes Ethernet chip 1, main connector 2 and Ethernet connector 3.
[0032] That is, as Figure 1 If whole vehicle architecture still needs 1000M Ethernet connector, Ethernet connector 3 needs to be reserved on PCB mainboard, and at this time, Ethernet chip 1 is specifically 100M / 1000M Ethernet compatible chip, that is, supporting outputting 1000M Ethernet signal and 100M Ethernet signal. In the scene of 1000M Ethernet, the signal output pin of the Ethernet chip 1 is connected with the target pin of Ethernet connector 3 in the embodiment, so that the 1000M Ethernet signal output by the Ethernet chip 1 can be wired from Ethernet connector 3, and in the scene of 100M Ethernet, 100M Ethernet signal wiring is wired from main connector 2, which can be well adapted and take into account low-cost 100M Ethernet scheme application. It should be pointed out that main connector 2 itself is mainly for product power supply, providing low-speed bus signal communication and other application interfaces. In the embodiment, the signal output pin of the Ethernet chip 1 is connected with the idle pin of the main connector 2, so as to output 100M Ethernet signal to the idle pin through the signal output pin, so as to output 100M Ethernet signal to other processing modules of whole vehicle through the main connector.
[0033] Further, in the application scenario of using only the 100 Mbps Ethernet module, i.e. the whole vehicle frame has no demand for the 1000 Mbps Ethernet connector, as shown in FIG. 1, the PCB mainboard can only need to include the Ethernet chip 1 and the main connector 2, wherein the Ethernet chip 1 can be a single 100 Mbps Ethernet chip. Figure 2
[0034] It should be noted that the 100 / 1000 Mbps compatible chip has a larger package size, more signal interfaces, higher design complexity, and occupies more PCB space of the product. In addition, the power consumption of the 100 / 1000 Mbps compatible Ethernet chip is generally higher than that of the single 100 Mbps Ethernet chip, which will also bring challenges to the space arrangement and thermal management of the front-view all-in-one machine. From the use scenario, although the use of the 100 / 1000 Mbps compatible Ethernet chip can adapt to the different interface requirements of the client, the cost (chip and peripheral module) of the compatible 100 / 1000 Mbps Ethernet chip is twice as high as that of the single 100 Mbps Ethernet chip.
[0035] Therefore, in the case that the whole vehicle frame has no demand for the 1000 Mbps Ethernet interface, a single 100 Mbps Ethernet chip can be directly used, and the idle pins of the main connector are reused to output the 100 Mbps Ethernet signal, without the need to use the 1000 Mbps Ethernet connector, which not only saves the cost of a 1000 Mbps Ethernet connector, but also does not need to separately increase the 100 Mbps Ethernet connector, thereby reducing the BOM (Bill of Materials) part cost, and making the hardware design of the PCB board simpler, reducing the design complexity of the product, saving the PCB board area, and meeting the smaller space arrangement requirement of the front-view all-in-one machine proposed by the mainstream vehicle factory.
[0036] Further, as shown in FIGS. 2 and 3, the PCB mainboard further includes a common mode inductor for filtering signals and a group of coupling capacitors, i.e. the signal output pin of the Ethernet chip 1 is first connected with the input end of the common mode inductor to realize filtering processing of the 100 Mbps Ethernet signal, the output end of the common mode inductor is connected with one end of the coupling capacitor, and the other end of the coupling capacitor is connected with the main connector 2, so as to couple the signal to the main connector 2 through the capacitor. Figure 1 Figure 2 It should be noted that in the application scenario of the 100 / 1000 Mbps Ethernet signal compatibility as shown in FIG. 4, the PCB mainboard further includes a capacitor pad, the capacitor pad is used to place a target coupling capacitor group, the target coupling capacitor group is any one of a first coupling capacitor group or a second coupling capacitor group, the first coupling capacitor group is used to be connected with the main connector, and the second coupling capacitor group is used to be connected with the Ethernet connector. The first coupling capacitor group includes a plurality of 100 nF coupling capacitors, and the second coupling capacitor group includes a plurality of 22 nF coupling capacitors.
[0037] Figure 1
[0038] It can be understood that, Figure 1 The architecture shown, although both the main connector 2 supporting the output of 100 Mbps Ethernet signal and the Ethernet connector 3 supporting the output of 1000 Mbps Ethernet signal, in a specific application scenario, either output 100 Mbps Ethernet signal or output 1000 Mbps Ethernet signal, that is, the two signals do not exist at the same time. Therefore, the embodiment sets a target coupling capacitor group capacitor pad for placing, and a part of the area of the capacitor pad is common, and the target coupling capacitor group is any one of the first coupling capacitor group or the second coupling capacitor group, as shown in Figure 1 The Colay design in the figure bridges the Ethernet signal to the main connector, and the Colay design does not introduce signal integrity problems, avoiding high-speed signal reflection, ringing and other problems caused by residual lines.
[0039] In the embodiment, the first coupling capacitor group or the second coupling capacitor group is pasted according to the Ethernet interface requirement of the terminal, and the capacitor pads are stacked on the PCB layout, as shown in Figure 3 and Figure 4 . Figure 3 The first coupling capacitor group includes a first coupling capacitor C1 and a second coupling capacitor C2, and the capacitance value can be 100 nF. The first coupling capacitor group is used to connect with the main connector to output 100 Mbps Ethernet signal. Figure 4 The second coupling capacitor group includes a third coupling capacitor C3 and a fourth coupling capacitor C4, and the capacitance value can be 22 nF. The second coupling capacitor group is used to connect with the Ethernet connector to output 1000 Mbps Ethernet signal. It should be pointed out that the capacitance values 100 and 22 are default values set in general cases, which can be reset in different scenarios. The embodiment does not limit the specific capacitance value.
[0040] It should be further pointed out that the first coupling capacitor group includes a first coupling capacitor and a second coupling capacitor, the signal output pin includes a first differential trace and a second differential trace, and the idle pin includes a first idle pin and a second idle pin. That is, the first coupling capacitor group includes a first coupling capacitor C1 and a second coupling capacitor C2, the signal output pin includes a first differential trace MDIP (Master Data Input Positive) and a second differential trace MDIN (Master Data Input Negative), MDIP and MDIN are a pair of differential traces of Ethernet signal, usually in twisted pair mode, mainly for transmitting Ethernet signal. The idle pin also includes a first idle pin and a second idle pin.
[0041] In this way, when the 100M Ethernet signal is transmitted, the first differential trace of the Ethernet chip is connected to the first idle pin of the main connector through the first coupling capacitor, and the second differential trace of the Ethernet chip is connected to the second idle pin of the main connector through the second coupling capacitor.
[0042] It should be noted that the first idle pin and the second idle pin are two adjacent pins in the main connector. First, the original main connector signal interface network is as shown in Figure 5 , which does not include Ethernet wiring at this time. Figure 5 It can be seen from the figure that the pins numbered 13 and 14 are idle pins, but due to the transmission requirements of the Ethernet signal, two adjacent pins are required for output, so the heating wire function of the original pin 6 is given to the pin 13 in this embodiment, and the pins 6 and 14 are two adjacent idle pins at this time. The improved main connector signal interface network is as shown in Figure 6 . Therefore, the pins 6 and 14 are used as the first idle pin and the second idle pin for receiving and outputting the 100M Ethernet signal.
[0043] In addition, the second coupling capacitor group includes a third coupling capacitor and a fourth coupling capacitor, the signal output pin includes a first differential trace and a second differential trace, and the target pin includes a first pin and a second pin. That is, the second coupling capacitor group includes a third coupling capacitor C3 and a fourth coupling capacitor C4, the signal output pin includes a first differential trace MDIP and a second differential trace MDIN, and the target pin includes a first pin and a second pin, which means two pins in the Ethernet connector for outputting the 1000M Ethernet signal.
[0044] In this way, when the 1000M Ethernet signal is transmitted, the first differential trace of the Ethernet chip is connected to the first idle pin of the Ethernet connector through the third coupling capacitor, and the second differential trace of the Ethernet chip is connected to the second idle pin of the Ethernet connector through the fourth coupling capacitor.
[0045] As shown in Figure 1 , in the scenario of 100 / 1000M Ethernet signal compatibility, the PCB mainboard further includes a common-mode inductor L1 for filtering signals, an input end of the common-mode inductor is connected to the signal output pin, and an output end of the common-mode inductor is connected to the target coupling capacitor group.
[0046] As can be seen from the above, in the scenario shown in Figure 1 , the 1000M Ethernet connector is reserved, the 100M Ethernet signal is wired from the main connector, the 1000M Ethernet connection is saved, the BOM cost can save one 1000M Ethernet connector, the cost is lower, and the compatibility is higher; in the scenario shown in Figure 2In the shown scenario, without separate Ethernet connector or reserved location, the 100M Ethernet signal from the main connector can save the PCB area, improve the space layout requirement of the product, the hardware design of the PCB is also simpler, and of course, the hardware BOM design cost is also reduced.
[0047] The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the difference from other embodiments, and the same or similar parts between various embodiments can be referred to each other.
[0048] The above description of disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A PCB main board based on an Ethernet signal connection, characterized by, The Ethernet chip, the main connector and the Ethernet connector are included. The signal output pin of the Ethernet chip is connected with the idle pin of the main connector, so as to output the 100M Ethernet signal to the idle pin through the signal output pin. The signal output pin of the Ethernet chip is connected with the target pin of the Ethernet connector, so as to output the 1000M Ethernet signal to the target pin through the signal output pin.
2. The Ethernet signal connection-based PCB mainboard according to claim 1, characterized in that, The PCB mainboard further includes a capacitor pad, the capacitor pad is used to place a target coupling capacitor group, the target coupling capacitor group is any one of a first coupling capacitor group or a second coupling capacitor group, the first coupling capacitor group is used to be connected with the main connector, and the second coupling capacitor group is used to be connected with the Ethernet connector.
3. The Ethernet signal connection-based PCB mainboard according to claim 2, characterized in that, The first coupling capacitor group includes a plurality of 100nF coupling capacitors.
4. The Ethernet signal connection-based PCB mainboard according to claim 2, characterized in that, The second coupling capacitor group includes a plurality of 22nF coupling capacitors.
5. The Ethernet signal connection based PCB mainboard according to claim 2, characterized in that, The first coupling capacitor group includes a first coupling capacitor and a second coupling capacitor, the signal output pin includes a first differential trace and a second differential trace, and the idle pin includes a first idle pin and a second idle pin.
6. The Ethernet signal connection based PCB mainboard according to claim 5, characterized in that, The first differential trace of the Ethernet chip is connected with the first idle pin of the main connector through the first coupling capacitor, and the second differential trace of the Ethernet chip is connected with the second idle pin of the main connector through the second coupling capacitor.
7. The Ethernet signal connection based PCB mainboard according to claim 5, characterized in that, The first idle pin and the second idle pin are two pins arranged adjacent to each other in the main connector.
8. The Ethernet signal connection based PCB mainboard according to claim 3, characterized in that, The second coupling capacitor group includes a third coupling capacitor and a fourth coupling capacitor, the signal output pin includes a first differential trace and a second differential trace, and the target pin includes a first pin and a second pin.
9. The Ethernet signal connection based PCB mainboard according to claim 8, characterized in that, The first differential trace of the Ethernet chip is connected with the first pin of the Ethernet connector through the third coupling capacitor, and the second differential trace of the Ethernet chip is connected with the second pin of the Ethernet connector through the second coupling capacitor.
10. The Ethernet signal connection based PCB mainboard according to claim 3, characterized in that, The PCB mainboard further includes a common mode inductor for filtering signals, an input end of the common mode inductor is connected with the signal output pin, and an output end of the common mode inductor is connected with the target coupling capacitor group.