Low-side driving circuit with over-temperature protection
By introducing an NMOS transistor, an NTC thermistor, and resistor R6 into the low-side drive circuit, an over-temperature protection circuit is constructed, which solves the problems of lack of protection and complexity in the low-side drive circuit, and achieves the effects of simplified structure and easy maintenance.
Patent Information
- Application Number
- CN202520302205.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-25
- Publication Date
- 2026-01-27
- Estimated Expiration
- 2035-02-25
AI Technical Summary
Existing low-side drive circuits lack protection functions, have complex structures, and are inconvenient to maintain.
An over-temperature protection circuit consisting of an NMOS transistor, an NTC thermistor, and resistor R6 is used to control the conduction and turn-off of the NMOS transistor by changing the resistance of the NTC thermistor with temperature, thereby achieving over-temperature protection.
A low-side drive circuit with over-temperature protection was implemented, which simplified the circuit structure and improved maintainability, achieving the same functionality as imported chips.
Smart Images
Figure CN223843760U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of low-side drive circuit technology, specifically a low-side drive circuit with over-temperature protection. Background Technology
[0002] Low-side drive refers to a driving method where the drive circuit is positioned at the low potential end of the load (usually the ground terminal). Power supply control to the load is achieved by controlling the on and off states of low-side switching elements. Low-side drive circuits primarily drive the load by controlling the on and off states of switching elements (such as MOSFETs and BJTs). When a control signal turns the switching element on, a path is formed between the load and ground, and current flows from the power supply through the load to ground, causing the load to start operating. When the control signal turns the switching element off, the path between the load and ground is broken, and the load stops operating.
[0003] Currently, low-side drive circuits have the following problems: some low-side drive circuits lack protection functions, some low-side drive circuits are complex, and some low-side drive circuits are inconvenient to repair. Utility Model Content
[0004] The purpose of this invention is to provide a low-side drive circuit with over-temperature protection to solve the problems mentioned in the background art.
[0005] To achieve the above objectives, this utility model provides the following technical solution: a low-side drive circuit with over-temperature protection, comprising:
[0006] NMOS transistor M1, NTC thermistor and resistor R6;
[0007] In this configuration, pin 1 of the NMOS transistor M1 is connected to one end of resistor R6 and one end of the NTC thermistor. The other end of resistor R6 is connected to the low-side drive enable port. The other end of the NTC thermistor and pin 3 of the NMOS transistor M1 are grounded. Pin 2 of the NMOS transistor M1 is externally connected to the low-side drive output terminal.
[0008] Preferably, the gate-source drive voltage (GS) of the NMOS transistor M1 is greater than 1.5V.
[0009] Preferably, the resistance of the NTC thermistor decreases as the temperature increases; at 25 degrees Celsius, the resistance of the NTC thermistor is 10KΩ.
[0010] Preferably, the low-side drive enable port is an MCU drive enable port with an enable level of 5V.
[0011] Preferably, the resistance of resistor R6 is 10KΩ.
[0012] Compared with the prior art, the beneficial effects of this utility model are:
[0013] The problem this invention aims to solve is to construct a low-side drive circuit with over-temperature protection using discrete components such as NMOS transistor M1, NTC thermistor, and resistor R6. This achieves the functionality of an imported chip by combining domestically produced components, simplifies the circuit, and increases its maintainability. Attached Figure Description
[0014] Figure 1 This is a circuit diagram of the low-side drive circuit with over-temperature protection according to this utility model. Detailed Implementation
[0015] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.
[0016] In the description of this utility model, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.
[0017] Example 1:
[0018] Please see Figure 1 This utility model provides a technical solution: a low-side drive circuit with over-temperature protection, comprising: an NMOS transistor M1, an NTC thermistor, and a resistor R6;
[0019] In this configuration, pin 1 of the NMOS transistor M1 is connected to one end of resistor R6 and one end of the NTC thermistor. The other end of resistor R6 is connected to the low-side drive enable port. The other end of the NTC thermistor and pin 3 of the NMOS transistor M1 are grounded. Pin 2 of the NMOS transistor M1 is externally connected to the low-side drive output. The gate-source (GS) drive voltage for the NMOS transistor M1 to conduct is greater than 1.5V. The resistance of the NTC thermistor decreases with increasing temperature; at 25 degrees Celsius, the resistance of the NTC thermistor is 10KΩ. The low-side drive enable port is the MCU drive enable port, with an enable level of 5V. The resistance of resistor R6 is 10KΩ.
[0020] Analysis of the above: M1 is an NMOS transistor, and the gate-source (GS) drive voltage for M1 to conduct is greater than 1.5V. The low-side drive output is the external output port of this circuit. The NTC thermistor and resistor R6 are voltage divider resistors between the gate and source terminals of the NMOS transistor M1. The resistance of the NTC thermistor decreases with increasing temperature; at 25 degrees Celsius, the resistance of the NTC is 10K ohms. R6 is also a 10K ohm resistor. The low-side drive enable port is the MCU drive enable port, with an enable level of 5V.
[0021] calculate:
[0022] 1. The voltage of the low-side drive enable port is 5V. The GS voltage of NMOS transistor M1 = the voltage of the low-side drive enable port * NTC / (R6 + NTC) (where GS refers to the gate (G) and source (S). NMOS transistor M1 has a gate (G), drain (D) and source (S). The gate (G), drain (D) and source (S) correspond to pins 1, 2 and 3 of NMOS transistor M1, respectively).
[0023] 2: When the GS voltage of M1 is 1.5V, the resistance of NTC is approximately 3.489K.
[0024] 3: Therefore, when the temperature rises and the NTC resistance reaches 3.489K, the GS voltage of M1 will be less than 1.5V, at which point M1 will disconnect.
[0025] It is important to note that the constructions and arrangements of this application shown in several different exemplary embodiments are merely illustrative. Although only a few embodiments are described in detail in this disclosure, those who consult this disclosure will readily understand that many modifications are possible (e.g., changes in the size, dimensions, structure, shape and proportion of various elements, as well as parameter values (e.g., temperature, pressure, etc.), mounting arrangements, use of materials, color, orientation, etc.) without substantially departing from the novel teachings and advantages of the subject matter described in this application). For example, an element shown as integrally formed may be composed of multiple parts or elements, the position of elements may be inverted or otherwise altered, and the nature or number or position of discrete elements may be changed or altered. Therefore, all such modifications are intended to be included within the scope of this utility model. The order or sequence of any process or method steps may be changed or rearranged according to alternative embodiments. In the claims, any "device plus function" clause is intended to cover the structure described herein that performs the function, and not only structural equivalents but also equivalent structures. Without departing from the scope of this invention, other substitutions, modifications, alterations, and omissions may be made in the design, operation, and arrangement of the exemplary embodiments. Therefore, this invention is not limited to the specific embodiments, but extends to various modifications that still fall within the scope of the appended claims.
[0026] The foregoing has shown and described the basic principles, main features, and advantages of this utility model. It is obvious to those skilled in the art that this utility model is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or basic characteristics of this utility model. Therefore, the embodiments should be considered exemplary and non-limiting in all respects. The scope of this utility model is defined by the appended claims rather than the foregoing description. Therefore, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within this utility model, and no reference numerals in the claims should be considered as limiting the scope of the claims.
[0027] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.
Claims
1. A low-side drive circuit with over-temperature protection, characterized in that, include: NMOS transistor M1, NTC thermistor and resistor R6; In this configuration, pin 1 of the NMOS transistor M1 is connected to one end of resistor R6 and one end of the NTC thermistor. The other end of resistor R6 is connected to the low-side drive enable port. The other end of the NTC thermistor and pin 3 of the NMOS transistor M1 are grounded. Pin 2 of the NMOS transistor M1 is externally connected to the low-side drive output terminal.
2. The low-side drive circuit with over-temperature protection according to claim 1, characterized in that: The gate-source drive voltage (GS) of the NMOS transistor M1 is greater than 1.5V.
3. The low-side drive circuit with over-temperature protection according to claim 1, characterized in that: The resistance of the NTC thermistor decreases as the temperature increases; at 25 degrees Celsius, the resistance of the NTC thermistor is 10KΩ.
4. The low-side drive circuit with over-temperature protection according to claim 1, characterized in that: The low-side drive enable port is the MCU drive enable port, and the enable level is 5V.
5. A low-side drive circuit with over-temperature protection according to claim 1, characterized in that: The resistance of resistor R6 is 10KΩ.