Circuit for filtering power supply ripples

Abstract

The utility model provides a circuit for filtering power supply ripples, which comprises the following components: a maximum voltage acquisition circuit of which the input end is connected with an input power supply Vin and the output end Vppmax outputs the maximum peak voltage of the input power supply Vin; the first connecting end of the minimum voltage acquisition circuit is connected with the output end Vppmax, the second connecting end of the minimum voltage acquisition circuit is connected with the input power supply Vin, and the output end Vppmin1 of the minimum voltage acquisition circuit outputs first voltage; the power supply end of the minimum value voltage driving circuit is connected with the output end Vppmax, the input end of the minimum value voltage driving circuit is connected with the output end Vppmin1, and the output end Vppmin2 of the minimum value voltage driving circuit outputs second voltage; the control end of the voltage stabilizing circuit is connected with the output end Vppmin2, the power supply end of the voltage stabilizing circuit is connected with an input power supply Vin, the output end Vout of the voltage stabilizing circuit outputs stable output voltage, and the input power supply Vin has ripple voltage. Compared with the prior art, the ripple voltage of an input power supply can be filtered and reduced, so that the requirement of normal work of a product is met.

Description

[Technical Field]

[0001] This utility model relates to the field of circuit design technology, and in particular to a circuit for filtering power supply ripple. [Background Technology]

[0002] Excessive input power supply ripple voltage can impair a product's normal operation. This can occur if the input power supply exceeds the product's maximum operating voltage or if there is excessive ripple voltage. Furthermore, the ripple voltage can cause squealing noise from the inductor / MLCC (Multilayer Ceramic Capacitor). Therefore, it is necessary to filter and reduce the input power supply ripple voltage to meet the requirements for normal product operation.

[0003] Please refer to Figure 1 The diagram shows a schematic of a circuit for filtering power supply ripple in the prior art. It mainly achieves the effect of filtering power supply ripple voltage by increasing the inductance and capacitance values ​​of the inductor and capacitor. However, the prior art solution has the following problems and drawbacks:

[0004] ① The ripple voltage filtering effect is poor, and it cannot fully cover the filtering effect for situations with a wide frequency range;

[0005] ② When the load is large, even after the energy stored in the inductor and capacitor is drawn out by the load, the power supply ripple will still be large.

[0006] ③ To achieve lower power supply ripple, the inductance and capacitance values ​​of inductors and capacitors require a larger vertical space volume.

[0007] Therefore, it is necessary to propose a new technical solution to address the above problems. [Utility Model Content]

[0008] One of the objectives of this invention is to provide a circuit for filtering power supply ripple, which can filter out and reduce the ripple voltage of the input power supply to meet the requirements for normal product operation.

[0009] According to one aspect of the present invention, the present invention provides a circuit for filtering power supply ripple, comprising:

[0010] A maximum voltage acquisition circuit has its input terminal connected to the input power supply Vin. It acquires the maximum peak voltage of the input power supply Vin and outputs it through its output terminal Vpp_max. A minimum voltage acquisition circuit has its first connection terminal connected to the output terminal Vpp_max of the maximum voltage acquisition circuit and its second connection terminal connected to the input power supply Vin. The minimum voltage acquisition circuit generates a first voltage based on the maximum peak voltage of the input power supply Vin and outputs it through its output terminal Vpp_min_1. This first voltage is related to the minimum peak voltage of the input power supply Vin. A minimum voltage driving circuit has its power supply terminal connected to the output terminal Vpp_max of the maximum voltage acquisition circuit and its input terminal... A minimum voltage driving circuit is connected to the output terminal Vpp_min_1 of the minimum voltage acquisition circuit. The minimum voltage driving circuit generates a second voltage based on the maximum peak voltage of the input power supply Vin and the first voltage, and outputs the second voltage through its output terminal Vpp_min_2. The second voltage is related to the minimum peak voltage of the input power supply Vin. A voltage regulator circuit, whose control terminal is connected to the output terminal Vpp_min_2 of the minimum voltage driving circuit, whose power supply terminal is connected to the input power supply Vin, and whose output terminal is Vout, generates a stable output voltage based on the input power supply Vin and the second voltage, and outputs the stable output voltage through its output terminal Vout. The stable output voltage is related to the second voltage. The input power supply Vin has a ripple voltage.

[0011] Compared with the prior art, this invention can filter out and reduce the ripple voltage of the input power supply to meet the requirements of normal product operation. [Attached Image Description]

[0012] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:

[0013] Figure 1 This is a schematic diagram of a circuit for filtering power supply ripple in the prior art;

[0014] Figure 2 This is a schematic diagram of a circuit for filtering power supply ripple in one embodiment of the present invention.

Detailed Implementation Methods

[0015] To make the above-mentioned objectives, features and advantages of this utility model more apparent and understandable, the utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0016] The term "an embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that excludes other embodiments. Unless otherwise specified, the terms coupling, connection, linking, and interconnection used herein to indicate electrical connection mean direct or indirect connection. For example, A being connected to B includes both a direct electrical connection between A and B and a connection between A and B via electrical components or circuits.

[0017] In the description of this utility model, it should be understood that the terms "upper", "lower", "front", "back", "positive", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0018] Please refer to Figure 2 As shown, it is a schematic diagram of a circuit for filtering power supply ripple in one embodiment of the present invention. Figure 2 The circuit shown for filtering power supply ripple includes a maximum voltage acquisition circuit 210, a minimum voltage acquisition circuit 220, a minimum voltage driving circuit 230, and a voltage regulator circuit 240.

[0019] The input terminal of the maximum voltage acquisition circuit 210 is connected to the input power supply Vin. It is used to acquire the maximum peak voltage of the input power supply Vin and output the maximum peak voltage of the input power supply Vin through its output terminal Vpp_max.

[0020] The first connection terminal of the minimum voltage acquisition circuit 220 is connected to the output terminal Vpp_max of the maximum voltage acquisition circuit 210, and its second connection terminal is connected to the input power supply Vin. The minimum voltage acquisition circuit 220 generates a first voltage based on the maximum peak voltage of the input power supply Vin (i.e., the voltage output by the output terminal Vpp_max) and the input power supply Vin, and outputs the first voltage through its output terminal Vpp_min_1. The first voltage (i.e., the voltage output by the output terminal Vpp_min_1) is related to the minimum peak voltage of the input power supply Vin.

[0021] The power supply terminal of the minimum voltage driving circuit 230 is connected to the output terminal Vpp_max of the maximum voltage acquisition circuit 210, and its input terminal is connected to the output terminal Vpp_min_1 of the minimum voltage acquisition circuit 220. The minimum voltage driving circuit 230 generates a second voltage based on the maximum peak voltage of the input power supply Vin (i.e., the voltage output by the output terminal Vpp_max) and the first voltage (i.e., the voltage output by the output terminal Vpp_min_1), and outputs the second voltage through its output terminal Vpp_min_2. The second voltage (i.e., the voltage output by the output terminal Vpp_min_2) is related to the minimum peak voltage of the input power supply Vin.

[0022] The control terminal of the voltage regulator circuit 240 is connected to the output terminal Vpp_min_2 of the minimum voltage drive circuit 230, its power supply terminal is connected to the input power supply Vin, and its output terminal is Vout. The voltage regulator circuit 240 generates a stable output voltage based on the input power supply Vin and the second voltage (i.e., the voltage output by the output terminal Vpp_min_2), and outputs this stable output voltage through its output terminal Vout. The stable output voltage (i.e., the voltage output by the output terminal Vout) is related to the second voltage (i.e., the voltage output by the output terminal Vpp_min_2). One end of the load RL is connected to the output terminal Vout of the voltage regulator circuit 240, and the other end is grounded.

[0023] The input power supply Vin has a ripple voltage. Figure 2 In the specific embodiment shown, V1 is a DC power supply and V2 is an AC power supply. The two are connected in series to simulate an input power supply Vin with a large ripple voltage.

[0024] exist Figure 2 In the illustrated embodiment, the difference between the first voltage (i.e., the voltage output by the output terminal Vpp_min_1) and the minimum peak voltage of the input power supply Vin is a predetermined voltage value; the second voltage (i.e., the voltage output by the output terminal Vpp_min_2) is proportional to the minimum peak voltage of the input power supply Vin; and the stable output voltage (i.e., the voltage output by the output terminal Vout) is proportional to the second voltage (i.e., the voltage output by the output terminal Vpp_min_2).

[0025] exist Figure 2 In the illustrated embodiment, the maximum voltage acquisition circuit 210 includes an ideal diode 212, capacitor C1, and capacitor C2. The anode of the ideal diode 212 is connected to the input power supply Vin, and its cathode is connected to the output terminal Vpp_max of the maximum voltage acquisition circuit 210. One end of capacitor C1 is connected to the output terminal Vpp_max of the maximum voltage acquisition circuit 210, and the other end is grounded. One end of capacitor C2 is connected to the output terminal Vpp_max of the maximum voltage acquisition circuit 210, and the other end is grounded.

[0026] exist Figure 2 In the specific embodiment shown, the ideal diode 212 includes a MOSFET M1, a transistor Q1, a transistor Q2, a resistor R1, and a resistor R2. The first terminal of the MOSFET M1 is connected to the input power supply Vin, and its second terminal is connected to the output terminal Vpp_max of the maximum voltage acquisition circuit 210. Its control terminal is grounded through resistor R2. The first terminal of the transistor Q1 is connected to the first terminal of the MOSFET M1, and its second terminal is grounded through resistor R1. Its control terminal is connected to its second terminal. The first terminal of the transistor Q2 is connected to the second terminal of the MOSFET M1, and its second terminal is connected to the control terminal of the MOSFET M1. Its control terminal is connected to the control terminal of the transistor Q1.

[0027] exist Figure 2 In the specific embodiment shown, MOS transistor M1 is a PMOS transistor, and the first connection terminal, the second connection terminal, and the control terminal of MOS transistor M1 are the drain, source, and gate of the PMOS transistor, respectively; transistor Q1 is a PNP transistor, and the first connection terminal, the second connection terminal, and the control terminal of transistor Q1 are the emitter, collector, and base of the PNP transistor, respectively; transistor Q2 is a PNP transistor, and the first connection terminal, the second connection terminal, and the control terminal of transistor Q2 are the emitter, collector, and base of the PNP transistor, respectively.

[0028] exist Figure 2 In the illustrated embodiment, the minimum voltage acquisition circuit 220 includes a capacitor C3, a resistor R3, a diode D1, and a diode D2. One end of the capacitor C3 is connected to the output terminal Vpp_max of the maximum voltage acquisition circuit 210, and the other end is connected to the output terminal Vpp_min_1 of the minimum voltage acquisition circuit 220. The anode of the diode D1 is connected to the output terminal Vpp_min_1 of the minimum voltage acquisition circuit 220, and its cathode is connected to the input power supply Vin. One end of the resistor R3 is connected to the output terminal Vpp_max of the maximum voltage acquisition circuit 210, and the other end is connected to the anode of the diode D2. The cathode of the diode D2 is connected to the output terminal Vpp_min_1 of the minimum voltage acquisition circuit 220.

[0029] exist Figure 2In the illustrated embodiment, the minimum voltage driving circuit 230 includes an operational amplifier U1, a diode D3, a resistor R4, and a resistor R5. The first input terminal of operational amplifier U1 is connected to the output terminal Vpp_min_1 of the minimum voltage acquisition circuit 220, its second input terminal is connected to its output terminal, its power supply terminal is connected to the output terminal Vpp_max of the maximum voltage acquisition circuit 210, and its ground terminal is grounded. The anode of diode D3 is connected to the output terminal of operational amplifier U1, and its cathode is connected to the output terminal Vpp_min_2 of the minimum voltage driving circuit 230 via resistor R4. One end of resistor R5 is connected to the output terminal Vpp_min_2 of the minimum voltage driving circuit 230, and the other end is grounded. The first and second input terminals of operational amplifier U1 are its non-inverting and inverting input terminals, respectively.

[0030] exist Figure 2 In the embodiment shown, the voltage regulator circuit 240 includes a voltage sampling unit 242, a driving unit 244, a MOSFET M2, a resistor R6, and a capacitor C4.

[0031] Among them, the first connection terminal of MOSFET M2 is connected to the input power supply Vin, and its second connection terminal is connected to the output terminal Vout of the voltage regulator circuit 240; one end of resistor R6 is connected to the first connection terminal of MOSFET M2, and the other end is connected to the control terminal of MOSFET M2; one end of capacitor C4 is connected to the output terminal Vout of voltage regulator circuit 240, and the other end is grounded.

[0032] The voltage sampling unit 242 includes resistors R7 and R8. One end of resistor R7 is connected to the output terminal Vout of the voltage regulator circuit 240, and the other end is connected to node C. One end of resistor R8 is connected to node C, and the other end is grounded. The voltage at node C is the sampling voltage generated by the voltage sampling unit 242 based on the voltage at the output terminal Vout of the voltage regulator circuit 240.

[0033] The first input terminal of the driving unit 244 is connected to the output terminal Vpp_min_2 of the minimum voltage driving circuit 230, its second input terminal is connected to node C, and its output terminal is connected to the control terminal of the MOS transistor M2. When the sampled voltage (i.e., the voltage of node C) is greater than the second voltage (i.e., the voltage output by the output terminal Vpp_min_2), the driving unit 244 drives the MOS transistor M2 to turn off; when the sampled voltage (i.e., the voltage of node C) is less than the second voltage (i.e., the voltage output by the output terminal Vpp_min_2), the driving unit 244 drives the MOS transistor M2 to turn on.

[0034] exist Figure 2In the specific embodiment shown, the driving unit 244 includes an operational amplifier U2, resistors R9 and R10, and a transistor Q23. The first input terminal of the operational amplifier U2 is connected to the output terminal Vpp_min_2 of the minimum voltage driving circuit 230, its second input terminal is connected to node C, its power supply terminal is connected to the output terminal Vpp_max of the maximum voltage acquisition circuit 210, and its ground terminal is grounded. One end of resistor R9 is connected to the output terminal of the operational amplifier U2, and the other end is connected to the control terminal of transistor Q23. The first connection terminal of transistor Q23 is connected to the control terminal of MOSFET M2, and its second connection terminal is grounded. One end of resistor R10 is connected to the control terminal of transistor Q23, and the other end is grounded.

[0035] exist Figure 2 In the specific embodiment shown, the first input terminal and the second input terminal of the operational amplifier U2 are its non-inverting input terminal and its inverting input terminal, respectively; the MOS transistor M2 is a PMOS transistor, and the first connection terminal, the second connection terminal and the control terminal of the MOS transistor M2 are the source, drain and gate of the PMOS transistor, respectively; the transistor Q23 is an NPN transistor, and the first connection terminal, the second connection terminal and the control terminal of the transistor Q23 are the collector, emitter and base of the NPN transistor, respectively.

[0036] To facilitate understanding of this utility model, the following detailed description is provided. Figure 2 The working principle of the circuit shown for filtering power supply ripple.

[0037] ① The maximum voltage acquisition circuit 210 uses MOSFET M1, transistors Q1 and Q2, and resistors R1 and R2 as an ideal diode circuit. Ib_Q1 = (Vin - Vbe_Q1) / R1. Resistor R1 is configured to keep transistor Q1 in saturation, so Vb_Q1 = Vin - Vbe_Q1. When Ve_Q2 - Vbe_Q2 < Ve_Q1 - Vbe_Q1, i.e., Vpp_max < Vin, transistor Q2 is cut off (or turned off), Vg_M1 = 0V, and Vgs_M1 ≈ V_R2 - (Vin - VD_M1). When Vgs(th) < V, MOSFET M1 is turned on, Vpp_max = Vin, and capacitors C1 and C2 are charging. When Ve_Q2 - Vbe_Q2 > Ve_Q1 - Vbe_Q1, i.e., Vpp_max > Vin, transistor Q2 is saturated, Vgs_M1 ≈ Vce_Q2 ≈ -0.3V > Vgs(th), MOSFET M1 is turned off. At this time, capacitors C1 and C2 discharge through transistor Q2, resistors R1, R2, R3, diode D2, diode D1, and capacitor C3, causing the output voltage Vpp_max to drop. By configuring the corresponding capacitance and resistance values, the discharge time of capacitors C1 and C2 is long enough so that even when the input power supply Vin has a lower frequency ripple voltage, the output voltage Vpp_max can still be approximately equal to the maximum peak voltage of the input power supply Vin. Therefore, the output Vpp_max of the maximum value voltage acquisition circuit 210 is approximately the maximum peak voltage of the input power supply Vin.

[0038] ② The minimum voltage acquisition circuit 220 outputs Vpp_max, which is approximately equal to the maximum peak voltage of the input power supply Vin, and is the op-amp IC. Powered by U1 and U2, the input current of the U1 op-amp IC in positive phase is approximately 0A. When (Vin + V_D1) < Vpp_max and the voltage of the input power supply Vin is decreasing, capacitor C3 begins to charge. When capacitor C3 is fully charged, Vpp_min1 ≈ (V_D1 + Vin minimum peak voltage). When (Vin + V_D1) < Vpp_max and the voltage of the input power supply Vin rises, capacitor C3 begins to discharge. Due to the unidirectional conduction characteristics of diodes D1 and D2, the main discharge path of capacitor C3 is through resistor R3 and diode D2. By configuring the corresponding capacitance and resistance values, the discharge time of capacitor C3 is long enough so that when the input power supply Vin has a lower frequency ripple voltage, the voltage at the output terminal Vpp_min1 can also be approximately equal to (V_D1 + Vin minimum peak voltage). Therefore, the output of the minimum voltage acquisition circuit 220, Vpp_min1, is approximately (V_D1 + Vin minimum peak voltage). Meanwhile, resistor R3 and diode D2 provide input current for driving the positive phase input terminal of op-amp IC U1, thereby enabling the voltage to be transmitted to the subsequent stage.

[0039] ③ The minimum voltage drive circuit 230 uses an operational amplifier IC U1 as a voltage follower circuit to drive diode D3, resistor R4, and resistor R5 with a larger output current. Assuming R4 = 0Ω and V_D1 = V_D3, Vpp_min2 = Vpp_min1 - V_D3 = (V_D1 + Vin minimum peak voltage) - V_D3 = Vin minimum peak voltage. Therefore, the output voltage at the output terminal Vpp_min2 is approximately the Vin minimum peak voltage.

[0040] ④ The voltage regulator circuit 240 is a series negative feedback voltage regulator circuit. Assuming resistor R7 = 0Ω, when Vout > Vpp_min2, the negative phase voltage of the U2 operational amplifier IC is greater than the positive phase voltage, so U2 outputs 0V, Vbe_Q23 = 0V, transistor Q23 is cut off, Vgs_M2 = 0V > Vgs(th), MOSFET M2 is cut off, and the output voltage Vout will decrease due to the discharge of capacitor C4. When the output voltage Vout drops to Vout < Vpp_min2, the U2 operational amplifier... The negative phase voltage of the IC is less than the positive phase voltage, and the output of U2 is approximately Vpp_max. By configuring the resistance values ​​of resistors R9 and R10, Vbe_Q23 is approximately 0.7V, transistor Q23 is saturated, Vgs_M2 is approximately -(Vin - 0.3V) < Vgs(th), MOSFET M2 is turned on, and the output voltage Vout will rise due to the charging of capacitor C4. After the series negative feedback voltage regulator circuit 240 stabilizes, the output voltage Vout is approximately equal to Vpp_min2 ≈ Vin minimum peak voltage.

[0041] Assuming the input power supply Vin's ripple voltage Vpp reaches 6V, the maximum peak voltage of the input power supply Vin is 16V, and the minimum peak voltage of the input power supply Vin is 10V, after filtering by this circuit, the output voltage Vout will be approximately equal to the minimum peak voltage of 10V (by adjusting the resistance ratio of resistors R4, R5, R7, and R8, the output of the configuration terminal Vout can be further adjusted to increase or decrease). The output ripple voltage of the output terminal Vout will decrease to the ripple voltage output by the series negative feedback voltage regulator circuit, which is much less than 6V. With circuit optimization, it can even be less than 50mV, ultimately achieving the purpose of filtering out power supply ripple.

[0042] It should be noted that the voltage regulator circuit 240 can use other adjustable series negative feedback voltage regulator circuits with the same function; the MOSFET M2 in the voltage regulator circuit 240 is driven by the common emitter circuit of transistor Q23, which can be replaced by other solutions with stronger driving capability and faster switching speed, such as dedicated MOSFET driver ICs, totem pole transistor push-pull driver circuits, etc.; the combination of MOSFET M1, transistor Q1, transistor Q2, resistor R1, and resistor R2 in the maximum voltage acquisition circuit 210 can be replaced by a dedicated ideal diode IC solution; diodes D1, D2, and D3 can be replaced by dedicated ideal diode ICs to reduce the minimum filterable ripple voltage lower limit.

[0043] In summary, in the power supply ripple filtering circuit provided by this utility model, the input power supply Vin passes through an ideal diode circuit composed of MOSFET M1, transistor Q1, transistor Q2, resistor R1, and resistor R2, plus filter capacitors C1 and C2. When the output Vpp_max is Vin > Vpp_max, transistor Q2 is cut off, MOSFET M1 is turned on, and capacitors C1 and C2 are charged. When the output Vpp_max is Vin < Vpp_max, transistor Q2 is saturated, MOSFET M1 is cut off, and capacitors C1 and C2 are discharged. This process is achieved by configuring the resistors and capacitors... The parameters are configured such that Vpp_max ≈ the maximum peak voltage of Vin. When Vpp_max > (Vin + V_D1), capacitor C3 starts charging when the input power supply voltage Vin decreases and starts discharging to resistor R3 and diode D2 when the input power supply voltage Vin increases. By configuring the parameters of the resistors and capacitors, Vpp_min1 ≈ (the minimum peak voltage of Vin + V_D1). Resistor R3 and diode D2 can simultaneously provide drive current for op-amp IC U1. Op-amp IC U1 will follow up the output voltage of Vpp_min1. The driving capability of this voltage is such that the series diode D3 can cancel the voltage drop across diode D1. When R4 = 0Ω, Vpp_min2 will be approximately equal to the minimum peak voltage of Vin. The voltage divider formed by resistors R4, R5, R7, and R8 can be used to fine-tune the error between the output voltage Vout and the minimum peak voltage of the input power supply Vin. When the output Vout > Vpp_min2, the U2 op-amp IC outputs 0V, transistor Q23 is cut off, Vgs_M2 = V_R6 = 0V > Vgs(th), MOSFET M2 is cut off, and capacitor C4 discharges. The output voltage Vout decreases. When the output voltage Vout < Vpp_min2, the output of the U2 op-amp IC is approximately equal to Vpp_max. Resistors R9 and R10 divide the voltage, protecting transistor Q23 and driving it to saturation. Vgs_M2 = -(Vin - 0.3V) < Vgs(th), and MOSFET M2 saturates. Due to the charging of capacitor C4, the output voltage Vout rises. After the series-type negative feedback voltage regulator circuit 240 stabilizes, the output voltage Vout is approximately equal to Vpp_min2 ≈ Vin's minimum peak voltage. Thus, the ripple voltage of the original power supply is filtered by the series-type voltage regulator circuit, and the output voltage is Vin's minimum peak voltage. This achieves the purpose of filtering out the power supply ripple voltage.

[0044] In other words, the input power supply Vin outputs Vpp_max through the maximum voltage acquisition circuit 210. A capacitor C1 of sufficient capacity is selected so that Vpp_max, when stable, is approximately equal to the maximum peak voltage of the input power supply Vin. The minimum voltage acquisition circuit 220 outputs Vpp_min1. When the instantaneous Vpp_max is greater than the input power supply Vin voltage and the input power supply Vin voltage is decreasing, capacitor C3 is charging. The voltage of capacitor C3 when fully charged and stable is approximately Vpp_max - (the minimum peak voltage of Vin + V_D1). Therefore... Vpp_min1 ≈ minimum peak voltage of Vin + V_D1; the minimum voltage drive circuit 230 enhances the driving capability of Vpp_min1, sufficient to drive subsequent circuits without voltage change. Assuming R4 = 0Ω and V_D1 = V_D3, Vpp_min2 ≈ Vpp_min1 - V_D3 = minimum peak voltage of Vin + V_D1 - V_D3 = minimum peak voltage of Vin; assuming R7 = R4 = 0Ω, the series negative feedback voltage regulator circuit 240 will stabilize the output voltage Vout at Vpp_min2. The output voltage Vout is reduced to the minimum peak voltage (Vpp_min2) of the input power supply Vin, filtering out the power supply ripple and ultimately achieving the goal of power supply ripple filtering.

[0045] Furthermore, since the energy storage capacitor C3 mainly uses resistor R3 and diode D2 as the discharge path, a wider frequency range of ripple filtering can be covered by setting different discharge times. And since the discharge path is independent of the load RL, it is almost unaffected by changes in the size of the load RL. No inductor is needed in the circuit, and most of the capacitors are only used to power the filter circuit. The capacitors will not require larger capacitors as the load increases. Therefore, the required space volume will hardly increase due to the increase in load.

[0046] It should be noted that any modifications made by those skilled in the art to the specific embodiments of this utility model do not depart from the scope of the claims of this utility model. Accordingly, the scope of the claims of this utility model is not limited to the foregoing specific embodiments.

Claims

1. A circuit for filtering power supply ripple, characterized by, It comprises: a maximum voltage acquisition circuit, an input end of which is connected with an input power Vin, which is used to acquire the maximum peak voltage of the input power Vin and output the maximum peak voltage of the input power Vin through an output end Vpp_max thereof; a minimum voltage acquisition circuit, a first connection end of which is connected with the output end Vpp_max of the maximum voltage acquisition circuit, and a second connection end of which is connected with the input power Vin, the minimum voltage acquisition circuit generating a first voltage based on the maximum peak voltage of the input power Vin and the input power Vin and outputting the first voltage through an output end Vpp_min_1 thereof, the first voltage being related to the minimum peak voltage of the input power Vin; a minimum voltage drive circuit, a power supply end of which is connected with the output end Vpp_max of the maximum voltage acquisition circuit, and an input end of which is connected with the output end Vpp_min_1 of the minimum voltage acquisition circuit, the minimum voltage drive circuit generating a second voltage based on the maximum peak voltage of the input power Vin and the first voltage and outputting the second voltage through an output end Vpp_min_2 thereof, the second voltage being related to the minimum peak voltage of the input power Vin; a voltage stabilizing circuit, a control end of which is connected with the output end Vpp_min_2 of the minimum voltage drive circuit, a power supply end of which is connected with the input power Vin, and an output end of which is Vout, the voltage stabilizing circuit generating a stable output voltage based on the input power Vin and the second voltage and outputting the stable output voltage through the output end Vout thereof, the stable output voltage being related to the second voltage, wherein the input power Vin has a ripple voltage.

2. The circuit for filtering power supply ripple according to claim 1, wherein a difference between the first voltage and the minimum peak voltage of the input power Vin is a predetermined voltage value; the second voltage is proportional to the minimum peak voltage of the input power Vin; the stable output voltage is proportional to the second voltage.

3. The circuit for filtering power supply ripple according to claim 1 or 2, wherein the maximum voltage acquisition circuit comprises an ideal diode and a capacitor C1, a positive electrode of the ideal diode being connected with the input power Vin, and a negative electrode of the ideal diode being connected with the output end Vpp_max of the maximum voltage acquisition circuit, one end of the capacitor C1 being connected with the output end Vpp_max of the maximum voltage acquisition circuit, and the other end of the capacitor C1 being grounded.

4. The circuit for filtering power supply ripple according to claim 3, wherein the ideal diode comprises a MOS tube M1, a triode Q1, a triode Q2, a resistor R1 and a resistor R2, The first connection end of the MOS tube M1 is connected with the input power Vin, the second connection end is connected with the output end Vpp_max of the maximum voltage acquisition circuit, and the control end is grounded through the resistor R2; the first connection end of the transistor Q1 is connected with the first connection end of the MOS tube M1, the second connection end is grounded through the resistor R1, and the control end is connected with the second connection end; the first connection end of the transistor Q2 is connected with the second connection end of the MOS tube M1, the second connection end is connected with the control end of the MOS tube M1, and the control end is connected with the control end of the transistor Q1.

5. The power supply ripple filtering circuit according to claim 4, wherein, the MOS tube M1 is a PMOS tube, the first connection end, the second connection end and the control end of the MOS tube M1 are the drain, the source and the gate of the PMOS tube respectively; the transistor Q1 is a PNP type transistor, the first connection end, the second connection end and the control end of the transistor Q1 are the emitter, the collector and the base of the PNP type transistor respectively; the transistor Q2 is a PNP type transistor, the first connection end, the second connection end and the control end of the transistor Q2 are the emitter, the collector and the base of the PNP type transistor respectively.

6. The power supply ripple filtering circuit according to claim 1 or 2, wherein, the minimum voltage acquisition circuit comprises a capacitor C3, a resistor R3, a diode D1 and a diode D2, one end of the capacitor C3 is connected with the output end Vpp_max of the maximum voltage acquisition circuit, the other end is connected with the output end Vpp_min_1 of the minimum voltage acquisition circuit; the positive electrode of the diode D1 is connected with the output end Vpp_min_1 of the minimum voltage acquisition circuit, the negative electrode is connected with the input power Vin; one end of the resistor R3 is connected with the output end Vpp_max of the maximum voltage acquisition circuit, the other end is connected with the positive electrode of the diode D2; the negative electrode of the diode D2 is connected with the output end Vpp_min_1 of the minimum voltage acquisition circuit.

7. The power supply ripple filtering circuit according to claim 1 or 2, wherein, the minimum voltage drive circuit comprises an operational amplifier U1, a diode D3, a resistor R4 and a resistor R5, the first input end of the operational amplifier U1 is connected with the output end Vpp_min_1 of the minimum voltage acquisition circuit, the second input end is connected with the output end, the power supply end is connected with the output end Vpp_max of the maximum voltage acquisition circuit, and the grounding end is grounded; the positive electrode of the diode D3 is connected with the output end of the operational amplifier U1, the negative electrode is connected with the output end Vpp_min_2 of the minimum voltage drive circuit through the resistor R4; one end of the resistor R5 is connected with the output end Vpp_min_2 of the minimum voltage drive circuit, and the other end is grounded.

8. The power supply ripple filtering circuit according to claim 1 or 2, wherein, The voltage stabilizing circuit comprises a voltage sampling unit, a driving unit, a MOS tube M2, a resistor R6 and a capacitor C4, The first connecting end of the MOS tube M2 is connected with the input power Vin, and the second connecting end is connected with the output end Vout of the voltage stabilizing circuit; one end of the resistor R6 is connected with the first connecting end of the MOS tube M2, and the other end is connected with the control end of the MOS tube M2; one end of the capacitor C4 is connected with the output end Vout of the voltage stabilizing circuit, and the other end is grounded; The voltage sampling unit comprises a resistor R7 and a resistor R8; one end of the resistor R7 is connected with the output end Vout of the voltage stabilizing circuit, and the other end is connected with a node C; one end of the resistor R8 is connected with the node C, and the other end is grounded; the voltage of the node C is a sampling voltage generated by the voltage sampling unit based on the voltage of the output end Vout of the voltage stabilizing circuit; The first input end of the driving unit is connected with the output end Vpp_min_2 of the minimum voltage driving circuit, the second input end is connected with the node C, and the output end is connected with the control end of the MOS tube M2; when the sampling voltage is greater than the second voltage, the driving unit drives the MOS tube M2 to be turned off; when the sampling voltage is less than the second voltage, the driving unit drives the MOS tube M2 to be turned on.

9. The circuit for filtering power supply ripple according to claim 8, characterized in that, The driving unit comprises an operational amplifier U2, a resistor R9, a resistor R10 and a triode Q23, The first input end of the operational amplifier U2 is connected with the output end Vpp_min_2 of the minimum voltage driving circuit, the second input end is connected with the node C, the power supply end is connected with the output end Vpp_max of the maximum voltage obtaining circuit, and the grounding end is grounded; One end of the resistor R9 is connected with the output end of the operational amplifier U2, and the other end is connected with the control end of the triode Q23; the first connecting end of the triode Q23 is connected with the control end of the MOS tube M2, and the second connecting end is grounded; one end of the resistor R10 is connected with the control end of the triode Q23, and the other end is grounded.

10. The circuit for filtering power supply ripple according to claim 9, characterized in that, The first input end and the second input end of the operational amplifier U1 are the non-inverting input end and the inverting input end respectively; The first input end and the second input end of the operational amplifier U2 are the non-inverting input end and the inverting input end respectively; The MOS tube M2 is a PMOS tube, and the first connecting end, the second connecting end and the control end of the MOS tube M2 are the source, the drain and the gate of the PMOS tube respectively; The triode Q23 is an NPN triode, and the first connecting end, the second connecting end and the control end of the triode Q23 are the collector, the emitter and the base of the NPN triode respectively.

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