Integrated component and electronic equipment

Abstract

The utility model discloses an integrated assembly and electronic equipment, and the integrated assembly comprises a first substrate and a second substrate, and the first substrate and the second substrate are oppositely disposed in a first direction; the first conductive pattern and the second conductive pattern are located on the side, facing the second substrate, of the first substrate, and the first conductive pattern and the second conductive pattern are distributed at intervals; the first power device is located on the side, facing the second substrate, of the first conductive pattern; the second power device is located on the side, facing the second substrate, of the second conductive pattern; the second conductive pattern is located on the side, facing the first substrate, of the second substrate, and the second conductive pattern is electrically connected with the source electrode of the first power device and the second conductive pattern; the third conductive pattern is positioned on one side, back to the first substrate, of the second substrate; the fourth conductive pattern is electrically connected with the source electrode of the second power device and the third conductive pattern; in the first direction, the second conductive pattern and the third conductive pattern are at least partially overlapped. According to the embodiment of the invention, the problems of electric signal waveform oscillation and voltage overshoot peak can be solved.

Description

Technical Field

[0001] This application relates to the field of power device integration technology, specifically to an integrated component and electronic device. Background Technology

[0002] Circuits employing power semiconductor devices can control current and voltage through frequency conversion, voltage conversion, and current conversion, thereby achieving the conversion and control of electrical energy. Therefore, power semiconductor devices are widely used in various power electronic systems, such as inverter systems, power conversion systems, and frequency conversion and voltage conversion systems.

[0003] In power electronic systems, power semiconductor devices control current through switching processes, which often involve changes in the current flow path within the module, known as "commutation." During this process, the rapidly changing current couples with the module's parasitic inductance, causing current and voltage overshoot and oscillations.

[0004] Therefore, how to solve the problems of electrical signal waveform oscillation and voltage overshoot spikes is a research issue for those skilled in the art. Utility Model Content

[0005] This application provides an integrated component and electronic device that helps to improve the problems of electrical signal waveform oscillation and voltage overshoot spikes.

[0006] In a first aspect, embodiments of this application provide: 1. An integrated component, comprising: a first substrate and a second substrate, the first substrate and the second substrate being opposed to each other in a first direction; a conductive pattern A and a conductive pattern B located on the side of the first substrate facing the second substrate, the conductive patterns A and B being spaced apart; a power device A located on the side of the conductive pattern A facing the second substrate; a power device B located on the side of the conductive pattern B facing the second substrate; a second conductive pattern located on the side of the second substrate facing the first substrate, the second conductive pattern being electrically connected to the source of the power device A and the conductive pattern B; a third conductive pattern located on the side of the second substrate facing away from the first substrate; a fourth conductive pattern being electrically connected to the source of the power device B and the third conductive pattern; in the first direction, the second conductive pattern and the third conductive pattern at least partially overlap.

[0007] According to an embodiment of the first aspect of this application, the integrated component further includes: a pad A, located on the side where the source of power device A faces the second substrate, and a second conductive pattern is electrically connected to the source of power device A through pad A; a pad B, located on the side where the source of power device B faces the second substrate, and a fourth conductive pattern is electrically connected to the source of power device B through pad B; a first pad, located on the side where conductive pattern A faces the second substrate; a fifth conductive pattern, located on the side where the second substrate faces the first substrate and is in contact with the first pad; and a second pad, located on the side where conductive pattern B faces the second substrate, and the second conductive pattern is electrically connected to the drain of power device B through the second pad.

[0008] According to any of the foregoing embodiments of the first aspect of this application, in the first direction, the thickness of pad A and pad B are equal, the thickness of the first pad and the thickness of the second pad are equal, and the thickness of the first pad is greater than the thickness of pad A.

[0009] According to any of the foregoing embodiments of the first aspect of this application, the minimum distance between pad A, pad B, the first pad, and the second pad and the second substrate is equal.

[0010] According to any of the foregoing embodiments of the first aspect of this application, the integrated component further includes: a gate-source connection structure A, comprising a gate-source connection structure A and a source-source connection structure that are insulated from each other, wherein the gate-source connection structure A is electrically connected to the gate of a power device A, and the source-source connection structure A is electrically connected to the source of the power device A; and wherein the gate-source connection structure A is electrically connected to a gate terminal conductive pattern A, and the source-source connection structure A is electrically connected to a source terminal conductive pattern A, wherein the gate terminal conductive pattern A and the source terminal conductive pattern A are spaced apart on the side of the first substrate facing the second substrate; and a gate-source connection structure B, comprising a gate-source connection structure B and a source-source connection structure B that are insulated from each other, wherein the gate-source connection structure B is electrically connected to the gate of a power device B, and the source-source connection structure B is electrically connected to the source of the power device B; and wherein the gate-source connection structure B is electrically connected to a gate terminal conductive pattern B, and the source-source connection structure B is electrically connected to a source terminal conductive pattern B, wherein the gate terminal conductive pattern B and the source terminal conductive pattern B are spaced apart on the side of the first substrate facing the second substrate.

[0011] According to any of the foregoing embodiments of the first aspect of this application, the gate-source connection structure A includes a PCB circuit board A, the gate connection structure A and the source connection structure A are different pads insulated on the base plate of the PCB circuit board A, and the base plate of the PCB circuit board A faces the power device A; and / or, the gate-source connection structure B includes a PCB circuit board B, the gate connection structure B and the source connection structure B are different pads insulated on the base plate of the PCB circuit board B, and the base plate of the PCB circuit board B faces the power device B.

[0012] According to any of the foregoing embodiments of the first aspect of this application, the A-gate connection structure includes an A-gate connection conductive pattern, the A-source connection structure includes an A-source connection conductive pattern, the A-gate connection conductive pattern and the A-source connection conductive pattern are on the same layer as the A-conductive pattern, and the A-gate connection conductive pattern is connected to the gate of the A-power device via a bonding wire, and the A-source connection conductive pattern is connected to the source of the A-power device via a bonding wire; and / or, the B-gate connection structure includes a B-gate connection conductive pattern, the B-source connection structure includes a B-source connection conductive pattern, the B-gate connection conductive pattern and the B-source connection conductive pattern are on the same layer as the B-conductive pattern, and the B-gate connection conductive pattern is connected to the gate of the B-power device via a bonding wire, and the B-source connection conductive pattern is connected to the source of the B-power device via a bonding wire.

[0013] According to any of the foregoing embodiments of the first aspect of this application, the gate-connected conductive pattern A and the source-connected conductive pattern A are arranged in parallel, and the gate-connected conductive pattern B and the source-connected conductive pattern B are arranged in parallel; and / or, the source-connected conductive pattern A surrounds the gate-connected conductive pattern A, and the source-connected conductive pattern B surrounds the gate-connected conductive pattern B.

[0014] According to any of the foregoing embodiments of the first aspect of this application, the integrated component further includes: a gate resistor A, electrically connected to the gate of power device A; and a gate resistor B, electrically connected to the gate of power device B.

[0015] Secondly, embodiments of this application provide an electronic device that includes integrated components as described in any of the first aspects.

[0016] According to the structure of the integrated component provided in the embodiments of this application, when power device A is turned on, the first current path is: from conductive pattern A to the drain of power device A, then to the source of power device A, then to the second conductive pattern, and then to conductive pattern B; when power device B is turned on, the second current path is: from conductive pattern B to the drain of power device B, then to the source of power device B, then to the fourth conductive pattern, and then to the third conductive pattern; since the second conductive pattern and the third conductive pattern at least partially overlap, the first current path and the second current path at least partially overlap, and the directions of the two current paths in the overlapping part are opposite. In this way, the magnetic induction directions generated by the opposite current paths in the upper and lower conductive layers of the second substrate are the same, so the parasitic inductance is very small, thereby helping to improve the problems of electrical signal waveform oscillation and voltage overshoot spikes.

[0017] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0018] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings, in which the same or similar reference numerals denote the same or similar features, and the drawings are not drawn to scale.

[0019] Figure 1 This paper shows a schematic diagram of a power device in an integrated component provided in an embodiment of the present application;

[0020] Figure 2 This invention illustrates a schematic diagram of an equivalent circuit structure of a power device in an integrated component provided in an embodiment of this application.

[0021] Figure 3 This paper shows a schematic diagram of the circuit principle of a power module in an integrated component provided in an embodiment of this application;

[0022] Figure 4 This paper shows a schematic cross-sectional view of an integrated component provided in an embodiment of this application.

[0023] Figure 5 This paper illustrates a schematic diagram of an internal current path of an integrated component provided in an embodiment of this application.

[0024] Figure 6 This paper shows a schematic diagram of an integrated component packaging structure provided in an embodiment of this application.

[0025] Figure 7 This paper illustrates another structural diagram of the integrated component packaging structure provided in an embodiment of this application;

[0026] Figure 8 This invention provides a schematic diagram showing the distribution of components on a first substrate in an integrated assembly provided in an embodiment of the present application.

[0027] Figure 9 This paper shows a schematic diagram of a first substrate in an integrated component provided in an embodiment of the present application;

[0028] Figure 10 This paper shows a schematic diagram of the structure of an integrated component provided in an embodiment of this application;

[0029] Figure 11 A schematic diagram of a PCB circuit of an integrated component provided in an embodiment of this application is shown;

[0030] Figure 12 This paper shows another PCB circuit diagram of the integrated component provided in an embodiment of this application;

[0031] Figure 13 This illustration shows yet another PCB circuit diagram of the integrated component provided in an embodiment of this application;

[0032] Figure 14 This paper shows a schematic diagram of the internal layout of an integrated component provided in an embodiment of this application;

[0033] Figure 15 This illustration shows another internal layout diagram of the integrated component provided in an embodiment of this application;

[0034] Figure 16 This invention illustrates a connection diagram of components on a first substrate in an integrated assembly provided in an embodiment of this application.

[0035] Figure 17 It shows Figure 16 This illustration shows another connection diagram of the components on the first substrate in the integrated component provided in the embodiments of this application;

[0036] Figure 18 An isometric side view of the integrated component packaging structure provided in an embodiment of this application is shown.

[0037] Explanation of reference numerals in the attached figures:

[0038] 1. Lower metal layer; 2. First substrate; 3. Conductive pattern A;

[0039] 4. First pad; 5. Fifth conductive pattern; 6. Second substrate;

[0040] 7. Third conductive pattern; 8. Power device A; 9. Pad A;

[0041] 10. PCB circuit board A; 11. Second conductive pattern; 12. Conductive pattern B;

[0042] 13. Second pad; 14. Pad B; 15. Power device B;

[0043] 16. PCB circuit board B; 17. Fourth conductive pattern;

[0044] 18. Conductive pattern of source terminal B; 19. Conductive pattern of gate terminal B;

[0045] 20. Conductive pattern of gate terminal A; 21. Conductive pattern of source terminal A;

[0046] 22. Drain signal terminal (A); 23. Kelvin source terminal (A); 24. Gate signal terminal (A);

[0047] 25. Gate signal terminal (B); 26. Kelvin source signal terminal (B);

[0048] 27. Drain terminal (B) or source terminal (A); 28. Insulating part of PCB board; 29. ​​Solder pad;

[0049] 291. Source pad; 292. Gate pad; 30. Copper plating on PCB;

[0050] 31. Via; 32. Gate resistor; 33. Source A connection conductive pattern;

[0051] 34. Gate A is connected to the conductive pattern; 35. Source B is connected to the conductive pattern;

[0052] 36. A grid connected to a conductive pattern. Detailed Implementation

[0053] The features and exemplary embodiments of various aspects of this application will now be described in detail. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain this application and are not configured to limit this application. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples of this application.

[0054] It should be noted that in this paper, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0055] It should be noted that when a component is described as "connected" or "electrically connected" to another component, it can be directly connected to the other component, or there may be one or more intermediate components in between.

[0056] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the embodiments provided in this application can be combined with each other without contradiction.

[0057] As described in the background section, in power electronic systems, during the "commutation" process, the rapidly changing current couples with the parasitic inductance of the module, causing current and voltage overshoot and oscillation.

[0058] To address the aforementioned technical problems, embodiments of this application provide an integrated component and electronic device. By reducing parasitic inductance, the problems of electrical signal waveform oscillation and voltage overshoot spikes are improved.

[0059] The embodiments of this application will be described below with reference to the accompanying drawings.

[0060] To facilitate understanding, the power devices in the integrated components provided in the embodiments of this application will be introduced first.

[0061] The power device can be a transistor. In this application, the embodiment of the power device is a metal-oxide-semiconductor field-effect transistor (MOSFET) as an example for illustration. Figure 1 This illustration shows a schematic diagram of a power device in an integrated component provided in an embodiment of this application, such as... Figure 1 As shown, a MOSFET includes a source S, a gate G, and a drain D, wherein the gate G and the source S are located on one side of the drain D. Figure 2 yes Figure 1 The equivalent circuit diagram of the power device, namely the equivalent circuit diagram of the MOSFET, has the gate (G), source (S), and drain (D) marked in the diagram.

[0062] During switching, power devices often experience voltage and current waveform oscillations and voltage overshoot spikes due to commutation. To mitigate these voltage spikes, common methods include reducing parasitic inductance through metallization patterns on the insulating substrate and adding buffer circuits to the system. Low parasitic inductance can reduce voltage oscillations during turn-on and turn-off, thus reducing switching losses.

[0063] Figure 3 This application provides a schematic diagram of the circuit principle of a power module in an integrated component, as shown in the embodiment. Figure 3 As shown, S1 is the power device of the upper bridge arm, which may include one power device or multiple power devices connected in parallel. S2 is the power device of the lower bridge arm, which may include one power device or multiple power devices connected in parallel.

[0064] The drain of the power device S1 in the upper bridge arm is connected to the positive bus via a DC+ electrical connection, and the source of the power device S1 in the upper bridge arm is connected to the neutral line via an AC electrical connection. The drain of the power device S2 in the lower bridge arm is connected to the neutral line via an AC electrical connection, and the source of the power device S2 in the lower bridge arm is connected to the negative bus via a DC- electrical connection.

[0065] Depend on Figure 3 As can be seen, the embodiments of this application do not introduce additional devices and circuits to reduce parasitic inductance. The embodiments of this application rely on improving the layout of the power module to reduce parasitic inductance and thus improve the problems of electrical signal waveform oscillation and voltage overshoot spikes.

[0066] A power module encapsulates multiple power devices (Insulated-Gate Bipolar Transistors (IGBTs), MOSFETs, and power diodes) within a single module, forming a circuit topology that meets specific requirements. Power modules offer advantages such as high reliability, better heat dissipation, and high standardization; their high integration simplifies system design and assembly. Therefore, power modules are commonly used for current and voltage control in high-power power electronic systems. A power module typically includes power devices, a heat-dissipating metal base plate, an insulating substrate, electrical connection terminals, bonding wires, molding compound, and an external protective housing. Different metallization patterns on the insulating substrate create different circuit topologies to achieve the desired functions.

[0067] based on Figure 3 The schematic diagram is provided to illustrate the integrated components provided in the embodiments of this application.

[0068] Figure 4 This paper shows a schematic cross-sectional view of an integrated component provided in an embodiment of this application, as shown below. Figure 4 As shown, the integrated component may include: a first substrate 2, a second substrate 6, a conductive pattern 3, a conductive pattern 12, a power device 8, a power device 15, a second conductive pattern 11, a third conductive pattern 7, and a fourth conductive pattern 17.

[0069] The first substrate 2 and the second substrate 6 are opposite each other in the first direction Y.

[0070] In this design, the first substrate 2 and the second substrate 6 can be an insulating layer between insulating substrates. The insulating substrate can be an electrically insulating ceramic layer with conductive patterns on both its top and bottom. Typical processes include copper-clad alumina insulating substrates and silicon nitride active metal brazed ceramic substrates, and ceramic-aluminum-clad substrates and insulating metal substrates can also be used. The conductive patterns on the bottom ceramic substrate are etched to form circuit patterns, achieving the required circuit topology and insulation requirements.

[0071] In some embodiments, such as Figure 4 As shown, the integrated component also includes a lower metal layer 1, which is located on the side of the first substrate 2 facing away from the second substrate 6. In some embodiments, the lower metal layer 1 may be connected to a heat dissipation base plate for structural support and to increase the heat dissipation capacity of the power module.

[0072] Conductive pattern 3 (A) and conductive pattern 12 (B) are located on the side of the first substrate 2 facing the second substrate 6, and conductive pattern 3 (A) and conductive pattern 12 (B) are distributed at intervals.

[0073] Among them, conductive patterns are generally copper-clad.

[0074] Power device 8 is located on the side of conductive pattern 3 facing the second substrate 6.

[0075] Power device 15 is located on the side of conductive pattern 12 facing the second substrate 6.

[0076] The second conductive pattern 11 is located on the side of the second substrate 6 facing the first substrate 2, and the second conductive pattern 11 is electrically connected to the source of the power device A 8 and the conductive pattern B 12.

[0077] The third conductive pattern 7 is located on the side of the second substrate 6 facing away from the first substrate 2.

[0078] The fourth conductive pattern 17 is electrically connected to the source of the power device 15 and the third conductive pattern 7.

[0079] In the first direction Y, the second conductive pattern 11 and the third conductive pattern 7 at least partially overlap.

[0080] In some embodiments, such as Figure 5 As shown, conductive pattern 3 (A) is electrically connected to the positive busbar connection structure DC+, conductive pattern 7 (B) is electrically connected to the negative busbar connection structure DC-, and conductive pattern 12 (C) is electrically connected to the neutral line connection structure AC.

[0081] The electrical connection between conductive patterns and connection structures can be achieved through welding, such as... Figure 6 As shown, conductive pattern 3 (A) is in close contact with the positive busbar connection structure DC+ and is electrically connected by welding; conductive pattern 7 (B) is electrically connected to the negative busbar connection structure DC- by welding; and conductive pattern 12 (C) is electrically connected to the neutral line connection structure AC by welding.

[0082] The electrical connection between conductive patterns and connection structures can be achieved using bonding wire connections, such as... Figure 7 As shown, since the connection relationships are the same, they will not be repeated here.

[0083] It should be noted that electrical connections to external structures can be achieved in various ways. Direct soldering of power terminals is one method. Figure 6 The terminal connection process used includes, but is not limited to, solder paste soldering, ultrasonic metal soldering, and laser soldering; or interconnection with power terminals is achieved through bonding wires. Figure 7 The bonding processes include, but are not limited to, thick aluminum wire bonding, aluminum strip bonding, and copper wire bonding. The external connection structures DC+ and DC- can also employ a multilayer structure to reduce parasitic inductance.

[0084] See also Figure 5Since power device 8 is located on conductive pattern 3, it is equivalent to a DC+ electrical connection between the drain and positive bus of power device 8; and the second conductive pattern 11 is electrically connected to the source of power device 8 and conductive pattern 12, which is equivalent to an AC electrical connection between the source and neutral line of power device 8. Therefore, power device 8 is... Figure 5 In this embodiment, it is equivalent to Figure 3 The power device S1 in the upper bridge arm of the schematic diagram.

[0085] Based on the same principle, such as Figure 5 As shown, the drain of power device 15 is AC-connected to the neutral wire connection structure, and the source of power device 15 is DC-connected to the negative bus connection structure. Therefore, power device 15 is equivalent to... Figure 3 The power device S2 in the lower bridge arm of the schematic diagram.

[0086] Please refer to the structure of the integrated component provided in the embodiments of this application. Figure 5 When power device 8 is turned on, the first current path is: from conductive pattern 3 to the drain of power device 8, then to the source of power device 8, then to the second conductive pattern 11, and then to conductive pattern 12. When power device 15 is turned on, the second current path is: from conductive pattern 12 to the drain of power device 15, then to the source of power device 15, then to the fourth conductive pattern 17, and then to the third conductive pattern 7. Since the second conductive pattern 11 and the third conductive pattern 7 overlap at least partially, the first current path and the second current path overlap at least partially, and the directions of the two current paths are opposite in the overlapping part. In this way, the magnetic induction directions generated by the opposite current paths in the upper and lower conductive layers of the second substrate are the same, so the parasitic inductance is very small, which helps to improve the problems of electrical signal waveform oscillation and voltage overshoot spikes.

[0087] It should be understood that the integrated component may also include a housing and a metal heat sink. The accompanying drawings of this application only show one phase of the power module as a typical example, and do not show the housing and metal heat sink.

[0088] In some embodiments, such as Figure 4 As shown, the integrated component may also include: pad A 9, pad B 14, first pad 4, fifth conductive pattern 5, and second pad 13.

[0089] A pad 9 is located on the side of the power device 8 facing the second substrate 6, and the second conductive pattern 11 is electrically connected to the source of the power device 8 through the pad 9.

[0090] The second pad 14 is located on the side of the power device 15 facing the second substrate 6, and the fourth conductive pattern 17 is electrically connected to the source of the power device 15 through the second pad 14.

[0091] The first pad 4 is located on the side of the conductive pattern 3 facing the second substrate 6.

[0092] The fifth conductive pattern 5 is located on the side of the second substrate 6 facing the first substrate 2 and is in contact with the first pad 4.

[0093] The second pad 13 is located on the side of the conductive pattern 12 facing the second substrate 6, and the second conductive pattern 11 is electrically connected to the drain of the power device 15 through the second pad 13.

[0094] The connecting pads are all made of conductive materials, which can be copper or conductive materials that match the thermal expansion coefficient of the power devices, thereby improving the reliability of the pad connections.

[0095] In the embodiments of this application, multiple pads are used to connect the devices, which can reserve space for the gate and source connection structure of the power device and is more conducive to heat dissipation.

[0096] In some embodiments, such as Figure 4 As shown, in the first direction Y, the thickness of pad 9 and pad 14 is equal, the thickness of first pad 4 and second pad 13 is equal, and the thickness of first pad 4 is greater than the thickness of pad 9.

[0097] In this embodiment, the thickness of each pair of connected pads is made equal, resulting in a neater structure. Furthermore, during the manufacturing process, two pads of the same thickness can be manufactured together, thereby simplifying the process.

[0098] In some embodiments, such as Figure 4 As shown, the minimum distance between pad A 9, pad B 14, first pad 4 and second pad 13 and the second substrate 6 is equal.

[0099] By ensuring that the minimum spacing between the four pads and the second substrate 6 is equal, the tilt of the second substrate 6 is kept within a reasonable range, thus guaranteeing the stability and reliability of the integrated component.

[0100] Figure 8 This invention illustrates a schematic diagram of the component distribution on a first substrate in an integrated component provided in an embodiment of this application, such as... Figure 8 As shown, the integrated component may also include: a B Kelvin source terminal conductive pattern 18, a B gate terminal conductive pattern 19, an A gate terminal conductive pattern 20, and an A Kelvin source terminal conductive pattern 21, as shown in the figure. Figure 8 This embodiment also demonstrates a layout of eight parallel A power devices 8 and eight parallel B power devices 15.

[0101] In some embodiments, the integrated component may further include gate-source connection structure A and gate-source connection structure B.

[0102] The gate-source connection structure includes a gate connection structure and a source connection structure that are insulated from each other. The gate connection structure is electrically connected to the gate of the power device 8, and the source connection structure is electrically connected to the source of the power device 8. Furthermore, the gate connection structure is electrically connected to the gate terminal conductive pattern 20, and the source connection structure is electrically connected to the source terminal conductive pattern 21. The gate conductive pattern and the source conductive pattern are spaced apart on the side of the first substrate 2 facing the second substrate 6. For example, the source terminal conductive pattern 21 is a Kelvin source terminal conductive pattern.

[0103] The gate-source connection structure includes a gate connection structure and a source connection structure that are insulated from each other. The gate connection structure is electrically connected to the gate of the power device 15, and the source connection structure is electrically connected to the source of the power device 15. Furthermore, the gate connection structure is electrically connected to the gate terminal conductive pattern 19, and the source connection structure is electrically connected to the source terminal conductive pattern 18. The gate conductive pattern and the source conductive pattern are spaced apart on the side of the first substrate 2 facing the second substrate 6. For example, the source terminal conductive pattern 18 is a Kelvin source terminal conductive pattern.

[0104] In this embodiment, by setting a gate-source connection structure A, signals can be accessed to the gate and source of power device A through the gate-source connection structure A. Similarly, by setting a gate-source connection structure B, signals can be accessed to the gate and source of power device B through the gate-source connection structure B, thereby facilitating the control of power device A and power device B.

[0105] The following are exemplary descriptions of gate-source connection structure A and gate-source connection structure B, as well as some other structures.

[0106] In some embodiments, please refer to the reference Figure 4 , Figure 11 , Figure 12 and Figure 13 The gate-source connection structure includes a PCB circuit board 10. The gate connection structure and the source connection structure are different pads that are insulated on the base plate of the PCB circuit board 10. The base plate of the PCB circuit board 10 faces the power device 8.

[0107] And / or, the gate-source connection structure includes the PCB circuit board 16, and the gate connection structure and the source connection structure are different pads insulated on the base plate of the PCB circuit board 16, with the base plate of the PCB circuit board 16 facing the power device 15.

[0108] like Figure 11As shown, pad 29 may include source pad 291 and gate pad 292. Source pad 291 is used to connect to the source of the power device, and gate pad 292 is used to connect to the gate of the power device.

[0109] It is important to note that, such as Figure 4 As shown, the thickness of PCB circuit board 10 (A) and PCB circuit board 16 (B) must be less than the thickness of pad 9 (A) and pad 14 (B), respectively, to ensure the reliability of power module soldering.

[0110] Please refer to the reference. Figure 4 and Figure 8 The PCB circuit board A 10 and PCB circuit board B 16 can realize the electrical connection of the conductive patterns (including the patterns 18-21 in the figures) at the gate, source, and signal terminals of the power device. It is understood that the source pad 291 on the bottom plate of PCB circuit board A 10 is electrically connected to the conductive pattern 21 of the source terminal of PCB circuit board A 10, and the gate pad 292 on the bottom plate of PCB circuit board A 10 is electrically connected to the conductive pattern 20 of the gate terminal of PCB circuit board A 10; the source pad 291 on the bottom plate of PCB circuit board B 16 is electrically connected to the conductive pattern 18 of the source terminal of PCB circuit board B 16, and the gate pad 292 on the bottom plate of PCB circuit board B 16 is electrically connected to the conductive pattern 19 of the gate terminal of PCB circuit board B 16.

[0111] The above-mentioned connection process can employ various power semiconductor packaging connection processes, with typical connection methods including reflow soldering, conductive silver paste, and sintering.

[0112] The PCB circuit design scheme in the embodiments of this application is as follows: Figures 11-13 As shown. The conductive patterns of the gate, source, and signal terminals on the substrate of the power device are connected to the PCB circuit pads 29 through a connection process.

[0113] For PCB circuit boards without a gate resistor, the gate line can be located on the bottom layer of the PCB. Figure 11 (a) Electrical connections to the gate metallization pattern are completed to reduce parasitic parameters generated during vias; the device source path is connected to the top layer via vias. Figure 11 (b)) The electrical connection with the Kelvin source conductive pattern is completed by the top copper layer.

[0114] For PCB circuit boards with added gate resistors, the situation is as follows: Figure 12 As shown, the gate circuit is electrically connected to the gate metallization pattern after being connected via vias on the top layer of the PCB circuit. If the gate distance between the upper and lower bridge arm power semiconductor chips is large, a gate resistor can be added to the bottom layer of the PCB circuit. The top and bottom layer structures are as follows. Figure 13 As shown, this solution requires soldering resistors onto the PCB first, followed by soldering power semiconductor chips onto the PCB circuit board, which increases the process flow and reduces reliability.

[0115] Figure 9 This paper illustrates a structural schematic diagram of a first substrate in an integrated component provided in an embodiment of this application. Figure 9 The image shown is a top view of the first substrate 2 after the solder pads (which may include figures 9 and 14 in the figures) and PCB circuit board (which may include figures 10 and 16 in the figures) have been soldered.

[0116] Figure 10 This application provides a schematic diagram of the structure of an integrated component, as shown in the embodiment. Figure 10 As shown, the integrated component may further include a drain signal terminal 22, a Kelvin source terminal 23, a gate signal terminal 24, a gate signal terminal 25, a Kelvin source signal terminal 26, and a drain or source terminal 27. (Refer to reference...) Figure 8 and Figure 10 Drain signal terminal 22 is connected to conductive pattern 3, Kelvin source terminal 23 is connected to source terminal conductive pattern 21, and gate signal terminal 24 is connected to gate terminal conductive pattern 20. Gate signal terminal 25 is connected to gate terminal conductive pattern 19, Kelvin source signal terminal 26 is connected to source terminal conductive pattern 18, and drain or source terminal 27 is connected to conductive pattern 12.

[0117] In other embodiments, such as Figure 17 As shown, the gate connection structure includes a gate connection conductive pattern 34, and the source connection structure includes a source connection conductive pattern 33. The gate connection conductive pattern 34 and the source connection conductive pattern 33 are on the same layer as the conductive pattern 3. The gate connection conductive pattern 34 is connected to the gate of the power device 8 through a bonding wire, and the source connection conductive pattern 33 is connected to the source of the power device 8 through a bonding wire.

[0118] And / or, the gate connection structure includes a gate connection conductive pattern 36, the source connection structure includes a source connection conductive pattern 35, the gate connection conductive pattern 36 and the source connection conductive pattern 35 are on the same layer as the conductive pattern 12, and the gate connection conductive pattern 36 is connected to the gate of the power device 15 through a bonding wire, and the source connection conductive pattern 35 is connected to the source of the power device 15 through a bonding wire.

[0119] Understandably, gate A connecting conductive pattern 34 is electrically connected to gate A terminal conductive pattern 20, and source A connecting conductive pattern 33 is electrically connected to source A terminal conductive pattern. Gate B connecting conductive pattern 36 is electrically connected to gate B terminal conductive pattern 19, and source B connecting conductive pattern 35 is electrically connected to source B terminal conductive pattern.

[0120] Understandably, the gate-connected conductive pattern 34 and the source-connected conductive pattern 33 are spaced apart from each other, and both the gate-connected conductive pattern 34 and the source-connected conductive pattern 33 are spaced apart from the conductive pattern 3. The gate-connected conductive pattern 34, the source-connected conductive pattern 33, and the conductive pattern 3 are located on the same side of the first substrate 2. The gate-connected conductive pattern 34, the source-connected conductive pattern 33, and the conductive pattern 3 can be made of the same material.

[0121] Similarly, the gate-connected conductive pattern 36 and the source-connected conductive pattern 35 are spaced apart from each other, and both the gate-connected conductive pattern 36 and the source-connected conductive pattern 35 are spaced apart from the conductive pattern 12. The gate-connected conductive pattern 36, the source-connected conductive pattern 35, and the conductive pattern 12 are located on the same side of the first substrate 2. The gate-connected conductive pattern 36, the source-connected conductive pattern 35, and the conductive pattern 12 can be made of the same material.

[0122] It should be noted that the above examples illustratively illustrate that the gate-source connection structure A and the gate-source connection structure B can adopt the structure of PCB circuit board or conductive pattern, and the above examples are not intended to limit this application.

[0123] In some embodiments, such as Figure 16 As shown, the gate-connected conductive pattern 34 and the source-connected conductive pattern 33 are arranged in parallel, and the gate-connected conductive pattern 36 and the source-connected conductive pattern 35 are arranged in parallel.

[0124] And / or, such as Figure 17 As shown, conductive pattern 33 connected to source A surrounds conductive pattern 34 connected to gate A, and conductive pattern 35 connected to source B surrounds conductive pattern 36 connected to gate B.

[0125] Figure 16 and Figure 17 The gates of all these power devices are extremely incompatible with Kelvin sources for PCB soldering. Figure 17 In the diagram, conductive pattern 33, connected to source A, surrounds conductive pattern 34, connected to gate A. Conductive pattern 35, connected to source B, surrounds conductive pattern 36, connected to gate B. Compared to... Figure 16 It has a smaller gate-source parasitic inductance.

[0126] In some embodiments, such as Figure 12 As shown, the integrated component may also include: gate resistor A and gate resistor B.

[0127] Gate resistor A is electrically connected to the gate of power device A 8;

[0128] Gate resistor B is electrically connected to the gate of power device B 15.

[0129] In this embodiment, gate resistors A and B are provided for the power devices on bridge arm A and bridge arm B, respectively, which can more effectively dampen and attenuate oscillations.

[0130] The integrated component structure of this application not only supports power module designs with eight parallel connections in the upper and lower bridge arms, but is also compatible with module designs with lower parallel connections. For modules with lower parallel connections, the integration density can be increased by reducing the area of ​​the upper and lower insulating substrates and the metallized patterns on them. For a 6-parallel power module layout, see... Figure 14 As shown, the layout for 4 parallel power modules is as follows: Figure 15 As shown.

[0131] The integrated component packaging structure provided in this application embodiment realizes a half-bridge electrical topology. By leading out the power module structure and power terminals respectively in parallel, a full-bridge or three-phase bridge topology can be realized to meet the power system requirements.

[0132] Based on the same inventive concept, embodiments of this application also provide an electronic device, which includes the integrated components of any of the foregoing embodiments. It is understood that the electronic device has the beneficial effects of the integrated components provided in the embodiments of this application, namely, it can alleviate the problems of electrical signal waveform oscillation and voltage overshoot spikes.

[0133] It should be noted that in the embodiments shown in the figures above, the resistor is presented as a single resistor, and the capacitor as a single capacitor. In other embodiments, the resistor may be an integrated combination of series, parallel, or mixed resistors, and the capacitor may be an integrated combination of series, parallel, or mixed capacitors. The specific parameters of each device can be set according to actual needs, and this application does not limit this.

[0134] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other.

[0135] The embodiments described above are not exhaustive, nor do they limit the application to the specific embodiments described herein. Clearly, many modifications and variations can be made based on the above description. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to effectively utilize this application and its modifications. This application is limited only by the claims and their full scope and equivalents.

Claims

1. An integrated component, characterized in that, include: A first substrate and a second substrate, wherein the first substrate and the second substrate are opposed to each other in a first direction; Conductive pattern A and conductive pattern B are located on the side of the first substrate facing the second substrate, and conductive pattern A and conductive pattern B are distributed at intervals. A power device is located on the side of the conductive pattern A facing the second substrate; A power device B is located on the side of the conductive pattern B facing the second substrate; The second conductive pattern is located on the side of the second substrate facing the first substrate, and the second conductive pattern is electrically connected to the source of the power device A and the conductive pattern B. The third conductive pattern is located on the side of the second substrate facing away from the first substrate; The fourth conductive pattern is electrically connected to the source of the power device B and the third conductive pattern; In the first direction, the second conductive pattern and the third conductive pattern at least partially overlap.

2. The integrated component according to claim 1, characterized in that, The integrated component also includes: A pad is located on the side of the power device A facing the second substrate, and the second conductive pattern is electrically connected to the source of the power device A through the pad. A pad is located on the side of the power device B facing the second substrate, and the fourth conductive pattern is electrically connected to the source of the power device B through the pad. The first pad is located on the side of the conductive pattern facing the second substrate; The fifth conductive pattern is located on the side of the second substrate facing the first substrate and is in contact with the first pad. The second pad is located on the side of the B conductive pattern facing the second substrate, and the second conductive pattern is electrically connected to the drain of the B power device through the second pad.

3. The integrated component according to claim 2, characterized in that, In the first direction, the thickness of pad A and pad B are equal, the thickness of the first pad and the thickness of the second pad are equal, and the thickness of the first pad is greater than the thickness of pad A.

4. The integrated component according to claim 2, characterized in that, The minimum distance between the first pad, the second pad, the first pad, and the second pad and the second substrate is equal.

5. The integrated component according to claim 2, characterized in that, The integrated component also includes: The gate-source connection structure includes a gate connection structure and a source connection structure that are insulated from each other. The gate connection structure is electrically connected to the gate of the power device and the source connection structure is electrically connected to the source of the power device. Furthermore, the gate connection structure is electrically connected to the gate terminal conductive pattern and the source connection structure is electrically connected to the source terminal conductive pattern. The gate terminal conductive pattern and the source terminal conductive pattern are spaced apart on the side of the first substrate facing the second substrate. The B-gate-source connection structure includes a B-gate connection structure and a B-source connection structure that are insulated from each other. The B-gate connection structure is electrically connected to the gate of the B-power device, and the B-source connection structure is electrically connected to the source of the B-power device. Furthermore, the B-gate connection structure is electrically connected to the B-gate terminal conductive pattern, and the B-source connection structure is electrically connected to the B-source terminal conductive pattern. The B-gate terminal conductive pattern and the B-source terminal conductive pattern are spaced apart on the side of the first substrate facing the second substrate.

6. The integrated component according to claim 5, characterized in that, The gate-source connection structure includes a PCB circuit board. The gate connection structure and the source connection structure are different pads that are insulated on the base plate of the PCB circuit board. The base plate of the PCB circuit board faces the power device. And / or, the B-gate-source connection structure includes a B-PCB circuit board, the B-gate connection structure and the B-source connection structure are different pads insulated on the base plate of the B-PCB circuit board, and the base plate of the B-PCB circuit board faces the B-power device.

7. The integrated component according to claim 5, characterized in that, The gate connection structure includes a gate connection conductive pattern, the source connection structure includes a source connection conductive pattern, the gate connection conductive pattern and the source connection conductive pattern are on the same layer as the conductive pattern, and the gate connection conductive pattern is connected to the gate of the power device via a bonding wire, and the source connection conductive pattern is connected to the source of the power device via a bonding wire. And / or, the B-gate connection structure includes a B-gate connection conductive pattern, the B-source connection structure includes a B-source connection conductive pattern, the B-gate connection conductive pattern and the B-source connection conductive pattern are on the same layer as the B-conductive pattern, and the B-gate connection conductive pattern is connected to the gate of the B-power device through a bonding wire, and the B-source connection conductive pattern is connected to the source of the B-power device through a bonding wire.

8. The integrated component according to claim 7, characterized in that, The conductive pattern connected to gate A and the conductive pattern connected to source A are arranged in parallel, and the conductive pattern connected to gate B and the conductive pattern connected to source B are arranged in parallel. And / or, the source A connecting conductive pattern surrounds the gate A connecting conductive pattern, and the source B connecting conductive pattern surrounds the gate B connecting conductive pattern.

9. The integrated component according to any one of claims 5 to 8, characterized in that, The integrated component also includes: Gate resistor A is electrically connected to the gate of power device A. Gate resistor B is electrically connected to the gate of power device B.

10. An electronic device, characterized in that, Includes the integrated components as described in any one of claims 1 to 9.

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