FMC interface intelligent computing card based on intelligent armored 100 chip

Abstract

The utility model relates to the technical field of intelligent computing cards, in particular to an FMC interface intelligent computing card based on an intelligent armor 100 chip. The intelligent computing card comprises a core board, a power supply module, an intelligent armor 100 chip arranged on one side of the core board and an FMC connector arranged on the other side of the core board. The power supply module is electrically connected with the intelligent armor 100 chip through the FMC connector and is used for supplying power to the intelligent armor 100 chip; and the FMC connector is coupled to a CPU board and is used for realizing PCIE signal interaction between the CPU and the intelligent armor 100 chip through the FMC connector. According to the invention, a better solution is provided for the stability and durability of the intelligent computing card product.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of intelligent algorithm cards, and in particular to an FMC interface intelligent algorithm card based on a ZhiGai100 chip. BACKGROUND

[0002] Currently, artificial intelligence (AI) technology is increasingly valued in the global market, and many companies are working to develop and introduce various AI-related products. However, in the field of industrial manufacturing, especially in areas such as aerospace and defense that require strict performance, the size, anti-interference, and compatibility of products face very high requirements. In these fields, the "golden finger" plug-in card design of intelligent algorithm card products has become mainstream, which can be used by inserting into the corresponding slot, and the operation is relatively simple. However, frequent plugging and unplugging or improper use (such as excessive friction or dirt accumulation) can greatly affect the wear and oxidation of the golden finger, which may cause poor contact and other phenomena. These problems not only threaten the connection stability and reliability of intelligent algorithm card products, but also may shorten their service life, severely restricting their application in the industrial field.

[0003] The core of these problems lies in the limitations of the "golden finger" plug-in card design. Although this design is simple, low-cost and easy to use, long-term use and improper operation can cause wear and oxidation on the surface of metal or electronic components, affecting the connection effect. In particular, in industrial environments, the anti-interference and long-term stability of equipment are extremely high, so the existing "golden finger" plug-in card design is difficult to meet the strict requirements. How to ensure good connection effect while improving the reliability and service life of plug-in card products is a technical problem that needs to be solved urgently.

[0004] The core challenge of these problems is to develop an intelligent algorithm card design that can ensure good connection effect and high reliability. The traditional design mode has obvious limitations and cannot effectively cope with the harsh conditions in industrial environments. Therefore, how to break through the limitations of existing technology and design more reliable and durable intelligent algorithm card products has become a major issue in the technical field and a key problem that needs to be solved urgently. CONTENT OF THE INVENTION

[0005] In order to overcome the shortcomings of the prior art, the present application provides an FMC interface intelligent algorithm card based on a ZhiGai100 chip, which provides a more optimal solution for the stability and durability of intelligent algorithm card products.

[0006] The technical scheme adopted by the present application to solve its technical problems is:

[0007] An FMC interface intelligent algorithm card based on a Xilinx 100 chip, the intelligent algorithm card comprising a core board, a power module, a Xilinx 100 chip arranged on one side of the core board, and an FMC connector arranged on the other side of the core board;

[0008] The power module is electrically connected with the Xilinx 100 chip through the FMC connector, and is configured to supply power for the Xilinx 100 chip.

[0009] The FMC connector is coupled to a CPU board, and is configured to realize PCIE signal interaction between the CPU and the Xilinx 100 chip through the FMC connector.

[0010] Optionally, the intelligent algorithm card further comprises a clock signal source and an active crystal oscillator; the clock signal output by the clock signal source meets the HCSL level standard.

[0011] The clock signal source is connected with the Xilinx 100 chip through the FMC connector, and is configured to output the clock signal to the Xilinx 100 chip.

[0012] The active crystal oscillator is connected with the Xilinx 100 chip, and is configured to provide an external 25MHZ reference clock for the Xilinx 100 chip.

[0013] Optionally, the intelligent algorithm card further comprises a temperature alarm module; the temperature alarm module comprises a temperature alarm indicator light and an over-temperature power-off indicator light; the trigger threshold of the over-temperature power-off indicator light is higher than that of the temperature alarm indicator light.

[0014] The temperature alarm module is connected with the Xilinx 100 chip, and is configured to output corresponding level signals according to the chip temperature of the Xilinx 100, so as to control the on-off state of the temperature alarm indicator light and the over-temperature power-off indicator light through the corresponding level signals.

[0015] Optionally, the intelligent algorithm card further comprises a fault indication module; the fault indication module comprises a fault indication light.

[0016] The fault indication module is connected with a GPU_IDLED_1V8_GPIO5 pin of the Xilinx 100 chip, and is configured to output a state output signal according to the state output signal of the GPU_IDLED_1V8_GPIO5 pin, so as to control the on-off state of the fault indication light.

[0017] Optionally, the FMC connector is electrically connected with the Xilinx 100 chip, and the electrical connection comprises that an A23 pin of the FMC connector is connected with a PCIE_RSTN_3V3 pin of the Xilinx 100 chip, and is configured to trigger the Xilinx 100 chip to reset according to a preset level signal.

[0018] Optionally, the smart card further comprises an EFUES chip; the model of the EFUES chip is BPD20550.

[0019] The EFUES chip is connected with the smart armor 100 chip through I2C, for the smart armor 100 chip to read input voltage, output voltage, input current and input power consumption in real time through the EFUES chip.

[0020] Optionally, the smart card further comprises a level conversion module, and the FMC connector is provided with a fan interface.

[0021] The FMC connector is connected to an external fan through the fan interface.

[0022] The fan pin of the smart armor 100 chip is connected to the fan interface through the level conversion module; the level conversion module comprises a level conversion chip converting 1.8V to 3.3V.

[0023] Optionally, the size of the smart card is 70mm×125mm, the height of the front surface of the smart card is not higher than 7mm, and the height of the back surface of the smart card is not higher than 2mm.

[0024] The beneficial effects of the present application are: by adopting the FMC connector, many problems commonly encountered in traditional gold finger card design are solved, higher reliability, anti-interference and durability are achieved. Specifically, compared with the traditional "gold finger" card design, the FMC connector performs better in terms of anti-interference, can effectively reduce reflection and crosstalk in the signal transmission process, and at the same time, the differential signal transmission technology adopted by it significantly reduces electromagnetic interference and radiation, ensuring the stability and safety of signal transmission. In addition, the high pin count (HPC) and low pin count (LPC) design of the FMC connector makes it flexible in complex and variable functional demand scenarios, meeting the different needs of different applications. In terms of mechanical performance, the FMC connector has higher anti-shock ability and higher plug resistance, can withstand more shock impact and frequent connection and disconnection operations, effectively avoiding the problem of poor contact caused by external factors in the use process of traditional gold finger card design. Through these technical improvements, a better solution is provided for the stability and durability of the smart card product. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 is the system block diagram of the FMC interface smart card based on the smart armor 100 chip provided by the embodiment of the present application;

[0026] Figure 2 is the first clock connection block diagram of the FMC interface smart card based on the smart armor 100 chip provided by the embodiment of the present application;

[0027] Figure 3 is a second clock connection block diagram of the FMC interface intelligent algorithm card based on the ZhiGai100 chip provided by the embodiment of the application;

[0028] Figure 4 is a temperature alarm design block diagram of the FMC interface intelligent algorithm card based on the ZhiGai100 chip provided by the embodiment of the application;

[0029] Figure 5 is an over-temperature power-off design block diagram of the FMC interface intelligent algorithm card based on the ZhiGai100 chip provided by the embodiment of the application;

[0030] Figure 6 is a fault indication design block diagram of the FMC interface intelligent algorithm card based on the ZhiGai100 chip provided by the embodiment of the application;

[0031] Figure 7 is a reset design block diagram of the FMC interface intelligent algorithm card based on the ZhiGai100 chip provided by the embodiment of the application;

[0032] Figure 8 is a power consumption detection design block diagram of the FMC interface intelligent algorithm card based on the ZhiGai100 chip provided by the embodiment of the application;

[0033] Figure 9 is a fan design block diagram of the FMC interface intelligent algorithm card based on the ZhiGai100 chip provided by the embodiment of the application;

[0034] Figure 10 is a topology design block diagram of the FMC interface intelligent algorithm card based on the ZhiGai100 chip provided by the embodiment of the application. DETAILED DESCRIPTION

[0035] The application will be further described below in conjunction with the drawings and embodiments.

[0036] The concept, specific structure and technical effects of the application will be described clearly and completely in conjunction with the embodiments and drawings, so as to fully understand the purpose, features and effects of the application. Obviously, the described embodiments are only part of the embodiments of the application, not all the embodiments, and other embodiments obtained by those skilled in the art based on the embodiments of the application without creative labor are within the protection scope of the application. In addition, all the coupling / connection relations involved in the patent do not mean that the components are directly connected, but that a better coupling structure can be formed by adding or reducing coupling accessories according to the specific implementation. The technical features in the creation of the application can be combined interactively without contradiction and conflict.

[0037] Reference Figure 1 , Figure 1is a system block diagram of an FMC interface intelligent algorithm card based on a SmartArmor 100 chip provided in the embodiment of the application, the intelligent algorithm card comprising a core board, a power module, a SmartArmor 100 chip arranged on one side of the core board, and an FMC connector arranged on the other side of the core board;

[0038] The power module is electrically connected with the SmartArmor 100 chip through the FMC connector, and is configured to supply power for the SmartArmor 100 chip.

[0039] In the embodiment of the application, the intelligent algorithm card provided is a board card designed based on a SmartArmor 100 chip of a SmartChip, supports PCIE4.0 (16 Gb / s) x16, and is downward compatible with PCIE3.0 (8 Gb / s), PCIE2.0 (5 Gb / s), and PCIE1.0 (2.5 Gb / s).

[0040] Specifically, the mainboard of the intelligent algorithm card provided in the application adopts an FMC connector to replace the function of a golden finger, and the advantages of the FMC connector compared with the golden finger include but are not limited to:

[0041] Regarding the anti-vibration performance: the packaging technology adopted by the FMC connector, such as BGA packaging (Ball Grid Array, Ball Grid Array packaging), has the advantage of wide-area contact, thereby increasing the anti-vibration performance and reducing the possibility of poor contact. In contrast, the golden finger is composed of a large number of independent contact pads, and when subjected to vibration, the contact pads and the slot are prone to looseness, resulting in poor contact.

[0042] Regarding reliability: the contact piece of the FMC connector can adopt a bent three-contact structure design, which can ensure the reliability of signal transmission in complex conditions such as military harsh environments. In contrast, although the gold plating layer of the golden finger has good wear resistance, it may still have problems such as wear and oxidation in long-term use or harsh environments, affecting the reliability of the connection.

[0043] Regarding flexibility: the FMC connector has two types of high pin count (HPC) and low pin count (LPC), and the appropriate pin count and function can be selected according to different application requirements, and in contrast, the pin count and function of the golden finger are usually fixed, and the flexibility is poor in the design and use process.

[0044] Regarding electrical performance: compared with the gold finger, the FMC connector has the advantages of better signal integrity, lower electromagnetic interference and radiation. Specifically, the FMC connector uses differential signal transmission and other technologies to effectively reduce signal distortion and interference, and can still ensure the accuracy and stability of the signal during high-speed transmission. However, the gold finger may have problems such as signal reflection and crosstalk during high-speed transmission, affecting signal integrity. In addition, the FMC connector has good electromagnetic compatibility design, which can reduce electromagnetic interference and radiation, and reduce the impact on surrounding equipment. The electromagnetic shielding performance of the gold finger is relatively weak, which may cause certain electromagnetic interference to the surrounding circuits and equipment.

[0045] Regarding mechanical performance: the structural design of the FMC connector makes it have high resistance to plugging and unplugging, and can withstand multiple connection and disconnection operations without affecting performance. However, the gold finger is prone to wear and deformation during frequent plugging and unplugging, reducing the reliability of the connection. On the other hand, the FMC connector is usually installed on the circuit board by welding or other fixed methods, and the connection is firm and not prone to loosening. The gold finger is a plug-in connection, which is prone to loosening or falling out of the slot when subjected to external impact or vibration.

[0046] Regarding space utilization: based on the size of the market based on the smart armor 100 (106.65mm x 263.69mm), the space utilization is further optimized. Specifically, the FMC connector has a small pin pitch, which can provide more connection pins in a limited space, realizing high-density signal transmission and functional expansion. The pins of the gold finger are relatively wide, and the number of pins that can be provided in the same area is less. In addition, the FMC connector can be installed on the surface of the circuit board using surface mounting technology, without the need to open a special slot on the circuit board like the gold finger, saving the space of the circuit board and being conducive to the miniaturization and thinning of the device.

[0047] More specifically, in order to meet the PCIE4.0 high-speed transmission, M6 grade high-speed board material can be selected on the PCB board. Among them, M6 grade high-speed board material is a special PCB base material designed for high-frequency high-speed circuits, which belongs to the "Megtron 6" series of high-performance copper-clad boards defined by the International Electrotechnical Commission (IEC).

[0048] More specifically, the FMC connector can select a high-speed FMC connector with a model number of FMC-40-05.0-S-10-2-A-Z, thereby meeting the needs of high-speed data transmission such as computing and reasoning.

[0049] The FMC connector is coupled to the CPU board for realizing PCIE signal interaction between the CPU and the smart armor 100 chip through the FMC connector.

[0050] Refer toFigure 1 The smart card provided in the present application accesses the CPU board (a mainboard or backboard connectable to the CPU) through the FMC connector interface arranged therein, and the PCIE signal correspondence thereof can refer to the signal pointing relationship as shown in Figure 1 The FMC connector is used to realize the signal interaction between the smart card 100 (GPU) and the CPU.

[0051] Further, the smart card further comprises a clock signal source and an active crystal oscillator; the clock signal output by the clock signal source meets the HCSL level standard;

[0052] The clock signal source is connected to the smart card 100 chip through the FMC connector, and is used to output the clock signal to the smart card 100 chip.

[0053] Specifically, refer to Figure 2 , Figure 2 is the first clock connection block diagram of the FMC interface smart card based on the smart card 100 chip provided in the embodiments of the present application. Since the smart card 100 chip needs to provide a 100MHz differential reference clock, and the differential reference clock level needs to meet the HCSL (High-speed Current Steering Logic, high-speed current steering logic) level standard, the PCIE clock signal of the designed smart card enters from the interface of the FMC connector, and is connected to the smart card 100 chip (GPU) through two pins of PCIE CLKP and PCIE CLKN.

[0054] Further, the active crystal oscillator is connected to the smart card 100 chip, and is used to provide an external 25MHZ reference clock for the smart card 100 chip.

[0055] Specifically, refer to Figure 3 , Figure 3 is the second clock connection block diagram of the FMC interface smart card based on the smart card 100 chip provided in the embodiments of the present application. Since the smart card 100 chip needs an external 25MHZ reference clock, an active crystal oscillator is arranged in the present application to provide the reference clock.

[0056] Further, the smart card further comprises a temperature alarm module; the temperature alarm module comprises a temperature alarm indicator light and an over-temperature power-off indicator light; the trigger threshold of the over-temperature power-off indicator light is higher than the trigger threshold of the temperature alarm indicator light;

[0057] The temperature alarm module is connected to the smart card 100 chip, and is used to output a corresponding level signal according to the chip temperature of the smart card 100, so as to control the on-off state of the temperature alarm indicator light and the over-temperature power-off indicator light through the corresponding level signal.

[0058] Specifically, referring to Figure 4 , Figure 4 is a temperature alarm design block diagram of the FMC interface intelligent algorithm card based on the ZK100 chip provided in the embodiments of the present application, which comprises a temperature alarm indicator light. The ZK100 chip will send an ALERT signal according to the temperature of the chip. The level state of the signal is determined according to whether the temperature of the chip reaches a first preset temperature. In the embodiments of the present application, when the temperature of the chip is higher than 95℃, a low-level signal ALERT signal is output, and at this time, the LED (temperature alarm indicator light) is lit. Conversely, when the temperature of the chip is lower than 95℃, the ALERT signal output is high level, and at this time, the LED is off.

[0059] Further, referring to Figure 5 , Figure 5 is a temperature alarm design block diagram of the FMC interface intelligent algorithm card based on the ZK100 chip provided in the embodiments of the present application, which comprises a temperature alarm indicator light. The ZK100 chip will send an ALERT signal according to the temperature of the chip. The level state of the signal is determined according to whether the temperature of the chip reaches a first preset temperature. In the embodiments of the present application, when the temperature of the chip is higher than 95℃, a low-level signal ALERT signal is output, and at this time, the LED (temperature alarm indicator light) is lit. Conversely, when the temperature of the chip is lower than 95℃, the ALERT signal output is high level, and at this time, the LED is off.

[0060] Further, the intelligent algorithm card further comprises a fault indication module; the fault indication module comprises a fault indication light;

[0061] The fault indication module is connected to the GPU_IDLED_1V8_GPIO5 pin of the ZK100 chip, and is used to output a signal according to the state output signal of the GPU_IDLED_1V8_GPIO5 pin, so as to control the on-off state of the fault indication light.

[0062] Specifically, referring to Figure 6 , Figure 6 is a temperature alarm design block diagram of the FMC interface intelligent algorithm card based on the ZK100 chip provided in the embodiments of the present application, which comprises a temperature alarm indicator light. The ZK100 chip will send an ALERT signal according to the temperature of the chip. The level state of the signal is determined according to whether the temperature of the chip reaches a first preset temperature. In the embodiments of the present application, when the temperature of the chip is higher than 95℃, a low-level signal ALERT signal is output, and at this time, the LED (temperature alarm indicator light) is lit. Conversely, when the temperature of the chip is lower than 95℃, the ALERT signal output is high level, and at this time, the LED is off.

[0063] Further, the FMC connector is electrically connected with the ZK100 chip, and the A23 pin of the FMC connector is connected with the PCIE_RSTN_3V3 pin of the ZK100 chip, so as to trigger the reset of the ZK100 chip according to a preset level signal.

[0064] Specifically, referring to Figure 7 , Figure 7 is a reset design block diagram of the FMC interface intelligent algorithm card based on the ZK100 chip, and in the embodiment, the GPU is reset through the PCIE_RSTN_3V3 signal, specifically, the PCIE reset function is triggered through the A23 pin of the FMC connector, and in the embodiment, the low level is effective and the high level is cancelled.

[0065] Further, the intelligent algorithm card further comprises an EFUES chip, and the model of the EFUES chip is BPD20550.

[0066] The EFUES chip is connected with the ZK100 chip through I2C, so as to read the input voltage, output voltage, input current and input power consumption of the ZK100 chip in real time through the EFUES chip.

[0067] Specifically, the hot plug controller chip IC of the EFUES chip proposed in the application is BPD20550, the conduction type is bipolar, the working power voltage is between 4-16V, the working temperature range can reach-40℃ to 125℃, and referring to Figure 8 , Figure 8 is a power consumption detection design block diagram of the FMC interface intelligent algorithm card based on the ZK100 chip, the EFUSE chip and the ZK100 chip are communicated through I2C, and the 12V input is output through the EFUSE chip, when the input voltage and current exceed the range that can be borne by the chip, the BPD20550 can quickly detect the abnormal situation, and automatically cut off the power supply or take other corresponding protection measures, so as to prevent the damage of the subsequent circuit caused by the too high voltage or current.

[0068] More specifically, the ZK100 chip can also read the input voltage, output voltage, input current and input power consumption in real time through the SMBUS interface.

[0069] Further, the intelligent algorithm card further comprises a level conversion module, and the FMC connector is provided with a fan interface.

[0070] The FMC connector is connected to an external fan through the fan interface.

[0071] The fan pin of the wisdom armor 100 chip is connected with the fan interface through the level conversion module; the level conversion module comprises a level conversion chip converting 1.8V into 3.3V.

[0072] Specifically, referring to Figure 9 , Figure 9 is a fan design block diagram of the FMC interface wisdom computing card based on the wisdom armor 100 chip provided by the embodiment of the present application. One FAN interface is reserved on the wisdom computing card FMC connector, which is used for connecting an external fan to cool the board card. Since the FAN_IN pin and the FAN_OUT pin of the wisdom armor 100 chip are 1.8V level, a level conversion module is directly arranged between the FMC connector and the wisdom armor 100 chip, so as to convert the level into 3.3V output.

[0073] Further, the size of the wisdom computing card is 70mm*125mm, the front height of the wisdom computing card is not higher than 7mm, and the back height of the wisdom computing card is not higher than 2mm.

[0074] Further, referring to Figure 10 , Figure 10 is a topology design block diagram of the FMC interface wisdom computing card based on the wisdom armor 100 chip provided by the embodiment of the present application. The present application can output an I2C (3.3V) interface, and an external host can read the GPU state information of the wisdom computing card through the I2C.

[0075] The above is a specific description of the preferred implementation of the present application, but the present application creation is not limited to the described embodiments, and those skilled in the art can make various equivalent modifications or replacements without departing from the spirit of the present application. These equivalent modifications or replacements are all included in the scope defined by the claims of the present application.

Claims

1. A FMC interface intelligent algorithm card based on a ZK100 chip, characterized in that, The smart card comprises a core board, a power module, a smart armor 100 chip arranged on one side of the core board, and an FMC connector arranged on the other side of the core board; The power module is electrically connected with the smart armor 100 chip through the FMC connector, and is used for supplying power for the smart armor 100 chip; The FMC connector is coupled to a CPU board, and is used for realizing PCIE signal interaction between the CPU and the smart armor 100 chip through the FMC connector.

2. The FMC interface intelligent algorithm card based on the ZK100 chip of claim 1, wherein, The smart card further comprises a clock signal source and an active crystal oscillator; the clock signal output by the clock signal source meets the HCSL level standard; The clock signal source is connected to the smart armor 100 chip through the FMC connector, and is used for outputting the clock signal to the smart armor 100 chip; The active crystal oscillator is connected to the smart armor 100 chip, and is used for providing an external 25MHZ reference clock for the smart armor 100 chip. 3.The FMC interface intelligent algorithm card based on the ZK100 chip according to claim 1, wherein, The smart card further comprises a temperature alarm module; the temperature alarm module comprises a temperature alarm indicator light and an over-temperature power-off indicator light; the trigger threshold of the over-temperature power-off indicator light is higher than that of the temperature alarm indicator light; The temperature alarm module is connected to the smart armor 100 chip, and is used for outputting corresponding level signals according to the chip temperature of the smart armor 100, so as to control the on-off state of the temperature alarm indicator light and the over-temperature power-off indicator light through the corresponding level signals.

4. The FMC interface intelligent algorithm card based on the ZK100 chip of claim 1, wherein, The smart card further comprises a fault indication module; the fault indication module comprises a fault indication light; The fault indication module is connected to the GPU_IDLED_1V8_GPIO5 pin of the smart armor 100 chip, and is used for outputting a state output signal according to the state output signal of the GPU_IDLED_1V8_GPIO5 pin, so as to control the on-off state of the fault indication light.

5. The FMC interface intelligent algorithm card based on the ZK100 chip of claim 1, wherein, The FMC connector is electrically connected with the smart armor 100 chip, and comprises that the A23 pin of the FMC connector is connected with the PCIE_RSTN_3V3 pin of the smart armor 100 chip, and is used for triggering the reset of the smart armor 100 chip according to a preset level signal.

6. The ZK100 chip-based FMC interface intelligent algorithm card according to claim 1, characterized in that, The smart card further comprises an EFUES chip; the model of the EFUES chip is BPD20550; The EFUES chip is connected with the smart armor 100 chip through I2C, and is used for the smart armor 100 chip to read input voltage, output voltage, input current and input power consumption in real time through the EFUES chip.

7. The FMC interface intelligent algorithm card based on the ZK100 chip of claim 1, wherein, The smart card further comprises a level conversion module, and the FMC connector is provided with a fan interface; The FMC connector is connected to an external fan through the fan interface; The fan pin of the smart armor 100 chip is connected to the fan interface through the level conversion module; and the level conversion module comprises a level conversion chip for converting 1.8V to 3.3V. 8.The FMC interface intelligent algorithm card based on the ZK100 chip according to claim 1, wherein, The size of the smart card is 70mm*125mm, the front height of the smart card is not higher than 7mm, and the back height of the smart card is not higher than 2mm.

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