Drive circuit of magnetic latching relay and magnetic latching relay

Abstract

The utility model discloses a drive circuit of a magnetic latching relay and the magnetic latching relay. The driving circuit of the magnetic latching relay comprises a first monitoring module, a first voltage control module, a second monitoring module, a second voltage control module and a driving module. The input end of the first voltage control module is connected with the first power input end, and the output end is connected with the first monitoring module which is connected with the driving module. The input end of the second voltage control module is connected with the second power input end, the output end of the second voltage control module is connected with the second monitoring module, the second monitoring module is connected with the driving module, and the first voltage control module and the second voltage control module are used for controlling the driving circuit according to power voltage accessed by the first power input end and the second power input end of the driving circuit. Controlling the potential of the sampling end of the first monitoring module or the potential of the sampling end of the second monitoring module to overturn in a delayed manner; the driving module is connected with the magnetic latching relay. According to the embodiment of the utility model, the reliability and the use convenience of the magnetic latching relay can be improved.

Description

Technical Field

[0001] This utility model relates to the field of relay technology, and in particular to a drive circuit and a magnetic latching relay. Background Technology

[0002] As a new type of switching relay, the magnetic latching relay differs from traditional relays in that traditional relays require a constant energizer to maintain the switching state, while the switching of the magnetic latching relay is triggered by a certain pulse electrical signal. It has the advantages of being energy-saving, small in size, and having strong overcurrent capability.

[0003] In existing technologies, the energizing and resetting process of magnetic latching relays is usually controlled by a microcontroller-driven control circuit. This control scheme not only requires an independent power supply for the microcontroller, but also requires writing corresponding programs on the microcontroller, making the structure of the magnetic latching relay drive circuit complex. Furthermore, after the magnetic latching relay completes the switching state transition, the drive signal needs to be removed to prevent the magnetic latching relay from being damaged due to overheating. This results in low reliability of the magnetic latching relay and limits its application range. Utility Model Content

[0004] This invention provides a driving circuit and a magnetic latching relay, thereby offering a simple driving circuit for the magnetic latching relay and improving its reliability and ease of use.

[0005] According to one aspect of the present invention, a driving circuit for a magnetic latching relay is provided, comprising: a first monitoring module, a first voltage control module, a second monitoring module, a second voltage control module, and a driving module;

[0006] The input terminal of the first voltage control module is connected to the first power input terminal of the drive circuit, the output terminal of the first voltage control module is connected to the sampling terminal of the first monitoring module, and the output terminal of the first monitoring module is connected to the first input terminal of the drive module.

[0007] The input terminal of the second voltage control module is connected to the second power input terminal of the drive circuit, the output terminal of the second voltage control module is connected to the sampling terminal of the second monitoring module, and the output terminal of the second monitoring module is connected to the second input terminal of the drive module. The first voltage control module and the second voltage control module are used to delay and control the potential of the sampling terminal of the first monitoring module or the potential of the sampling terminal of the second monitoring module to flip according to the power supply voltage connected to the first power input terminal and the second power input terminal of the drive circuit.

[0008] The first and second output terminals of the drive module are both connected to the magnetic latching relay.

[0009] Optionally, the first voltage control module includes a first delay unit, a first switching unit, and a first current limiting unit;

[0010] The input terminal of the first delay unit is connected to the first power input terminal of the driving circuit, the output terminal of the first delay unit is connected to the control terminal of the first switching unit, the first terminal of the first switching unit is connected to the sampling terminal of the first monitoring module, the second terminal of the first switching unit is grounded, the first terminal of the first current limiting unit is connected to the input terminal of the first delay unit, and the second terminal of the first current limiting unit is connected to the sampling terminal of the first monitoring module.

[0011] The first voltage control module further includes a first discharge unit;

[0012] The first end of the first discharge unit is connected to the first power input terminal of the drive circuit, and the second end of the first discharge unit is connected to the second end of the first switch unit.

[0013] The first voltage control module further includes a first voltage regulator unit;

[0014] The first terminal of the first voltage regulator unit is connected to the sampling terminal of the first monitoring module, and the second terminal of the first voltage regulator unit is grounded.

[0015] Optionally, the first delay unit includes a first resistor and a first capacitor; the first switching unit includes a first transistor; the first current limiting unit includes a second resistor; the first discharge unit includes a third resistor; and the first voltage regulating unit includes a first Zener diode.

[0016] The first end of the first resistor is connected to the first power input terminal of the driving circuit, the second end of the first resistor is connected to the control terminal of the first transistor, the first terminal of the first transistor is connected to the sampling terminal of the first monitoring module, the second terminal of the first transistor is connected to the first end of the first capacitor, the second end of the first capacitor is connected to the second end of the first resistor, the first end of the second resistor is connected to the first end of the first resistor, the second end of the second resistor is connected to the sampling terminal of the first monitoring module, the first terminal of the first Zener diode is connected to the first terminal of the first transistor, the second terminals of the first Zener diode and the second terminal of the first transistor are both grounded, the first end of the third resistor is connected to the first end of the first resistor, and the second end of the third resistor is connected to the second terminal of the first transistor.

[0017] Optionally, the second voltage control module includes a second delay unit, a second switching unit, and a second current limiting unit;

[0018] The input terminal of the second delay unit is connected to the second power input terminal of the drive circuit, the output terminal of the second delay unit is connected to the control terminal of the second switching unit, the first terminal of the second switching unit is connected to the sampling terminal of the second monitoring module, the second terminal of the second switching unit is grounded, the first terminal of the second current limiting unit is connected to the input terminal of the second delay unit, and the second terminal of the second current limiting unit is connected to the sampling terminal of the second monitoring module.

[0019] The second voltage control module also includes a second discharge unit;

[0020] The first end of the second discharge unit is connected to the second power input terminal of the drive circuit, and the second end of the second discharge unit is connected to the second end of the second switch unit.

[0021] The second voltage control module also includes a second voltage regulator unit;

[0022] The first end of the second voltage regulator unit is connected to the sampling end of the second monitoring module, and the second end of the second voltage regulator unit is grounded.

[0023] Optionally, the second delay unit includes a fourth resistor and a second capacitor; the second switching unit includes a second transistor; the second current limiting unit includes a fifth resistor; the second discharge unit includes a sixth resistor; and the second voltage regulating unit includes a second Zener diode.

[0024] The first end of the fourth resistor is connected to the second power input terminal of the driving circuit, the second end of the fourth resistor is connected to the control terminal of the second transistor, the first terminal of the second transistor is connected to the sampling terminal of the second monitoring module, the second terminal of the second transistor is connected to the first end of the second capacitor, the second end of the second capacitor is connected to the second end of the fourth resistor, the first end of the fifth resistor is connected to the first end of the fourth resistor, the second end of the fifth resistor is connected to the sampling terminal of the second monitoring module, the first terminal of the second Zener diode is connected to the first terminal of the second transistor, the second terminals of the second Zener diode and the second terminal of the second transistor are both grounded, the first end of the sixth resistor is connected to the first end of the fourth resistor, and the second end of the sixth resistor is connected to the second terminal of the second transistor.

[0025] Optionally, the first monitoring module includes a first chip, which includes a power supply terminal, a sampling terminal, and an output terminal; the second monitoring module includes a second chip, which includes a power supply terminal, a sampling terminal, and an output terminal.

[0026] The power supply terminal of the first chip is connected to the supply voltage, the output terminal of the first chip is connected to the first input terminal of the drive module, and the sampling terminal of the first chip is connected to the output terminal of the first voltage control module.

[0027] The power supply terminal of the second chip is connected to the supply voltage, the output terminal of the second chip is connected to the second input terminal of the drive module, and the sampling terminal of the second chip is connected to the output terminal of the second voltage control module.

[0028] The first monitoring module further includes a first pull-up unit, which includes a seventh resistor. The first end of the seventh resistor is connected to the power supply terminal of the first chip, and the second end of the seventh resistor is connected to the output terminal of the first chip.

[0029] The second monitoring module further includes a second pull-up unit, which comprises an eighth resistor. The first end of the eighth resistor is connected to the power supply terminal of the second chip, and the second end of the eighth resistor is connected to the output terminal of the second chip.

[0030] Optionally, the first monitoring module further includes a third voltage regulator unit and a third current limiting unit, and the first chip further includes a ground terminal;

[0031] The third voltage regulator unit is connected between the power supply terminal and the ground terminal of the first chip. The ground terminal of the first chip is grounded. The first terminal of the third current limiting unit is connected to the power supply voltage, and the second terminal of the third current limiting unit is connected to the power supply terminal of the first chip.

[0032] The third voltage regulator unit includes a third Zener diode, and the third current limiting unit includes a ninth resistor. The first end of the ninth resistor is connected to the power supply voltage, the second end of the ninth resistor is connected to the power supply terminal of the first chip, the first terminal of the third Zener diode is connected to the power supply terminal of the first chip, and the second terminal of the third Zener diode is connected to the ground terminal of the first chip.

[0033] The second monitoring module also includes a fourth voltage regulation unit and a fourth current limiting unit, and the second chip also includes a ground terminal;

[0034] The fourth voltage regulator unit is connected between the power supply terminal and the ground terminal of the second chip. The ground terminal of the second chip is grounded. The first terminal of the fourth current limiting unit is connected to the power supply voltage, and the second terminal of the fourth current limiting unit is connected to the power supply terminal of the second chip.

[0035] The fourth voltage regulator unit includes a fourth Zener diode, and the fourth current limiting unit includes a tenth resistor; the first end of the tenth resistor is connected to the power supply voltage, the second end of the tenth resistor is connected to the power supply terminal of the second chip, the first terminal of the fourth Zener diode is connected to the power supply terminal of the second chip, and the second terminal of the fourth Zener diode is connected to the ground terminal of the second chip.

[0036] Optionally, the driving module includes a third chip, which includes a first input terminal, a second input terminal, a first output terminal, a second output terminal, and a ground terminal;

[0037] The first input terminal of the third chip is connected to the output terminal of the first monitoring module, the second input terminal of the third chip is connected to the output terminal of the second monitoring module, and the ground terminal of the third chip is grounded.

[0038] Wherein, the first output terminal and the second output terminal of the third chip are both connected to the magnetic latching relay, or the first output terminal, the second output terminal and the ground terminal of the third chip are all connected to the magnetic latching relay.

[0039] Optionally, the drive circuit of the magnetic latching relay further includes a rectifier module;

[0040] The first input terminal of the rectifier module serves as the first power input terminal of the drive circuit and is connected to the first power supply voltage. The second input terminal of the rectifier module serves as the second power input terminal of the drive circuit and is connected to the second power supply voltage. The power supply terminals of the first monitoring module and the second monitoring module are both connected to the first output terminal of the rectifier module. The second output terminal of the rectifier module is grounded.

[0041] The rectifier module includes a first diode, a second diode, a third diode, a fourth diode, and a third capacitor;

[0042] The first terminal of the first diode is connected to the second terminal of the fourth diode, the second terminal of the first diode is connected to the second terminal of the second diode, the first terminal of the second diode is connected to the second terminal of the third diode, the first terminal of the third diode is connected to the first terminal of the fourth diode, the first terminal of the third capacitor is connected to the second terminal of the second diode, the second terminal of the third capacitor is connected to the first terminal of the third diode, and the second terminal of the third capacitor is grounded.

[0043] The first terminal of the first diode serves as the first input terminal of the rectifier module, and the first terminal of the second diode serves as the second input terminal of the rectifier module; the first terminal of the third capacitor serves as the first output terminal of the rectifier module, and the second terminal of the third capacitor serves as the second output terminal of the rectifier module.

[0044] According to another aspect of the present invention, a magnetic latching relay is provided, including the driving circuit of the magnetic latching relay provided in any of the above embodiments; the magnetic latching relay includes a single-coil magnetic latching relay, the single-coil magnetic latching relay includes a first coil, the first coil being connected to a first output terminal and a second output terminal of the driving module;

[0045] or,

[0046] The magnetic latching relay includes a dual-coil magnetic latching relay, which includes a second coil and a third coil. The second coil is connected to the first output terminal of the drive module and the ground terminal of the drive module; the third coil is connected to the second output terminal of the drive module and the ground terminal of the drive module.

[0047] The technical solution of this utility model embodiment involves setting a first voltage control module and a second voltage control module to apply voltages to the sampling terminals of a first monitoring module and a second monitoring module, respectively. When the monitoring voltage is reached, the first and second monitoring modules control a drive module to generate a corresponding pulse signal to drive the magnetic latching relay. After a certain delay time, the first and second voltage control modules control the potential of the sampling terminal of the first monitoring module or the sampling terminal of the second monitoring module to flip according to the potentials of the first and second power input terminals, thereby releasing the pulse signal generated by the drive module. The technical solution provided by this utility model embodiment allows the magnetic latching relay to be energized only during the delay time. Even if the first and second power input terminals are energized for a long time, the magnetic latching relay will not be damaged, thus protecting the magnetic latching relay and improving its reliability and ease of use. Furthermore, it eliminates the need for microcontroller programming control, making the drive circuit structure of the magnetic latching relay simple and easy to operate.

[0048] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this utility model, nor is it intended to limit the scope of this utility model. Other features of this utility model will become readily apparent from the following description. Attached Figure Description

[0049] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0050] Figure 1 This is a schematic diagram of the drive circuit for a magnetic latching relay according to an embodiment of the present invention.

[0051] Figure 2 This is a schematic diagram of the drive circuit of another magnetic latching relay according to an embodiment of the present invention;

[0052] Figure 3 This is a schematic diagram of the drive circuit of another magnetic latching relay according to an embodiment of the present invention;

[0053] Figure 4 This is a schematic diagram of the drive circuit of another magnetic latching relay according to an embodiment of the present invention;

[0054] Figure 5 This is a schematic diagram of the drive circuit of another magnetic latching relay according to an embodiment of the present invention;

[0055] Figure 6 This is a schematic diagram of the drive circuit of another magnetic latching relay according to an embodiment of the present invention;

[0056] Figure 7 This is a schematic diagram of the drive circuit of another magnetic latching relay according to an embodiment of the present invention;

[0057] Figure 8 This is a schematic diagram of the drive circuit of another magnetic latching relay provided according to an embodiment of the present invention. Detailed Implementation

[0058] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0059] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the utility model described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and their variations, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0060] Figure 1 This is a schematic diagram of the drive circuit for a magnetic latching relay according to an embodiment of the present invention. (Refer to...) Figure 1 The driving circuit of the magnetic latching relay includes a first monitoring module 10, a first voltage control module 20, a second monitoring module 30, a second voltage control module 40, and a driving module 50. The input terminal I2 of the first voltage control module 20 is connected to the first power input terminal DC+ of the driving circuit, and the output terminal O2 of the first voltage control module 20 is connected to the sampling terminal VSEN1 of the first monitoring module 10. The output terminal O1 of the first monitoring module 10 is connected to the first input terminal INA of the driving module 50. The input terminal I4 of the second voltage control module 40 is connected to the second power input terminal DC- of the driving circuit. The output terminal O4 of the 40 is connected to the sampling terminal VSEN2 of the second monitoring module 30, and the output terminal O3 of the second monitoring module 30 is connected to the second input terminal INB of the drive module 50. The first voltage control module 20 and the second voltage control module 40 are used to delay and control the potential of the sampling terminal VSEN1 of the first monitoring module 10 or the potential of the sampling terminal VSEN2 of the second monitoring module 30 to flip according to the power supply voltage connected to the first power input terminal DC+ and the second power input terminal DC- of the drive circuit. The first output terminal DRVON and the second output terminal DRVOFF of the drive module 50 are both connected to a magnetic latching relay.

[0061] The first power input terminal DC+ and the second power input terminal DC- are used to input direct current (DC) and generate corresponding pulses to drive the magnetic latching relay based on the input DC current. For example, the first power input terminal DC+ is the positive terminal and the second power input terminal DC- is the negative terminal. When the first power input terminal DC+ and the second power input terminal DC- are connected to the power supply voltage in opposite directions, the drive circuit generates a positive pulse to control the magnetic latching relay to engage; when the first power input terminal DC+ and the second power input terminal DC- are connected to the power supply voltage in reverse direction, the drive circuit generates a reverse pulse to control the magnetic latching relay to disengage. Therefore, the technical solution provided in this embodiment does not require control through the MCU's I / O port; control of the magnetic latching relay can be achieved simply by connecting a DC voltage.

[0062] Specifically, when the first power input terminal DC+ and the second power input terminal DC- are positively connected to the power supply voltage, the first power input terminal DC+ is at a high potential, and the second power input terminal DC- is at a low potential. The first voltage control module 20 transmits the voltage of the first power input terminal DC+ to the sampling terminal VSEN1 of the first monitoring module 10 (at this time, the voltage of the sampling terminal VSEN1 of the first monitoring module 10 can be the same as the first power input terminal DC+, or it can be a voltage after voltage conversion), so that the potential of the sampling terminal VSEN1 of the first monitoring module 10 is also at a high potential. When the monitoring voltage of the sampling terminal VSEN1 of the first monitoring module 10 is reached, the potential of the output terminal O1 of the first monitoring module 10 is at a high potential, which ultimately makes the potential of the first input terminal INA of the drive module 50 high. At the same time, since the second power input terminal DC- is at a low potential, the potential of the sampling terminal VSEN2 of the second monitoring module 30 is also at a low potential, and the potential of the output terminal O3 of the second monitoring module 30 is at a low potential, which ultimately makes the potential of the second input terminal INB of the drive module 50 low. At this time, the first output terminal DRVON of the drive module 50 is at a high potential, and the second output terminal DRVOFF of the drive module 50 is at a low potential. After receiving the positive pulse, the magnetic latching relay performs the first action (e.g., the engaging action).

[0063] After a certain delay, the first voltage control module 20 controls the potential of the sampling terminal VSEN1 of the first monitoring module 10 to flip. At this time, the potential of the sampling terminal VSEN1 of the first monitoring module 10 changes from high to low, and finally the potential of the output terminal O2 of the first monitoring module 10 is low. The potential of the sampling terminal VSEN2 of the second monitoring module 30 remains low. Therefore, the first output terminal DRVON and the second output terminal DRVOFF of the drive module 50 are both low. At this time, the positive pulse is released, and the magnetic latching relay performs its holding action, that is, the magnetic latching relay remains engaged.

[0064] When the power input terminals DC+ and DC- are reversed, the first power input terminal DC+ is at a low potential, and the second power input terminal DC- is at a high potential. The second voltage control module 40 transmits the voltage of the second power input terminal DC- to the sampling terminal VSEN2 of the second monitoring module 30 (at this time, the voltage of the sampling terminal VSEN2 of the second monitoring module 30 can be the same as that of the second power input terminal DC-, or it can be a voltage after voltage conversion), so that the potential of the sampling terminal VSEN2 of the second monitoring module 30 is also high. When the monitoring voltage of the sampling terminal VSEN2 of the second monitoring module 30 is reached, the potential of the output terminal O3 of the second monitoring module 30 is high, which ultimately makes the potential of the second input terminal INB of the drive module 50 high. Simultaneously, since the first power supply terminal DC+ is at a low potential, the output terminal O2 of the first voltage control module 20 is also at a low potential, causing the sampling terminal VSEN1 of the first monitoring module 10 to also be at a low potential. Consequently, the output terminal O1 of the first monitoring module 10 is also at a low potential, ultimately resulting in the first input terminal INA of the drive module 50 being at a low potential. At this time, the first output terminal DRVON of the drive module 50 is at a low potential, and the second output terminal DRVOFF of the drive module 50 is at a high potential. Upon receiving the reverse pulse, the magnetic latching relay performs a second action (e.g., a release action).

[0065] After a certain delay, the potential of the sampling terminal VSEN2 of the second monitoring module 30 flips, changing from a high potential to a low potential. Ultimately, the potential of the output terminal O3 of the second monitoring module 30 becomes low. Since the potential of the sampling terminal VSEN1 of the first monitoring module 10 remains low, both the first output terminal DRVON and the second output terminal DRVOFF of the drive module 50 are low. At this point, the reverse pulse is released, and the magnetic latching relay performs its holding action; that is, the magnetic latching relay maintains its release action.

[0066] It should be noted that, in this embodiment, potential reversal refers to a jump from a high potential to a low potential, or a jump from a low potential to a high potential.

[0067] The technical solution of this embodiment of the invention involves setting a first voltage control module 20 and a second voltage control module 40 to apply voltages to the sampling terminals of the first monitoring module 10 and the second monitoring module 30, respectively. When the monitoring voltage is reached, the first monitoring module 10 and the second monitoring module 30 control the drive module 50 to generate corresponding pulse signals to drive the magnetic latching relay. After a certain delay time, the first voltage control module 20 and the second voltage control module 40 control the potential of the sampling terminal VSEN1 of the first monitoring module 10 or the sampling terminal VSEN2 of the second monitoring module 30 to flip according to the potentials of the first power input terminal DC+ and the second power input terminal DC-, thereby releasing the pulse signal generated by the drive module 50. The technical solution provided by this embodiment of the invention allows the magnetic latching relay to be energized only during the delay time. Even if the first power input terminal DC+ and the second power input terminal DC- are energized for a long time, the magnetic latching relay will not be damaged, thus protecting the magnetic latching relay and improving its reliability and ease of use. Furthermore, it eliminates the need for microcontroller programming control, making the drive circuit structure of the magnetic latching relay simple and easy to operate.

[0068] Figure 2 This is a schematic diagram of the drive circuit for another magnetic latching relay according to an embodiment of the present invention, with reference to... Figure 2 Based on the above embodiments, optionally, the magnetic latching relay includes a single-coil magnetic latching relay and a dual-coil magnetic latching relay. The drive module 50 also includes a ground terminal, which is grounded and serves as the third output terminal DRVGND. When the magnetic latching relay is a single-coil magnetic latching relay, for example, the single-coil magnetic latching relay includes a first coil, which is connected to the first output terminal DRVON and the second output terminal DRVOFF of the drive module 50. When the magnetic latching relay is a dual-coil magnetic latching relay, for example, the dual-coil magnetic latching relay includes a second coil and a third coil, with the second coil connected to the first output terminal DRVON and the third output terminal DRVGND of the drive module 50, and the third coil connected to the second output terminal DRVOFF and the third output terminal DRVGND of the drive module 50.

[0069] Specifically, when applied to a single-coil magnetic latching relay, the driving process is the same as described above, and will not be elaborated further here.

[0070] When applied to a dual-coil magnetic latching relay, if the first input power supply terminal DC+ is at a high potential and the second input power supply terminal DC- is at a low potential, the first voltage control module 20 transmits the voltage of the first power supply input terminal DC+ to the sampling terminal VSEN1 of the first monitoring module 10. When the monitoring voltage of the sampling terminal VSEN1 of the first monitoring module 10 is reached, the potential of the output terminal O1 of the first monitoring module 10 is high, making the first output terminal DRVON of the drive module 50 high. The second voltage control module 40 transmits the voltage of the second power supply input terminal DC- to the sampling terminal VSEN2 of the second monitoring module 30, making the second output terminal DRVOFF of the drive module 50 low and the third output terminal DRVGND of the drive module 50 low. At this time, the second coil of the magnetic latching relay receives a positive pulse and performs the first action (e.g., the engaging action). After a certain delay, the first output terminal DRVON, the second output terminal DRVOFF, and the third output terminal DRVGND of the drive module 50 are all at low potentials, the positive pulse is released, and the magnetic latching relay remains engaged.

[0071] When the first power input terminal DC+ is at a low potential and the second power input terminal DC- is at a high potential, the first voltage control module 20 transmits the voltage of the first power input terminal DC+ to the sampling terminal VSEN1 of the first monitoring module 10, making the first output terminal DRVON of the drive module 50 at a low potential. The second voltage control module 40 transmits the voltage of the second power input terminal DC- to the sampling terminal VSEN2 of the second monitoring module 30. When the monitoring voltage of the sampling terminal VSEN2 of the second monitoring module 30 is reached, the potential of the output terminal O3 of the second monitoring module 30 is at a high potential, making the second output terminal DRVOFF of the drive module 50 at a high potential and the third output terminal DRVGND of the drive module 50 at a low potential. At this time, the third coil of the magnetic latching relay receives a reverse pulse. Therefore, the magnetic field generated by the third coil is opposite to the magnetic field generated by the second coil. The two magnetic forces cancel each other out, so that the magnetic latching relay realizes the second action (e.g., release action). After a certain delay, the first output terminal DRVON, the second output terminal DRVOFF, and the third output terminal DRVGND of the drive module 50 are all at low potentials, and the magnetic latching relay remains in the released action.

[0072] The technical solution of this utility model embodiment can realize the driving of both single-coil magnetic latching relays and double-coil magnetic latching relays by inputting DC power at the first power supply terminal DC+ and the second power supply terminal DC-, without the need for additional control circuits, and the circuit structure is simple.

[0073] It should be noted that the driving process of a single-coil magnetic latching relay via its drive circuit is similar to that of a double-coil magnetic latching relay. Therefore, in the following description of the embodiments, unless otherwise specified, the driving process of a single-coil magnetic latching relay will be used as an example, and the driving process of a double-coil magnetic latching relay will not be described in detail.

[0074] Figure 3 This is a schematic diagram of the drive circuit for another magnetic latching relay according to an embodiment of the present invention, with reference to... Figure 3 Based on the above embodiments, optionally, the first voltage control module 20 includes a first delay unit 21, a first switching unit 22, and a first current limiting unit 23; the input terminal of the first delay unit 21 is connected to the first power input terminal DC+ of the driving circuit, the output terminal of the first delay unit 21 is connected to the control terminal of the first switching unit 22, the first terminal of the first switching unit 22 is connected to the sampling terminal VSEN1 of the first monitoring module 10, the second terminal of the first switching unit 22 is grounded, the first terminal of the first current limiting unit 23 is connected to the input terminal of the first delay unit 21, and the second terminal of the first current limiting unit 23 is connected to the sampling terminal VSEN1 of the first monitoring module 10.

[0075] The second voltage control module 40 includes a second delay unit 41, a second switching unit 42, and a second current limiting unit 43. The input terminal of the second delay unit 41 is connected to the second power input terminal DC- of the drive circuit, and the output terminal of the second delay unit 41 is connected to the control terminal of the second switching unit 42. The first terminal of the second switching unit 42 is connected to the sampling terminal VSEN2 of the second monitoring module 30, and the second terminal of the second switching unit 42 is grounded. The first terminal of the second current limiting unit 43 is connected to the input terminal of the second delay unit 41, and the second terminal of the second current limiting unit 43 is connected to the sampling terminal VSEN2 of the second monitoring module 30.

[0076] Specifically, when the first power input terminal DC+ and the second power input terminal DC- are connected to the power supply voltage, the first power input terminal DC+ is at a high potential, and the second power input terminal DC- is at a low potential. Since the first power input terminal DC+ is connected to the sampling terminal VSEN1 of the first monitoring module 10 through the first current limiting unit 23, the sampling terminal VSEN1 of the first monitoring module 10 is also at a high potential, making the potential of the sampling terminal VSEN1 of the first monitoring module 10 high. After a certain time delay by the first delay unit 21, the voltage of the control terminal of the first switching unit 22 reaches its own threshold voltage, causing the first switching unit 22 to conduct, thus pulling down the potential of the sampling terminal VSEN1 of the first monitoring module 10. Since the second power input terminal DC- is connected to the sampling terminal VSEN2 of the second monitoring module 30 through the second current limiting unit 43, the potential of the sampling terminal VSEN2 of the second monitoring module 30 is low.

[0077] When the power input terminals DC+ and DC- are reversed, DC+ is at a low potential and DC- is at a high potential. The low potential of DC+ is connected to the sampling terminal VSEN1 of the first monitoring module 10 through the first current limiting unit 23, making the potential of VSEN1 low. Since DC- is connected to the sampling terminal VSEN2 of the second monitoring module 30 through the second current limiting unit 43, the potential of VSEN2 is high. After a certain delay by the second delay unit 41, the voltage at the control terminal of the second switching unit 42 reaches its threshold voltage, thus turning on the second switching unit 42. The second switching unit 42 then pulls down the potential of VSEN2.

[0078] Continue to refer to Figure 3 Optionally, the first voltage control module 20 further includes a first discharge unit 24; the first end of the first discharge unit 24 is connected to the first power input terminal DC+ of the drive circuit, and the second end of the first discharge unit 24 is connected to the second terminal of the first switching unit 22. The first voltage control module 20 also includes a first voltage regulator unit 25; the first end of the first voltage regulator unit 25 is connected to the sampling terminal VSEN1 of the first monitoring module 10, and the second end of the first voltage regulator unit 25 is grounded.

[0079] The second voltage control module 40 also includes a second discharge unit 44; the first end of the second discharge unit 44 is connected to the second power input terminal DC- of the drive circuit, and the second end of the second discharge unit 44 is connected to the second terminal of the second switching unit 42. The second voltage control module 40 also includes a second voltage regulator unit 45; the first end of the second voltage regulator unit 45 is connected to the sampling terminal VSEN2 of the second monitoring module 30, and the second end of the second voltage regulator unit 45 is grounded.

[0080] The first discharge unit 24 is used to discharge the first delay unit 21, and the second discharge unit 44 is used to discharge the second delay unit 41. Specifically, when the potential of the first power input terminal DC+ changes from high to low, the electrical energy stored in the first delay unit 21 is released through the path from the first discharge unit 24 to ground; when the potential of the second power input terminal DC- changes from high to low, the electrical energy stored in the second delay unit 41 is released through the path from the second discharge unit 44 to ground. The first voltage regulator unit 25 is used to clamp the voltage of the sampling terminal VSEN1 of the first monitoring module 10 to a voltage range within which the first monitoring module 10 can operate normally; the second voltage regulator unit 45 is used to clamp the voltage of the sampling terminal VSEN2 of the second monitoring module 30 to a voltage range within which the second monitoring module 30 can operate normally.

[0081] Figure 4 This is a schematic diagram of the drive circuit for another magnetic latching relay according to an embodiment of the present invention, with reference to... Figure 4 Based on the above embodiments, optionally, the first delay unit 21 includes a first resistor R1 and a first capacitor C1; the first switching unit 22 includes a first transistor Q1; the first current limiting unit 23 includes a second resistor R2; the first discharge unit 24 includes a third resistor R3; the first voltage regulating unit 25 includes a first voltage regulating diode Z1; the first end of the first resistor R1 is connected to the first power input terminal DC+ of the driving circuit, the second end of the first resistor R1 is connected to the control electrode of the first transistor Q1, the first electrode of the first transistor Q1 is connected to the sampling terminal VSEN1 of the first monitoring module 10, and the first transistor... The second terminal of transistor Q1 is connected to the first terminal of the first capacitor C1. The second terminal of the first capacitor C1 is connected to the second terminal of the first resistor R1. The first terminal of the second resistor R2 is connected to the first terminal of the first resistor R1. The second terminal of the second resistor R2 is connected to the sampling terminal VSEN1 of the first monitoring module 10. The first terminal of the first Zener diode Z1 is connected to the first terminal of the first transistor Q1. The second terminals of the first Zener diode Z1 and the first transistor Q1 are both grounded. The first terminal of the third resistor R3 is connected to the first terminal of the first resistor R1. The second terminal of the third resistor R3 is connected to the second terminal of the first transistor Q1.

[0082] Specifically, by adjusting the resistance value of the first resistor R1 and the capacitance value of the first capacitor C1, the charging time of the first capacitor C1 can be adjusted, thereby flexibly adjusting the energizing time of the coil of the magnetic latching relay. The second resistor R2 is a pull-up resistor for the first transistor Q1, used to limit the current after the first transistor Q1 is turned on. The second resistor R3 is used to discharge the first capacitor C1.

[0083] Specifically, when the first power input terminal DC+ and the second power input terminal DC- are positively connected to the power supply voltage, the first capacitor C1 is charged through the first resistor R1. Before the voltage across the first capacitor C1 reaches the threshold voltage of the control terminal of the first transistor Q1, the first transistor Q1 is in the off state. At this time, the high potential of the first power input terminal DC+ is connected to the sampling terminal VSEN1 of the first monitoring module 10 through the second resistor R2, making the potential of the sampling terminal VSEN1 of the first monitoring module 10 high, and the potential of the output terminal O1 of the first monitoring module 10 high. When the voltage across the first capacitor C1 reaches the threshold voltage of the control terminal of the first transistor Q1, the first transistor Q1 is turned on, the potential of the sampling terminal VSEN1 of the first monitoring module 10 is pulled low, and the potential of the output terminal O1 of the first monitoring module 10 is low.

[0084] Optionally, the second delay unit 41 includes a fourth resistor R4 and a second capacitor C2; the second switching unit 42 includes a second transistor Q2; the second current limiting unit 43 includes a fifth resistor R5; the second discharge unit 44 includes a sixth resistor R6; the second voltage regulating unit 45 includes a second Zener diode Z2; the first end of the fourth resistor R4 is connected to the second power input terminal DC- of the drive circuit, the second end of the fourth resistor R4 is connected to the control electrode of the second transistor Q2, the first electrode of the second transistor Q2 is connected to the sampling terminal VSEN2 of the second monitoring module 30, the second electrode of the second transistor Q2 is connected to the first end of the second capacitor C2, the second end of the second capacitor C2 is connected to the second end of the fourth resistor R4, the first end of the fifth resistor R5 is connected to the first end of the fourth resistor R4, the second end of the fifth resistor R5 is connected to the sampling terminal VSEN2 of the second monitoring module 30, the first electrode of the second Zener diode Z2 is connected to the first electrode of the second transistor Q2, the second electrode of the second Zener diode Z2 and the second electrode of the second transistor Q2 are both grounded, the first end of the sixth resistor R6 is connected to the first end of the fourth resistor R4, and the second end of the sixth resistor R6 is connected to the second electrode of the second transistor Q2.

[0085] Specifically, by adjusting the resistance of the fourth resistor R4 and the capacitance of the second capacitor C2, the charging time of the second capacitor C2 can be adjusted, thereby flexibly adjusting the energizing time of the magnetic latching relay coil. The fifth resistor R5 is a pull-up resistor for the second transistor Q2, used to limit the current after the second transistor Q2 is turned on. The sixth resistor R6 is used to discharge the second capacitor C2.

[0086] Specifically, when the first power input terminal DC+ and the second power input terminal DC- are connected in reverse, the second capacitor C2 is charged through the fourth resistor R4. Before the voltage across the second capacitor C2 reaches the threshold voltage of the control terminal of the second transistor Q2, the second transistor Q2 is in the off state. At this time, the high potential of the second power input terminal DC- is connected to the sampling terminal VSEN2 of the second monitoring module 30 through the fifth resistor R5, making the potential of the sampling terminal VSEN2 of the second monitoring module 30 high, and the potential of the output terminal O3 of the second monitoring module 30 high. When the voltage across the second capacitor C2 reaches the threshold voltage of the control terminal of the second transistor Q2, the second transistor Q2 is turned on, the potential of the sampling terminal VSEN2 of the second monitoring module 30 is pulled low, and the potential of the output terminal O3 of the second monitoring module 30 is low.

[0087] Figure 5 This is a schematic diagram of the drive circuit for another magnetic latching relay according to an embodiment of the present invention, with reference to... Figure 5 Based on the above embodiments, optionally, the first monitoring module 10 includes a first chip U1, which includes a power supply terminal, a sampling terminal, and an output terminal; the second monitoring module 30 includes a second chip U2, which includes a power supply terminal, a sampling terminal, and an output terminal; the power supply terminal of the first chip U1 is connected to the supply voltage VCC, the output terminal of the first chip U1 is connected to the first input terminal INA of the drive module 50, and the sampling terminal of the first chip U1 is connected to the output terminal O2 of the first voltage control module 20; the power supply terminal of the second chip U2 is connected to the supply voltage VCC, the output terminal of the second chip U2 is connected to the second input terminal INB of the drive module 50, and the sampling terminal of the second chip U2 is connected to the output terminal O4 of the second voltage control module 40.

[0088] The first chip U1 is used to set the output potential of the first chip U1 to a high potential when the voltage at the sampling terminal of the first chip U1 reaches the monitoring voltage; the second chip U2 is used to set the output potential of the second chip U2 to a high potential when the voltage at the sampling terminal of the second chip U2 reaches the monitoring voltage.

[0089] Optionally, the first monitoring module 10 further includes a first pull-up unit 12, the first end of which is connected to the power supply terminal of the first chip U1, and the second end of which is connected to the output terminal of the first chip U1.

[0090] Optionally, the second monitoring module 30 further includes a second pull-up unit 32, the first end of which is connected to the power supply terminal of the second chip U2, and the second end of which is connected to the output terminal of the second chip U2.

[0091] Both the first chip U1 and the second chip U2 are open-drain outputs. Therefore, the first chip U1 and the second chip U2 will not actively output a high level. Instead, they need to be pulled up by an external pull-up unit to achieve a high-level output.

[0092] Optionally, the first monitoring module 10 further includes a third voltage regulator unit 11 and a third current limiting unit 13, and the first chip U1 further includes a ground terminal; the third voltage regulator unit 11 is connected between the power supply terminal of the first chip U1 and the ground terminal of the first chip U1, the ground terminal of the first chip U1 is grounded, the first terminal of the third current limiting unit 13 is connected to the power supply voltage VCC, and the second terminal of the third current limiting unit 13 is connected to the power supply terminal of the first chip U1.

[0093] Optionally, the second monitoring module 30 further includes a fourth voltage regulator unit 31 and a fourth current limiting unit 33, and the second chip U2 further includes a ground terminal; the fourth voltage regulator unit 31 is connected between the power supply terminal and the ground terminal of the second chip U2, the ground terminal of the second chip U2 is grounded, the first terminal of the fourth current limiting unit 33 is connected to the power supply voltage VCC, and the second terminal of the fourth current limiting unit 33 is connected to the power supply terminal of the second chip U2.

[0094] Figure 6 This is a schematic diagram of the drive circuit for another magnetic latching relay according to an embodiment of the present invention, with reference to... Figure 6 Based on the above embodiments, optionally, the first pull-up unit 12 includes a seventh resistor R7, the first end of which is connected to the power supply terminal of the first chip U1, and the second end of which is connected to the output terminal of the first chip U1. The third voltage regulator unit 11 includes a third Zener diode Z3, and the third current limiting unit 13 includes a ninth resistor R9, the first end of which is connected to the supply voltage VCC, and the second end of which is connected to the power supply terminal of the first chip U1. The first terminal of the third Zener diode Z3 is connected to the power supply terminal of the first chip U1, and the second terminal of the third Zener diode Z3 is connected to the ground terminal of the first chip U1. The seventh resistor R7 is a pull-up resistor for the first chip U1. For example, when the output terminal of the first chip U1 needs to be at a high potential, the voltage is pulled up to the power supply terminal of the first chip U1 through the seventh resistor R7. The ninth resistor R9 is used for current limiting, and the third Zener diode Z3 clamps the voltage at the power supply terminal of the first chip U1 to a voltage range within which the first chip U1 can operate normally.

[0095] Optionally, the second pull-up unit 32 includes an eighth resistor R8, with its first end connected to the power supply terminal of the second chip U2 and its second end connected to the output terminal of the second chip U2. The fourth voltage regulator unit 31 includes a fourth Zener diode Z4, and the fourth current limiting unit 33 includes a tenth resistor R10. The first end of the tenth resistor R10 is connected to the supply voltage VCC, and its second end is connected to the power supply terminal of the second chip U2. The first terminal of the fourth Zener diode Z4 is connected to the power supply terminal of the second chip U2, and its second terminal is connected to the ground terminal of the second chip U2. The eighth resistor R8 is a pull-up resistor for the second chip U2. For example, when the output terminal of the second chip U2 needs to be at a high potential, the voltage is pulled up to the power supply terminal of the second chip U2 through the eighth resistor R8. The tenth resistor R10 is used for current limiting, and the fourth Zener diode Z4 clamps the voltage at the power supply terminal of the second chip U2 to a voltage range within which the second chip U2 can operate normally.

[0096] Figure 7 This is a schematic diagram of the drive circuit for another magnetic latching relay according to an embodiment of the present invention, with reference to... Figure 7 Based on the above embodiments, optionally, the drive module 50 includes a third chip U3, which includes a first input terminal, a second input terminal, a first output terminal, a second output terminal, and a ground terminal; the first input terminal of the third chip U3 is connected to the output terminal O1 of the first monitoring module 10, the second input terminal of the third chip U3 is connected to the output terminal O3 of the second monitoring module 30, and the ground terminal of the third chip U3 is grounded; wherein, the first output terminal and the second output terminal of the third chip U3 are both connected to a magnetic latching relay, or the first output terminal, the second output terminal, and the ground terminal of the third chip U3 are all connected to a magnetic latching relay.

[0097] Among them, the first input terminal of the third chip U3 serves as the first input terminal INA of the driver module 50, the second input terminal of the third chip U3 serves as the second input terminal INB of the driver module 50, the first output terminal of the third chip U3 serves as the first output terminal DRVON of the driver module 50, the second output terminal of the third chip U3 serves as the second output terminal DRVOFF of the driver module 50, and the ground terminal of the third chip U3 serves as the third output terminal DRVGND of the driver module 50.

[0098] Figure 8 This is a schematic diagram of the drive circuit for another magnetic latching relay according to an embodiment of the present invention, with reference to... Figure 8Based on the above embodiments, optionally, the driving circuit of the magnetic latching relay further includes a rectifier module 60; the first input terminal of the rectifier module 60 serves as the first power input terminal DC+ of the driving circuit, connected to a first power supply voltage; the second input terminal of the rectifier module 60 serves as the second power input terminal DC- of the driving circuit, connected to a second power supply voltage; the power supply terminals of the first monitoring module 10 and the second monitoring module 30 are both connected to the first output terminal of the rectifier module 60; and the second output terminal of the rectifier module 60 is grounded. The rectifier module 60 is configured to output a supply voltage VCC through its first output terminal regardless of whether the first power input terminal DC+ and the second power input terminal DC- are connected in the forward direction (e.g., forward DC current) or in the reverse direction (e.g., reverse DC current).

[0099] Optionally, the rectifier module 60 includes a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, and a third capacitor C3. The first terminal of the first diode D1 is connected to the second terminal of the fourth diode D4, the second terminal of the first diode D1 is connected to the second terminal of the second diode D2, the first terminal of the second diode D2 is connected to the second terminal of the third diode D3, the first terminal of the third diode D3 is connected to the first terminal of the fourth diode D4, the first terminal of the third capacitor C3 is connected to the second terminal of the second diode D2, the second terminal of the third capacitor C3 is connected to the first terminal of the third diode D3, and the second terminal of the third capacitor C3 is grounded. The first terminal of the first diode D1 serves as the first input terminal of the rectifier module 60, and the first terminal of the second diode D2 serves as the second input terminal of the rectifier module 60. The first terminal of the third capacitor C3 serves as the first output terminal of the rectifier module 60, and the second terminal of the third capacitor C3 serves as the second output terminal of the rectifier module 60.

[0100] Specifically, when the first power input terminal DC+ and the second power input terminal DC- are connected to the power supply voltage in the positive direction, the first diode D1 and the third diode D3 conduct, and the supply voltage VCC is output at the first terminal of the third capacitor C3. When the first power input terminal DC+ and the second power input terminal DC- are connected to the power supply voltage in the reverse direction, the second diode D2 and the fourth diode D4 conduct, and the supply voltage VCC is output at the first terminal of the third capacitor C3. The third capacitor C3 is used for filtering.

[0101] The following is combined Figure 8 The working principle of the magnetic latching relay provided in this embodiment of the present invention will be described in detail.

[0102] Specifically, when applied to a single-coil magnetic latching relay drive, the first output terminal DRVON and the second output terminal DRVOFF of the drive module 50 are connected to the first coil of the magnetic latching relay. When the first power input terminal DC+ and the second power input terminal DC- are connected to the power supply voltage, the potential of the first power input terminal DC+ is high, and the potential of the second power input terminal DC- is low. The first power input terminal DC+ is connected to the sampling terminal of the first chip U1 through the second resistor R2, and at the same time, the first capacitor C1 begins to charge. As long as the voltage across the first capacitor C1 does not reach the threshold voltage of the control electrode of the first transistor Q1, the sampling terminal of the first chip U1 remains at a high potential. When the voltage of the first power input terminal DC+ reaches the monitoring voltage of the sampling terminal of the first chip U1 after being converted by the second resistor R2, the potential of the output terminal of the first chip U1 is high. The second power input terminal DC- is connected to the sampling terminal of the second chip U2 through the fifth resistor R5. The sampling terminal of the second chip U2 is at a low potential, which acts on the third chip U3, making the potential of the first input terminal of the third chip U3 high and the potential of the second input terminal of the third chip U3 low. The third chip U3 generates a positive pulse, and the third chip U3 generates a positive pulse with the first output terminal at a high potential and the second output terminal at a low potential, which controls the magnetic holding solenoid valve to engage.

[0103] When the voltage across the first capacitor C1 reaches the threshold voltage of the control electrode of the first transistor Q1, the first transistor Q1 turns on, causing the potential at the sampling terminal of the first chip U1 to become low. Ultimately, the potential at the output terminal of the first chip U1 becomes low, which acts on the third chip U3, causing the potentials at both the first and second input terminals of the third chip U3 to become low. The first and second output terminals of the third chip U3 also become low. At this time, the positive pulse is released, and the magnetic latching relay remains in the energized state.

[0104] When the power supply voltages are reversed at the first power input terminal DC+ and the second power input terminal DC-, the potential of the first power input terminal DC+ is low, and the potential of the second power input terminal DC- is high. The first power input terminal DC+ is connected to the sampling terminal of the first chip U1 through the second resistor R2, and the sampling terminal of the first chip U1 is at a low potential. The second power input terminal DC- is connected to the sampling terminal of the second chip U2 through the fifth resistor R5. At the same time, the second capacitor C2 starts charging. As long as the voltage across the second capacitor C2 does not reach the threshold voltage of the control electrode of the second transistor Q2, the sampling terminal of the second chip U2 remains at a high potential. When the voltage of the second power input terminal DC- reaches the monitoring voltage of the sampling terminal of the second chip U2 after being converted by the fifth resistor R5, the potential of the output terminal of the second chip U2 is high. This effect on the third chip U3 causes the potential of the first input terminal of the third chip U3 to be low and the potential of the second input terminal of the third chip U3 to be high. The third chip U3 generates a reverse pulse, resulting in a reverse pulse with a low potential at the first output terminal and a high potential at the second output terminal, which controls the release of the magnetic latching solenoid valve.

[0105] When the voltage across the second capacitor C2 reaches the threshold voltage of the control electrode of the second transistor Q2, the second transistor Q2 turns on, causing the potential at the sampling terminal of the second chip U2 to become low. Ultimately, the potential at the output terminal of the second chip U2 becomes low, which acts on the third chip U3, causing the potentials at both the first and second input terminals of the third chip U3 to become low. The first and second output terminals of the third chip U3 also become low. At this time, the reverse pulse is released, and the magnetic latching relay remains in the released state.

[0106] It is understandable that the driving process of a dual-coil magnetic latching relay is similar to that of a single-coil magnetic latching relay, and will not be described in detail here.

[0107] Optionally, this embodiment of the invention also provides a magnetic latching relay, which can be a single-coil magnetic latching relay or a double-coil magnetic latching relay. This magnetic latching relay includes the driving circuit of the magnetic latching relay provided in any of the above embodiments; therefore, this magnetic latching relay also possesses the beneficial effects of any of the above embodiments.

[0108] It should be understood that the various forms of the process shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this utility model can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this utility model can be achieved, and this is not limited herein.

[0109] The specific embodiments described above do not constitute a limitation on the scope of protection of this utility model. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.

Claims

1. A driving circuit for a magnetic latching relay, characterized in that, include: The system comprises a first monitoring module, a first voltage control module, a second monitoring module, a second voltage control module, and a drive module. The input terminal of the first voltage control module is connected to the first power input terminal of the drive circuit, the output terminal of the first voltage control module is connected to the sampling terminal of the first monitoring module, and the output terminal of the first monitoring module is connected to the first input terminal of the drive module. The input terminal of the second voltage control module is connected to the second power input terminal of the drive circuit, the output terminal of the second voltage control module is connected to the sampling terminal of the second monitoring module, and the output terminal of the second monitoring module is connected to the second input terminal of the drive module. The first voltage control module and the second voltage control module are used to delay and control the potential of the sampling terminal of the first monitoring module or the potential of the sampling terminal of the second monitoring module to flip according to the power supply voltage connected to the first power input terminal and the second power input terminal of the drive circuit. The first and second output terminals of the drive module are both connected to the magnetic latching relay.

2. The driving circuit of the magnetic latching relay according to claim 1, characterized in that, The first voltage control module includes a first delay unit, a first switching unit, and a first current limiting unit; The input terminal of the first delay unit is connected to the first power input terminal of the driving circuit, the output terminal of the first delay unit is connected to the control terminal of the first switching unit, the first terminal of the first switching unit is connected to the sampling terminal of the first monitoring module, the second terminal of the first switching unit is grounded, the first terminal of the first current limiting unit is connected to the input terminal of the first delay unit, and the second terminal of the first current limiting unit is connected to the sampling terminal of the first monitoring module. The first voltage control module further includes a first discharge unit; The first end of the first discharge unit is connected to the first power input terminal of the drive circuit, and the second end of the first discharge unit is connected to the second end of the first switch unit. The first voltage control module further includes a first voltage regulator unit; The first terminal of the first voltage regulator unit is connected to the sampling terminal of the first monitoring module, and the second terminal of the first voltage regulator unit is grounded.

3. The driving circuit of the magnetic latching relay according to claim 2, characterized in that, The first delay unit includes a first resistor and a first capacitor; the first switching unit includes a first transistor; the first current limiting unit includes a second resistor; the first discharge unit includes a third resistor; and the first voltage regulating unit includes a first Zener diode. The first end of the first resistor is connected to the first power input terminal of the driving circuit, the second end of the first resistor is connected to the control terminal of the first transistor, the first terminal of the first transistor is connected to the sampling terminal of the first monitoring module, the second terminal of the first transistor is connected to the first end of the first capacitor, the second end of the first capacitor is connected to the second end of the first resistor, the first end of the second resistor is connected to the first end of the first resistor, the second end of the second resistor is connected to the sampling terminal of the first monitoring module, the first terminal of the first Zener diode is connected to the first terminal of the first transistor, the second terminals of the first Zener diode and the second terminal of the first transistor are both grounded, the first end of the third resistor is connected to the first end of the first resistor, and the second end of the third resistor is connected to the second terminal of the first transistor.

4. The driving circuit of the magnetic latching relay according to claim 1, characterized in that, The second voltage control module includes a second delay unit, a second switching unit, and a second current limiting unit; The input terminal of the second delay unit is connected to the second power input terminal of the drive circuit, the output terminal of the second delay unit is connected to the control terminal of the second switching unit, the first terminal of the second switching unit is connected to the sampling terminal of the second monitoring module, the second terminal of the second switching unit is grounded, the first terminal of the second current limiting unit is connected to the input terminal of the second delay unit, and the second terminal of the second current limiting unit is connected to the sampling terminal of the second monitoring module. The second voltage control module also includes a second discharge unit; The first end of the second discharge unit is connected to the second power input terminal of the drive circuit, and the second end of the second discharge unit is connected to the second end of the second switch unit. The second voltage control module also includes a second voltage regulator unit; The first end of the second voltage regulator unit is connected to the sampling end of the second monitoring module, and the second end of the second voltage regulator unit is grounded.

5. The driving circuit of the magnetic latching relay according to claim 4, characterized in that, The second delay unit includes a fourth resistor and a second capacitor; the second switching unit includes a second transistor; the second current limiting unit includes a fifth resistor; the second discharge unit includes a sixth resistor; and the second voltage regulating unit includes a second Zener diode. The first end of the fourth resistor is connected to the second power input terminal of the driving circuit, the second end of the fourth resistor is connected to the control terminal of the second transistor, the first terminal of the second transistor is connected to the sampling terminal of the second monitoring module, the second terminal of the second transistor is connected to the first end of the second capacitor, the second end of the second capacitor is connected to the second end of the fourth resistor, the first end of the fifth resistor is connected to the first end of the fourth resistor, the second end of the fifth resistor is connected to the sampling terminal of the second monitoring module, the first terminal of the second Zener diode is connected to the first terminal of the second transistor, the second terminals of the second Zener diode and the second terminal of the second transistor are both grounded, the first end of the sixth resistor is connected to the first end of the fourth resistor, and the second end of the sixth resistor is connected to the second terminal of the second transistor.

6. The driving circuit of the magnetic latching relay according to claim 1, characterized in that, The first monitoring module includes a first chip, which includes a power supply terminal, a sampling terminal, and an output terminal; the second monitoring module includes a second chip, which includes a power supply terminal, a sampling terminal, and an output terminal. The power supply terminal of the first chip is connected to the supply voltage, the output terminal of the first chip is connected to the first input terminal of the drive module, and the sampling terminal of the first chip is connected to the output terminal of the first voltage control module. The power supply terminal of the second chip is connected to the supply voltage, the output terminal of the second chip is connected to the second input terminal of the drive module, and the sampling terminal of the second chip is connected to the output terminal of the second voltage control module. The first monitoring module further includes a first pull-up unit, which includes a seventh resistor. The first end of the seventh resistor is connected to the power supply terminal of the first chip, and the second end of the seventh resistor is connected to the output terminal of the first chip. The second monitoring module further includes a second pull-up unit, which includes an eighth resistor. The first end of the eighth resistor is connected to the power supply terminal of the second chip, and the second end of the eighth resistor is connected to the output terminal of the second chip.

7. The driving circuit of the magnetic latching relay according to claim 6, characterized in that, The first monitoring module further includes a third voltage regulator unit and a third current limiting unit, and the first chip further includes a ground terminal; The third voltage regulator unit is connected between the power supply terminal and the ground terminal of the first chip. The ground terminal of the first chip is grounded. The first terminal of the third current limiting unit is connected to the power supply voltage, and the second terminal of the third current limiting unit is connected to the power supply terminal of the first chip. The third voltage regulator unit includes a third Zener diode, and the third current limiting unit includes a ninth resistor. The first end of the ninth resistor is connected to the power supply voltage, the second end of the ninth resistor is connected to the power supply terminal of the first chip, the first terminal of the third Zener diode is connected to the power supply terminal of the first chip, and the second terminal of the third Zener diode is connected to the ground terminal of the first chip. The second monitoring module also includes a fourth voltage regulation unit and a fourth current limiting unit, and the second chip also includes a ground terminal; The fourth voltage regulator unit is connected between the power supply terminal and the ground terminal of the second chip. The ground terminal of the second chip is grounded. The first terminal of the fourth current limiting unit is connected to the power supply voltage, and the second terminal of the fourth current limiting unit is connected to the power supply terminal of the second chip. The fourth voltage regulator unit includes a fourth Zener diode, and the fourth current limiting unit includes a tenth resistor; the first end of the tenth resistor is connected to the power supply voltage, the second end of the tenth resistor is connected to the power supply terminal of the second chip, the first terminal of the fourth Zener diode is connected to the power supply terminal of the second chip, and the second terminal of the fourth Zener diode is connected to the ground terminal of the second chip.

8. The driving circuit of the magnetic latching relay according to claim 1, characterized in that, The driving module includes a third chip, which includes a first input terminal, a second input terminal, a first output terminal, a second output terminal, and a ground terminal. The first input terminal of the third chip is connected to the output terminal of the first monitoring module, the second input terminal of the third chip is connected to the output terminal of the second monitoring module, and the ground terminal of the third chip is grounded. Wherein, the first output terminal and the second output terminal of the third chip are both connected to the magnetic latching relay, or the first output terminal, the second output terminal and the ground terminal of the third chip are all connected to the magnetic latching relay.

9. The driving circuit for the magnetic latching relay according to any one of claims 1-8, characterized in that, It also includes a rectifier module; The first input terminal of the rectifier module serves as the first power input terminal of the drive circuit and is connected to the first power supply voltage. The second input terminal of the rectifier module serves as the second power input terminal of the drive circuit and is connected to the second power supply voltage. The power supply terminals of the first monitoring module and the second monitoring module are both connected to the first output terminal of the rectifier module. The second output terminal of the rectifier module is grounded. The rectifier module includes a first diode, a second diode, a third diode, a fourth diode, and a third capacitor; The first terminal of the first diode is connected to the second terminal of the fourth diode, the second terminal of the first diode is connected to the second terminal of the second diode, the first terminal of the second diode is connected to the second terminal of the third diode, the first terminal of the third diode is connected to the first terminal of the fourth diode, the first terminal of the third capacitor is connected to the second terminal of the second diode, the second terminal of the third capacitor is connected to the first terminal of the third diode, and the second terminal of the third capacitor is grounded. The first terminal of the first diode serves as the first input terminal of the rectifier module, and the first terminal of the second diode serves as the second input terminal of the rectifier module; the first terminal of the third capacitor serves as the first output terminal of the rectifier module, and the second terminal of the third capacitor serves as the second output terminal of the rectifier module.

10. A magnetic latching relay, characterized in that, The driving circuit of the magnetic latching relay as described in any one of claims 1-9; The magnetic latching relay includes a single-coil magnetic latching relay, which includes a first coil, and the first coil is connected to the first output terminal and the second output terminal of the drive module. or, The magnetic latching relay includes a dual-coil magnetic latching relay, which includes a second coil and a third coil. The second coil is connected to the first output terminal of the drive module and the ground terminal of the drive module; the third coil is connected to the second output terminal of the drive module and the ground terminal of the drive module.

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